RF SWITCH DEVICE AND MANUFACTURING METHOD THEREOF
20250062253 ยท 2025-02-20
Inventors
Cpc classification
H10D62/102
ELECTRICITY
H10D30/023
ELECTRICITY
H10D30/611
ELECTRICITY
H01L2223/6688
ELECTRICITY
International classification
H01L29/06
ELECTRICITY
Abstract
Provided is an RF switch device and a manufacturing method thereof and, more particularly, an RF switch device and a manufacturing method thereof that improve breakdown voltage characteristics and prevent an increase in the figure of merit (FoM) value, which has a trade-off relationship with the breakdown voltage characteristics, by decreasing the path along which holes move in a body region to a body contact by including a first (gate) electrode extending along a first direction between opposite ends of a second (gate) electrode extending in a second (orthogonal) direction.
Claims
1. An RF switch device, comprising: a buried oxide (BOX) layer; a semiconductor layer on or over the BOX layer; and a gate electrode on or over the semiconductor layer, wherein the gate electrode comprises: a first electrode extending along a first direction; and at least one second electrode extending along a second direction, wherein the first electrode is between opposite ends of the second electrode.
2. The RF switch device of claim 1, wherein the first electrode is substantially in a center of the second electrode.
3. The RF switch device of claim 1, further comprising: a source and a drain adjacent to the second electrode in the semiconductor layer; and a body region in the semiconductor layer, extending along or under the gate electrode.
4. The RF switch device of claim 3, wherein the body region extends uninterruptedly along the first direction below the first electrode.
5. The RF switch device of claim 3, further comprising: a device isolation film in the semiconductor layer, surrounding the source and the drain.
6. The RF switch device of claim 5, further comprising: a body contact in the semiconductor layer, at an end of the first electrode.
7. The RF switch device of claim 6, wherein the body contact is an impurity doped region of a first conductivity type, and has a higher concentration of impurities and/or dopant compared to the body region of a first conductivity type.
8. The RF switch device of claim 6, wherein the device isolation film comprises: a first isolation film in the semiconductor layer, surrounding the source, the drain, and the body contact; and a second isolation film extending along the second direction between the body contact and the source and drain adjacent to the body contact.
9. The RF switch device of claim 8, wherein the second isolation film terminates under an end of the first electrode, and the body region extends uninterruptedly in the semiconductor layer below the first electrode.
10. The RF switch device of claim 9, wherein the body region has an end connected to or in contact with the body contact.
11. An RF switch device, comprising: a buried oxide (BOX) insulating layer; a semiconductor layer on or over the BOX layer; a gate electrode on or over the semiconductor layer; a body region comprising a first conductivity type impurity doped region below the gate electrode; and a pair of first conductivity type body contacts spaced apart along a first direction, wherein the gate electrode comprises: a first electrode extending along the first direction; and at least one second electrode extending along a second direction, wherein the first electrode crosses or intersects the at least one second electrode and has opposite ends in the first direction that extend to the pair of body contacts or that overlap or are adjacent to the body contacts.
12. The RF switch device of claim 11, wherein the body region has opposite ends connected to or in contact with the pair of body contacts.
13. The RF switch device of claim 11, further comprising: a source and a drain in the semiconductor layer, respectively located on opposite sides of the body region on a side of the second electrode.
14. The RF switch device of claim 12, wherein the body region extends along the first direction below the first electrode, and extends along the second direction below the second electrode.
15. The RF switch device of claim 14, wherein the body region extends along the first direction from approximately a center of the device along the second direction and is connected to or in contact with the pair of body contacts.
16. A method of manufacturing an RF switch device, comprising: forming a body contact extending along a second direction in a semiconductor layer on a buried oxide (BOX) layer; forming a device isolation film in the semiconductor layer; forming an impurity doped region in the semiconductor layer; forming a gate electrode on the semiconductor layer; and completing a body region by forming a source and a drain in the semiconductor layer, wherein the gate electrode comprises: a first electrode extending along a first direction; and at least one second electrode extending along the second direction, and the first electrode is between opposite ends of the second electrode.
17. The manufacturing method of claim 16, wherein the body region extends along substantially a same path as the gate electrode.
18. The manufacturing method of claim 17, wherein the body region is connected to or in contact with the body contact.
19. The manufacturing method of claim 18, wherein the body contact comprises a pair spaced apart along the first direction.
20. The manufacturing method of claim 18, wherein the device isolation film extends along the second direction from the body contact or a location adjacent thereto, but terminates below the first electrode.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The above and other objectives, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description when taken in conjunction with the accompanying drawings, in which:
[0042]
[0043]
[0044]
[0045]
[0046]
DETAILED DESCRIPTION OF THE INVENTION
[0047] The embodiments of the present disclosure may be modified in various forms, and the scope of the present disclosure should not be construed as being limited to the following embodiments, but should be construed based on the matters described in the claims. In addition, these embodiments are provided for reference in order to more completely explain the present disclosure to those of ordinary skill in the art.
[0048] Hereinafter, it should be noted that when one component is described as being on, above, an upper side of, or an upper part of another component, the one component may be directly on the other component, or the one component may be a certain distance from the other component. When the one component is at a certain distance from another component, one or more third components may be between the one component and the other component. In addition, when one component is expressed as being directly on another component or directly above another component, no other component is between the one component and the other component.
[0049] In addition, it should be noted that, although terms such as first, second, etc. may be used to describe various items such as various elements, areas, and/or parts, the items are not limited by these terms, and a second configuration does not presuppose a first configuration.
[0050] The term metal oxide semiconductor (MOS) is a general term, and M is not limited to only metal and may be any of various types of conductors. Also, S may be a substrate or a semiconductor structure, and O is not limited to oxide and may include various types of organic or inorganic insulating materials.
[0051] Furthermore, the conductivity type of a doped region or component may be defined as p-type or n-type according to the main carrier characteristics, but this is only for convenience of description, and the technical spirit of the present disclosure is not limited to what is illustrated. For example, hereinafter, p-type or n-type may be replaced with the more general terms first conductivity type or second conductivity type, and here, the first conductivity type may refer to p-type, and the second conductivity type may refer to n-type.
[0052] Furthermore, it should be understood that high concentration and low concentration referring to the doping concentration of an impurity region refers to the relative doping concentration of the impurity region to other impurity regions.
[0053] The term first direction used below may be understood to mean the x-axis direction on the plan view according to
[0054] In addition, in the following, one or more contacts or plugs may be on a source, a drain, a gate electrode, and/or a second well, but for convenience of explanation, detailed descriptions thereof will be omitted.
[0055]
[0056] Hereinafter, the RF switch device 1 according to one or more embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0057] Referring to
[0058] The structure of the RF switch device 1 according to embodiment(s) of the present disclosure will be described. A buried oxide (BOX) layer 101, which may function as an insulating layer, may be in or on a substrate such as a monolithic silicon wafer or a silicon-on-insulator (SOI) wafer, and a semiconductor layer 103 may be on or over the BOX layer 101. The semiconductor layer 103 is electrically isolated by device isolation films 150 and 151 so that individual devices on and/or in the semiconductor layer 103 may be driven separately. In addition, the device isolation film 150 may comprise, for example, an STI (shallow trench isolation) film, and may have substantially the same thickness as the semiconductor layer 103, but there is no particular limitation thereto.
[0059] In addition, the gate electrode 110 may be on or over the semiconductor layer 103. The gate electrode 110 may include the first electrode 111 extending along the first direction and one or more second electrodes 113 extending along the second direction. One end of each second electrode 113 is connected to, in contact with, and/or integral with the first electrode 111, and the gate electrode 110 may comprise a plurality of second electrodes 113 in the active region of the device 1 a predetermined distance apart from each other along the first direction. In the drawing, three second electrodes 113 are spaced apart from each other, but it should be noted that there is no specific limit to the number of second electrodes 113.
[0060] Referring to
[0061] The gate electrode 110 including the first electrode 111 and the second electrode(s) 113 may include, for example, a conductive polysilicon, a metal, a conductive metal nitride, or a combination thereof, and may be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), metalorganic atomic layer deposition (MOALD), or metalorganic chemical vapor deposition (MOCVD), etc. A gate insulating film 110a may be between the gate electrode 110 and the semiconductor layer 103. The gate insulating film 110a may include a silicon oxide film (e.g., silicon dioxide), a high-k dielectric film, or a combination thereof. The gate insulating film 110a may be formed by ALD, CVD, PVD and/or thermal oxidation.
[0062] A gate spacer 110b may be on sidewalls of the gate electrode 110, and the gate spacer 110b may include an oxide film (e.g., silicon dioxide), a nitride film (e.g., silicon nitride), or a combination thereof.
[0063] In addition, referring to
[0064] Referring to
[0065] Therefore, the body region 140 may be in the semiconductor layer 103 between a source 120 and an adjacent drain 130, and may extend along the second direction below the second gate electrode(s) 113. In addition, the body region 140 may extend in the semiconductor layer 103 uninterruptedly along the first direction immediately below the first gate electrode 111, and be connected to or in contact with the body contact 160.
[0066] Hereinafter, the structure and problems of the conventional RF switch device 9 (
[0067] In SOI MOSFETs, the body region is electrically isolated from the substrate (or a bottom thereof) and thus floats electrically. When a sufficiently high voltage is applied to the drain and the SOI MOSFET operates, the channel electrons may induce impact ionization near the drain. Since the body region is floating, holes generated by impact ionization cannot escape to the substrate and accumulate in the body region. Accordingly, the threshold voltage of the SOI MOSFET decreases due to the increase in the electric potential of the floating body, and eventually the kink phenomenon occurs. In order to prevent such problems, referring to
[0068] Referring to
[0069] The gate 910 may include a first structure 911 extending along a first direction, and one or more second structures 913 connected to the first structure 911 and extending along a second direction. Due to this layout, the gate 910 may have a T-type shape. The body region may also have a T-type shape below the gate 910. One body contact 940 may be on one side of the first structure 911 on a side opposite from the second structure 913.
[0070] In this structure, holes in the body region should be released through the body contact 940, so the holes need to escape by moving in one direction. Thus, there may be constraints on the smooth release of holes. In addition, for the holes in the body region below the end of the second structure 913 distal from the first structure 911, as the distance from the body contact 940 increases, the release path also becomes relatively long, and thus there may be additional constraints on the smooth release of the holes. As a result, the breakdown voltage characteristics of the device 9 deteriorate, which may be problematic.
[0071] In order to solve these problems, referring to
[0072] For example, the path along which holes move in the body region 140 below opposite ends of the second electrode 113 in the second direction may be short relative to the device 9 in
[0073] Furthermore, the device isolation film 150 may surround the active region of the device 1. That is, a first isolation film 151 of the device isolation film 150 may be in the semiconductor layer 103 and may surround the source 120, the drain 130, and the body contacts 160. In addition, one or more second isolation films 153 of the device isolation film 150 may be between the body contact 160 and the source 120 and/or drain 130 adjacent to the body contact 160. The second isolation film 153 may extend along the second direction between the body contact 160 and the adjacent source 120 and/or drain 130, but is not under the first electrode 111. That is, the body region 140 extends uninterruptedly in the semiconductor layer 103 below the first electrode 111 to contact the body contact 160, so the second isolation film 153 is not between the body contact 160 and the adjacent source 120 and/or drain 130 below the first electrode 111.
[0074] The body contact 160 is in the semiconductor layer 103 and at least at one end of the first electrode 111, and may be or comprise, for example, a high concentration impurity doped region having the first conductivity type. As previously mentioned, the body contact 160 may comprise a pair of body contacts 160 spaced apart from each other along the first direction. The pair of body contacts 160 may improve breakdown voltage characteristics by allowing the holes in the body region 140 to be released in multiple directions through the body contacts 160 on opposite sides of the device 1. However, it should be noted that the body contact 160 may be only at one end of the first electrode 111 depending on the case, and that the scope of the present disclosure is not limited by specific examples.
[0075]
[0076] Hereinafter, a method of manufacturing an RF switch device according to embodiment(s) of the present disclosure will be described in detail with reference to the attached drawings. It should be noted that each step in the manufacturing method of an RF switch device according to embodiment(s) of the present disclosure may proceed in a different order or sequence than as described below.
[0077] First, referring to
[0078] Thereafter, referring to
[0079] Thereafter, referring to
[0080] Thereafter, referring to
[0081] After the gate electrode 110 is formed, the gate spacer 110b may be formed. The gate spacer 110b may be formed by depositing one or more insulating film layers on the gate electrode 110 and the semiconductor layer 103, and then anisotropically etching the one or more insulating film layers. In addition, a separate mask pattern may not be required during the etching process to form the gate spacer 110b.
[0082] Thereafter, referring to
[0083] The above detailed description is illustrative of the present disclosure. In addition, the above description shows and describes various embodiments of the present disclosure, and the present disclosure can be used in various other combinations, modifications, and environments. That is, changes or modifications are possible within the scope of the concept of the disclosure disclosed herein, the scope equivalent to the written disclosure, and/or within the scope of skill or knowledge in the art. The above-described embodiments describe various implementations of the technical idea(s) of the present disclosure, and various changes for specific applications and/or fields of use of the present disclosure are possible. Accordingly, the detailed description of the present disclosure is not intended to limit the present disclosure to the disclosed embodiments.