BATTERY MANAGEMENT SYSTEM (BMS) AND APPLICATION

Abstract

A battery management system, comprising a bank of serially connected battery cells having a lower most cell connected to ground and an uppermost cell connected to one port of a load, the other port of which being connected to ground; circuitry for sampling the output voltage of a selected battery cell; a voltage to current converter for receiving the sampled battery cell output voltage, which consists of a current source that outputs current being proportional to the sampled output voltage a predetermined resistor, connected between the current source output and ground, into which the output current of the current source is fed; a control circuit, adapted to measure the voltage generated across the predetermined resistor with respect to ground; determine whether or not the selected battery cell is fully charged according to the difference between the measured voltage and a predetermined threshold voltage; repeat the process for additional battery cells of the bank.

Claims

1. A method for accurately monitoring the charging level of a bank of serially connected battery cells, comprising: a) providing a bank of serially connected battery cells having a lower most cell connected to ground and an uppermost cell connected to one port of a load, the other port of which being connected to ground; b) sampling the output voltage of a selected battery cell; c) feeding the sampled battery cell output voltage into a voltage to current converter consisting of: c(1) a current source that outputs current being proportional to said sampled output voltage c(2) a predetermined resistor, connected between said current source output and ground, into which the output current of said current source is fed; d) measuring the voltage generated across said predetermined resistor with respect to ground; e) determining whether or not said selected battery cell is fully charged according to the difference between the measured voltage and a predetermined threshold voltage; and f) repeating steps b) to d) above for additional battery cells of said bank.

2. The method according to claim 1, further comprising feeding the output voltages of all sampled battery cells into a multiplexer, which forwards said output voltages to a processor that outputs the voltages of all sampled battery cells, each at a predetermined timing.

3. The method according to claim 1, wherein the voltage to current converter is implemented by: a) providing an operational amplifier, which is suitable to operate in high voltage levels; b) connecting the negative port of the selected battery cell to an input of said operational amplifier; c) providing a p-channel FET; d) connecting the source of said p-channel FET to the positive port of the selected battery cell via a first serial resistor; e) connecting the drain of said p-channel FET to the ground via a second serial resistor; f) connecting the gate of said p-channel FET to the output of said operational amplifier; and g) connecting a feedback line between the source of said p-channel FET and the other input of said operational amplifier.

4. The method according to claim 3, wherein the power supply voltages to feed DC power to the operational amplifier are taken from the neighboring battery cells.

5. The method according to claim 4, wherein the lower DC supply to the operational amplifier is taken from one battery cell being lower than the measured battery cell and the higher upper battery cell and the higher DC supply to said operational amplifier is taken from one battery cell being upper than the measured battery cell.

6. The method according to claim 5, wherein multiple packages of operational amplifiers are used for measuring groups of battery cells, while each time, taking the lower supply voltage from one battery cell below the measured group, while the remaining lowest battery cell is measured directly, with respect to ground.

7. A method according to claim 1, further comprising preventing overcharging of the selected battery cell upon measuring that its output voltage is within the threshold by: a) connecting the drain of a FET to the positive port of the selected battery cell via a first resistor and the source of said FET to the negative port of the selected battery cell; b) connecting a shunt capacitor and a shunt resistor between the gate and source of said FET; c) connecting a shunt Zener between the gate and source of said FET, for protecting said gate from overvoltage; d) connecting a port of a series capacitor to said gate; e) applying a square wave to the other port of said series capacitor and causing said shunt capacitor to be charged to a voltage that causes said FET to conduct and consume the current that normally charges said battery cell; f) terminating the application of said square wave to said series capacitor whenever the output voltage is not within said threshold; and g) allowing said shunt capacitor discharge via said shunt resistor and cause said FET to stop conducting, thereby returning to measuring the voltage generated across the predetermined resistor with respect to ground.

8. A battery management system, comprising: a) a bank of serially connected battery cells having a lower most cell connected to ground and an uppermost cell connected to one port of a load, the other port of which being connected to ground; b) circuitry for sampling the output voltage of a selected battery cell; c) a voltage to current converter for receiving the sampled battery cell output voltage, consisting of: c(1) a current source that outputs current being proportional to said sampled output voltage c(2) a predetermined resistor, connected between said current source output and ground, into which the output current of said current source is fed; d) a control circuit, adapted to: measure the voltage generated across said predetermined resistor with respect to ground; determine whether or not said selected battery cell is fully charged according to the difference between the measured voltage and a predetermined threshold voltage; and repeat the process for additional battery cells of said bank.

9. The battery management system according to claim 8, further comprising: a) a processor; and b) a multiplexer, which is adapted to receive the output voltages of all sampled battery cells and forward said output voltages to said processor, said processor outputs the voltages of all sampled battery cells, each at a predetermined timing.

10. The battery management system according to claim 8, further comprising: a) an operational amplifier, which is suitable to operate in high voltage levels, where the negative port of the selected battery cell is connected to an input of said operational amplifier; b) a p-channel FET, where the source of said p-channel FET is connected to the positive port of the selected battery cell via a first serial resistor, the drain of said p-channel FET is connected to the ground via a second serial resistor and the gate of said p-channel FET is connected to the output of said operational amplifier; and c) a feedback line connecting between the source of said p-channel FET and the other input of said operational amplifier.

11. The battery management system according to claim 10, in which the power supply voltages to feed DC power to the operational amplifier are taken from the neighboring battery cells.

12. The battery management system according to claim 11, in which the lower DC supply to the operational amplifier is taken from one battery cell being lower than the measured battery cell and the higher upper battery cell and the higher DC supply to said operational amplifier is taken from one battery cell being upper than the measured battery cell.

13. The battery management system according to claim 12, in which multiple packages of operational amplifiers are used for measuring groups of battery cells, while each time, taking the lower supply voltage from one battery cell below the measured group, while the remaining lowest battery cell is measured directly, with respect to ground.

14. The battery management system according to claim 8, further comprising circuitry for preventing overcharging of the selected battery cell upon measuring that its output voltage is within the threshold, said circuitry comprises: a) a FET the drain of which being connected to the positive port of the selected battery cell via a first resistor and the source of which being connected to the negative port of the selected battery cell; b) a shunt capacitor and a shunt resistor, being connected between the gate and source of said FET; c) a shunt Zener being connected between the gate and source of said FET, for protecting said gate from overvoltage; wherein a port of a series capacitor is being connected to said gate; said circuitry is adapted to: d) apply a square wave to the other port of said series capacitor and causing said shunt capacitor to be charged to a voltage that causes said FET to conduct and consume the current that normally charges said battery cell; e) terminate the application of said square wave to said series capacitor whenever the output voltage is not within said threshold; and f) allow said shunt capacitor discharge via said shunt resistor and cause said FET to stop conducting, to thereby return to measuring the voltage generated across the predetermined resistor with respect to ground.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0068] The above and other characteristics and advantages of the invention will be better understood through the following illustrative and non-limitative detailed description of preferred embodiments thereof, with reference to the appended drawings, wherein:

[0069] FIG. 1 (prior art) shows am array of n serially connected batteries with output voltages V.sub.1,....,Vn, respectively;

[0070] FIG. 2 (prior art) illustrates a circuitry for equalizing the charge among an array of serially connected batteries;

[0071] FIG. 3 (prior art) illustrates another circuitry for monitoring the charging level of an array of serially connected batteries;

[0072] FIG. 4 illustrates a circuitry for monitoring the charging level of a single battery in an array of serially connected batteries, according to an embodiment of the invention;

[0073] FIG. 5 illustrates a circuitry for monitoring the charging level of an array of serially connected batteries, according to an embodiment of the invention;

[0074] FIG. 6 illustrates the implementation of the circuitry of FIG. 4;

[0075] FIG. 7 illustrates the same implementation of the circuitry of FIG. 6, using actual components;

[0076] FIG. 8 shows the connection of multiple packages for measuring groups of 4 battery cells, while each time, taking the lower supply voltage from one battery cell below the measured group;

[0077] FIG. 9 (prior art) illustrates a typical current discharge circuitry, for preventing overcharging of a battery cell;

[0078] FIGS. 10A-10B illustrate a current discharge circuitry for preventing overcharging of a battery cell, according to the invention; and

[0079] FIG. 11 illustrates a simplified equivalent model of the switched capacitor converter gate drive circuit 102, according to an embodiment of the invention.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

[0080] The present invention proposes a system and method for controlling the charging level of a bank of serially connected batteries and performing equalization of the charges of the batteries.

[0081] FIG. 1 (prior art) shows an array of n serially connected batteries with output voltages V.sub.1,....,Vn, respectively. The total output voltage of the array is V.sub.B=V.sub.1+......+Vn. A proper operation of the array is when all connected batteries are essentially equally charged, in order to prevent a situation when due to different manufacturing parameters and aging, some batteries will not be sufficiently charged and other batteries will be overcharged. FIG. 2 (prior art) illustrates a circuitry for equalizing the charge among an array of 12 serially connected batteries. The circuitry measures the output voltage of each battery during charging, and if the output voltage of one of the batteries reached its upper limit, the circuit stops charging it with the same current. Instead, the current is routed into a resistor, which dissipates the power. For example, If the upper battery is fully charged, transistor Qn is switched on and most of the current is directed into resistor Rn. However, this circuitry is expensive as it contains DACs, a multiplexer and associated processing hardware.

[0082] FIG. 3 (prior art) illustrates another circuitry for monitoring the charging level of an array of serially connected batteries. The voltage across each battery is measured and input into a differential amplifier 301, in order to obtain the output voltage Vout of the battery at the output of the differential amplifier. However, the voltages at the ports of the upper batteries may be very high (up to 800 V in electric cars as of 2020) with respect to ground, which requires using a high attenuation voltage dividers (R1/R2=R4/R3 must be large) to decrease the voltages before processed by the operational amplifier 301. This deteriorates the accuracy of the measurement of the actual voltage across each measured battery cell. For example: if the accuracy of the resistors is 0.1% and if R1/R2 is 100 then, due to the mismatch of the resistor the error in measurement will be about 20%.

[0083] FIG. 4 illustrates a circuitry for monitoring the charging level of a single battery in an array of serially connected batteries, according to an embodiment of the invention.

[0084] The array of serially connected battery cells has a lower most cell (Cell.sub.1) connected to ground and an uppermost cell (Cell.sub.n) connected to one port of a load. The other port of the load is connected to ground, such that the summed voltage V.sub.B of all cells (1,....,n) feeds the load.

[0085] In this case, the proposed circuitry is generic for all battery cells, regardless their voltage level with respect to ground. The circuitry consists of a voltage to current converter 401 that outputs current I which is proportional to the battery cell voltage Vs. By using a resistor Ro to ground, the output voltage Vo can be used to know the voltage Vs. If I=Ks.Math.Vs, then Vo=Ks.Math.Ro.Math.Vs.

[0086] The circuitry comprises a control circuit (not shown), which is adapted to measure the voltage generated across the predetermined resistor R.sub.0 with respect to ground, determine whether or not the selected battery cell (Cell.sub.S) is fully charged according to the difference between the measured voltage and a predetermined threshold voltage. This measurement process is repeated by the controller for additional battery cells of said bank.

[0087] FIG. 5 illustrates a circuitry for monitoring the charging level of an array of serially connected batteries, according to an embodiment of the invention. The circuitry consists of n current converters 401, one for each battery cell. The output voltages are forwarded to a multiplexer 402 and then to a processor 403 which outputs the voltages of all battery cells.

[0088] FIG. 6 illustrates a possible implementation of the circuitry of FIG. 4 above. The circuitry comprises an operational amplifier 601 which feeds a p-channel FET Q1, which is suitable to operate in high voltage levels (e.g., 500 V) and the power supply voltages to feed DC power to the operational amplifier 601 are taken from the neighboring batteries. One port of the measured battery is connected via a resistor Rs to the source of Q1 and the other port to one input of operational amplifier 601. A feedback line 602 is connected between the source of Q1 and the other input of operational amplifier 601. As a result, the current flowing through resistor Ro is proportional to the battery cell voltage Vs.

[0089] FIG. 7 illustrates the same implementation of the circuitry of FIG. 6 but using actual components. The battery voltage to be measured is V1. During normal operation, the voltage between the inputs of the operational amplifier U1 is practically zero and therefore, the voltage across resistor R2 will be identical to the battery voltage V1. Therefore, the current flowing through MOSFET U2 will be I=V1/R2 and Vout=V1.Math.R4/R2. Operational amplifier U1 keeps the current flowing via R2 very accurate (and deviation will be compensated by U1). If R4 and R2 are selected to be equal, R4=R2, then Vout=V1. Since there are only two resistors involved, and no high ratio divider is required, the error will be very small and depends primarily on the offset voltage of amplifier and input current bias. The expected accuracy with common operational amplifiers will thus be very high (down to ±10 mV error) and independent of the cell position in the array. Such high accuracy must be obtained to evaluate the state of charge of batteries cells, such as Lithium Ion cells.

[0090] Generally, common mode voltage of the operational amplifier U1 should not be close to the voltages of its upper and lower DC supply, in order to prevent errors that may arise. This problem, may be overcome by taking the lower supply to operational amplifier U1 from one battery lower (in this example, from battery cell V5 rather that V4). The measurement of V4 can be made during the next group, in which V4 will be the upper battery cell. A package of 4 operational amplifier U1 is an off the shelf product. This way, the combination of such package with 4 corresponding MOSFETs U2 allows measuring groups of 4 battery cells.

[0091] FIG. 8 shows the connection of multiple packages for measuring groups of 4 battery cells, with a four operational amplifiers per package while each time, taking the lower supply voltage from one battery cell below the measured group. The remaining lowest battery cell C.sub.1 can be measured directly, since its lower voltage is grounded.

[0092] FIG. 9 (prior art) illustrates a typical current discharge circuitry, for preventing overcharging of a battery cell. After monitoring its voltage, the discharge circuit does not allow a charged battery cell to be further charged by full current. Discharge is allowed by a p-channel MOSFET Q2 which is controlled by another transistor Q1 connected between the gate of Q2 (via a resistor R.sub.D) and ground. Upon discharge, Q2 conducts and the current intended to charge the battery cell is directed to resistor R.sub.L where it is dissipated. Or, in no-charge mode, the current discharge (bleeder) circuit can partially discharge a cell as might be required for equalization. The disadvantage of this prior art circuitry is that each cell requires an individual connection via Q.sub.1 for discharge. Another disadvantage is that it required a p-channel MOSFET which is more expensive and has larger conduction resistance

[0093] FIGS. 10A-10B illustrate a current discharge circuitry for preventing overcharging of a battery cell, according to the invention. This implementation uses an n-channel MOSFET and the same connections used for monitoring the voltage of a measured battery cell is also used for controlling the discharge for that battery cell.

[0094] The circuit comprises a transistor Q10 which applies short-circuit on resistor Rb in a predetermined rate using a square wave. Resistor Ra is fed by a current source 101 and when transistor Q10 is not conducting, the voltage at the output port of current source 101 is I.Math.(Ra+Rb) and when transistor Q10 is conducting (i.e., Rb=0 as it is short-circuited), the voltage at the output port of current source 101 is I.Math.Ra. As a result, the voltage at the output port of current source 101 is also a square wave with similar characteristics as the input voltage applied to the gate of Q10 (except for a DC level of I.Math.Ra). The circuit 102 actually functions as a switched capacitor converter gate driver. The resulting square wave at the output port of current source 101 charges and discharges the capacitor C1, as a function of the low and high voltages of the applied square wave at the output port of current source 101. When the voltage at the output port of current source 101 is low, the capacitor C1 discharges via route 103 (resistor Ra, capacitor Cg) and diode D2, as shown in FIG. 10A. This results in zero voltage at the gate of Q11. When the voltage at the output port of current source 101 is high, the capacitor C1 charges via route 104 (current source 101 and capacitor Cg), as shown in FIG. 10B, such that capacitor Cg is also charged. As a result, as long as the square wave is applied to the gate of Q10, the gate of Q11 is held at higher voltage and conducts, such that the current intended to charge battery cell Vn is routed away to prevent Vn from being overcharged. Upon terminating the discharge period, the square wave applied to the gate of Q10 is stopped, capacitor Cg discharges via resistor Rg, until the gate of Q11 remains at low voltage and Q11 stops conducting. At this stage, the circuit returns back to monitoring mode, where the voltage Vo accurately reflects the voltage across the monitored battery cell Vn.

[0095] FIG. 11 illustrates a simplified equivalent model of the switched capacitor converter gate driver circuit 102, according to an embodiment of the invention. A square wave at the output port of current source (i.e., the input port of capacitor C1) charges the capacitor Cg via capacitor C1, the gate of Q11 is held at higher voltage and conducts, such that the current intended to charge battery cell Vn is routed away to prevent Vn from being overcharged. When the voltage at the output port of current source 101 is low, the capacitor C1 discharges via Ra and the forward diode of Zener Dz1.Upon terminating of the discharge period, the square wave applied to the gate of Q10 is stopped, capacitor Cg discharges via resistor Rg, until the gate of Q11 remains at low voltage and Q11 stops conducting. At this stage, the circuit returns back to monitoring mode, where the voltage Vo accurately reflects the voltage across the monitored battery cell Vn. The Zener diode D.sub.Z1 (rather than a diode D2 as in FIG. 10A), may optionally be added to protect the gate of Q11 from over voltage.

[0096] The above examples and description have of course been provided only for the purpose of illustrations, and are not intended to limit the invention in any way. As will be appreciated by the skilled person, the invention can be carried out in a great variety of ways, employing more than one technique from those described above, all without exceeding the scope of the invention.