Offset compensation for zero-crossing detection

Abstract

There is described a device for removing an offset from a signal, the device comprising (a) a frequency estimation unit (260) for estimating a frequency of the signal, (b) an offset estimation unit (222) for estimating the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the frequency of the signal estimated by the frequency estimation unit (260), and (c) a subtraction unit (230) adapted to subtract the offset estimated by the offset estimation unit (222) from the signal. There is also described a filter unit comprising the device. Furthermore, there is described a corresponding method of removing an offset from a signal as well as a computer program and a computer program product for performing the method by means of a computer.

Claims

1. A device for removing an offset from a signal outputted by a sensor, the device comprising an output port of a comparator unit; a frequency estimation unit configured to estimate a frequency of the signal; an offset estimation unit configured to estimate the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the frequency of the signal estimated by the frequency estimation unit, wherein an input to the frequency estimation unit is coupled to the output port and an output of the frequency estimation unit is inputted to the adaptive low pass filter; and a subtraction unit adapted to subtract the offset estimated by the offset estimation unit from the signal wherein an input to the adaptive low pass filter is coupled to a first input to the subtraction unit and an output of the adaptive low pass filter is inputted to a second input to the subtraction unit and an output of the subtraction unit is coupled to the output port.

2. The device according to claim 1, wherein the offset estimation unit is adapted to set the cut-off frequency of the adaptive low-pass filter to the frequency of the signal estimated by the frequency estimation unit divided by a constant k.

3. The device according to claim 1, wherein the comparator unit is coupled to an output of the subtraction unit and is adapted to generate a rectangular wave alternating between a positive value and a negative value in dependency on the sign of the signal received from the subtraction unit.

4. The device according to claim 3, wherein the frequency estimation unit is adapted to estimate the frequency of the signal by measuring a pulse width of the rectangular wave generated by the comparator unit.

5. The device according to claim 1, wherein the frequency estimation unit comprises an internal clock adapted to generate a clock signal having a predetermined clock frequency fcik, and wherein the frequency estimation unit is adapted to measure a pulse width of a rectangular wave generated by the comparator unit by counting the number of clock pulses M of an internal clock signal during a pulse of the rectangular wave generated by the comparator unit.

6. The device according to claim 1, wherein the frequency estimation unit is adapted to estimate the frequency of the signal as f.sub.clk/(2*M).

7. The device according to claim 5, wherein the frequency estimation unit is adapted to set an initial value of the estimated frequency to equal a predetermined maximum frequency of the signal.

8. A magnetic sensor unit, comprising a magnetic sensor adapted to generate a sensor output signal in response to an external magnetic field, and a device according to claim 1, the device being adapted to receive the sensor output signal generated by the magnetic sensor and to remove an offset from the sensor output signal.

9. A method of removing an offset from a signal outputted by a sensor, the method comprising estimating, by using a frequency estimation unit, a frequency of the signal at an output port of a comparator unit; estimating, by using an offset estimation unit, the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the estimated frequency derived at the output port, of the signal; and subtracting, by using a subtracting unit, the estimated offset from the signal and outputting the subtracted signal to the output port, wherein an input to the adaptive low pass filter is coupled to a first input to the subtracting unit and an output of the adaptive low pass filter is coupled to a second input the subtracting unit.

10. A non-transitory computer readable media comprising computer executable instructions which when executed by a computer causes the computer to perform the steps of the method according to claim 9.

11. A device for removing an offset from a signal outputted by a sensor, the device comprising a frequency estimation unit configured to estimate a frequency of the signal; an offset estimation unit configured to estimate the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the frequency of the signal estimated by the frequency estimation unit; a subtraction unit adapted to subtract the offset estimated by the offset estimation unit from the signal; and a comparator unit, wherein the comparator unit is coupled to an output of the subtraction unit and is adapted to generate a rectangular wave alternating between a positive value and a negative value in dependency on the sign of the signal received from the subtraction unit.

12. The device according to claim 11, wherein the offset estimation unit is adapted to set the cut-off frequency of the adaptive low-pass filter to the frequency of the signal estimated by the frequency estimation unit divided by a constant k.

13. The device according to claim 11, wherein the frequency estimation unit is adapted to estimate the frequency of the signal by measuring a pulse width of the rectangular wave generated by the comparator unit.

14. The device according to claim 11, wherein the frequency estimation unit comprises an internal clock adapted to generate a clock signal having a predetermined clock frequency f.sub.clk, and wherein the frequency estimation unit is adapted to measure the pulse width of the rectangular wave generated by the comparator unit by counting the number of clock pulses M of the internal clock signal during a pulse of the rectangular wave generated by the comparator unit.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) FIG. 1 shows a circuit diagram of a sensor unit with non-adaptive offset compensation for comparison with embodiments of the present invention.

(2) FIG. 2 shows a circuit diagram of a sensor unit with adaptive offset compensation in accordance with an embodiment.

(3) FIG. 3 shows exemplary waveforms relating to offset compensation in accordance with the embodiment shown in FIG. 2.

DETAILED DESCRIPTION

(4) The illustration in the drawing is schematic. It is noted that, unless otherwise indicated, similar or identical elements in different figures are provided with the same reference signs or with reference signs, which differ only within the first digit.

(5) FIG. 1 shows a circuit diagram of a sensor unit 101 with non-adaptive offset compensation for comparison with embodiments of the present invention. Before describing an embodiment of the present invention, a discussion of the sensor unit 101 will be given as background information.

(6) The sensor unit 101 comprises a magnetic sensor 110, a low pass filter 120, a subtraction unit 130, and a comparator 140. As shown in FIG. 1, the direct output 115 from the magnetic sensor 110 is fed to the low pass filter 120 and to the subtraction unit 130. The low pass filter 120 is designed to filter out the time-varying part of the sensor output signal 115 and to forward a corresponding offset estimate 125 to the subtraction unit 130. The subtraction unit 130 subtracts the offset estimate 125 from the sensor output signal 115 and provides a corresponding offset compensated sensor signal 135 to the comparator 140. The comparator 140 generates an output signal 150 having a rectangular waveform which takes on a constant positive value as long as the offset compensated sensor signal 135 is positive and a corresponding negative value as long as the offset compensated sensor signal 135 is negative.

(7) Now, the design of the low pass filter 120 is described. Assuming that the system 101 is working in the steady state and that the low pass filter 120 is a first-order filter with pole at frequency .sub.p, the sensor signal 115 s(t) and the offset estimate 125 V.sub.OS,est(t) can be written as:
s(t)=A sin(2t+)+V.sub.OS
V.sub.OS,est(t)=A sin(2t++)+V.sub.OS

(8) where A is the amplitude of the sensor signal 115, is the frequency of the sensor signal 115, is the phase of the sensor signal 115, V.sub.OS is the sensor offset, is the attenuation of the filter 120 and is the phase-shift of the filter 120. The two latter are given by

(9) $={\left[1+{\left(\frac{f}{f_p}\right)}^2\right]}^{-0.5},=-{\tan }^{-1}\left(\frac{f}{f_p}\right)$

(10) where f.sub.p is the pole frequency of the filter 120.

(11) The error on the zero-crossing can be found by imposing V.sub.OS,est(t)=s(t). In a typical application, the error e is often expressed as a fraction of the signal period T, i.e.

(12) $e=\frac{t}{T}=\frac{1}{2}{\tan }^{-1}\left(\frac{\sin }{1-\cos }\right)$

(13) From this, e.g. by plotting the relative error e (not shown), it can be found that the pole frequency .sub.p of the filter 120 must be a factor k lower than the signal frequency in order to limit the error, i.e.

(14) $f_p<\frac{1}{k}f$

(15) In this way, it can for example be derived that the absolute error |e|<1% for k>16.

(16) The abovementioned limitation for .sub.p ensures that the system 101 shows a low error on zero-crossing detection at steady state. However, when starting up the system, an additional source of error comes from the settling of the filter. Under the approximation that the filter 120 attenuates the AC component down to a negligible level (i.e. the filter 120 is sized as previously described), the settling can be approximated as an exponential settling during which the offset estimation of the system 101 in FIG. 1 has a large error. An error in the offset estimation would result in an output rectangular waveform with a duty-cycle different from 50% (which would be obtained when slicing s(t) with an ideal threshold equal to V.sub.OS). An error in duty-cycle lower than DC is obtained if:
|V.sub.OS,est(t)V.sub.OS|=|V.sub.OS,est(0)V.sub.OS|e.sup.t/<A sin(2.Math.DC)

(17) where is the time constant of the filter 120. The required settling time would then be:

(18) $t_{\mathrm{settle}}=\frac{1}{2f_p}\ln \frac{.Math.V_{\mathrm{OS},\mathrm{est}}\left(0\right)-V_{\mathrm{OS}}.Math.}{A\sin \left(2.Math.\mathrm{DC}\right)}\frac{1}{2f_p}\ln \frac{1}{\sin \left(2.Math.\mathrm{DC}\right)}=t_{\mathrm{settle},\max }$

(19) The last inequality holds if the initial state of the filter is set so that V.sub.OS,est(0)=s(0), i.e. by assuming the value of the signal at start-up as initial offset estimate. Note that under this assumption the worst case settling can be obtained for example for an initial signal phase of =/2.

(20) To compute the worst-case settling time, it should be considered that the system 101 must work over a specified range of input signal frequency, from .sub.min to .sub.max. The upper bound for the pole of the filter is fixed by the minimum frequency, i.e.

(21) $f_p<\frac{1}{k}{f}_{\min }$

(22) The maximum number of signal cycles N.sub.max that are required for proper settling (for a fixed duty-cycle error) is instead determined by the maximum frequency:

(23) $N_{\max }=f_{\max }{t}_{\mathrm{settle},\max }=\frac{f_{\max }}{2f_p}\ln \frac{1}{\sin \left(2.Math.\mathrm{DC}\right)}>\frac{f_{\max }}{f_{\min }}\frac{k}{2}\ln \frac{1}{\sin \left(2.Math.\mathrm{DC}\right)}$

(24) With typical parameters (e<1%, DC<10%, .sub.max/.sub.min>1000), N.sub.max>1350.

(25) Thus, if a wide range of input signal frequencies must be accommodated, a large number of cycles are required for settling in the worst case. In many applications, N.sub.max is not even allowed to be more than 1, such that the system 101 cannot be used. However, the present invention provides a solution to this problem as described in terms of the following embodiment.

(26) FIG. 2 shows a circuit diagram of a sensor unit 202 with adaptive offset compensation in accordance with an embodiment.

(27) The sensor unit 202 comprises a sensor 210, a subtraction unit 230 and a comparator 240 respectively corresponding to the sensor 110, the subtraction unit 130 and the comparator 140 of the sensor unit 101 shown in FIG. 1 and discussed above. However, instead of the low pass filter 120 shown in FIG. 1, the sensor unit 202 comprises a linear adaptive low pass filter 222 with adaptive bandwidth (adaptive cut-off frequency or pole frequency). Furthermore, the sensor unit 202 comprises a frequency estimation unit 260 coupled to estimate the frequency of the output signal 250 from the comparator 240 and to feed the estimated frequency 265 to the adaptive low pass filter 222. The adaptive low pass filter 222 dynamically adapts its bandwidth in dependency on the received estimated frequency 265 and, like in the sensor unit 101 discussed above and shown in FIG. 1, feeds an estimated offset 225 to the subtraction unit 230.

(28) At start-up, the output of the adaptive filter 222 is initialized to the value of the signal 215 at start-up. In other words, the offset estimate 225 is initialized to the value of the signal 215 at start-up. Since the offset superimposed on the time-varying signal can be even larger than the amplitude of the time-varying signal itself, this ensures that at start-up the error in offset estimation is limited to less than the signal amplitude.

(29) The bandwidth of the low-pass filter 222 is estimated as follows: The frequency estimation unit 260 comprises an internal clock signal generator (not shown) with predetermined frequency .sub.clk. Furthermore, the frequency estimation unit 260 comprises processor and memory (not shown) for handling two internal variables labeled N and M that are used to count and store an estimation of the duration of a half cycle of the output signal 250 in terms of internal clock cycles.

(30) At start-up, N is initialized to

(31) $N_{\mathrm{start}}=.Math.\frac{f_{\mathrm{clk}}}{2f_{\max }}.Math..$

(32) Then, after each cycle of the internal clock signal, N is incremented by 1 if the sign of the output signal 250 has not changed during the cycle. Otherwise, i.e. if the sign of the output signal 250 has changed during the cycle, N is reset to 1. Also, if the sign of the output signal 250 has not changed during the cycle and NM, M is left unchanged. Otherwise, if the sign of the output signal 250 has not changed during the cycle but N>M, M is set equal to N. Similarly, if the sign of the output signal 250 has changed during the cycle, M is set equal to N (irrespectively of the current values of N and M).

(33) At any time, i.e. after each cycle of the internal clock signal, the estimated frequency 265 is set to f.sub.est=f.sub.clk/(2*M). Then, upon receiving the estimated frequency 265, the adaptive filter 222 dynamically adjusts its bandwidth (i.e. cut-off frequency) to .sub.est/k, where the constant k is selected in line with the above discussion of the same with regard to the non-adaptive case shown in FIG. 1.

(34) It is noted that the above described embodiment may be varied in various ways as required by specific implementation requirements. For example, the frequency estimation unit 260 may, instead of outputting an estimated frequency 265 to the adaptive filter 222 as described above, directly output the bandwidth .sub.est/k to the adaptive filter 222 such that the latter does not have to perform the corresponding calculation.

(35) FIG. 3 shows exemplary (simulated) waveforms relating to offset compensation in accordance with the embodiment shown in FIG. 2 and discussed above, where the frequency of the sensor signal is =10 kHz, k=17, the internal clock frequency is .sub.clk=1 MHz, and the maximum frequency .sub.max=10 kHz. More specifically, the first (i.e. the upper) graph a) of FIG. 3 shows the sensor signal 215 (solid curve) and the offset estimate 225 (dashed curve) as functions of time. As can be seen, the sensor signal 215 oscillates between the values 1 and 3 and thus has an actual offset of 2. The offset estimate 225 starts at the value 3 and converges rapidly (within 6-7 cycles) towards the actual offset. The second graph b) shows the variables N (solid curve) and M (dashed curve) as functions of time. As shown, both N and M starts at the value .sub.clk/(2*.sub.max)=50. After the first internal clock cycle, N is decreased to one as the sign of the signal 250 (i.e. the sensor signal 215 minus the offset estimate 225) has changed to negative. Thereafter, N is increased by one after each internal clock cycle while M keeps the initial value 50. Once N exceeds 50, M follows the value of N. When the sign of the signal 250 changes to positive, M maintains its last value and N is reset to 1, and so on. The third graph c) shows the estimated bandwidth (cut-off frequency) f.sub.est/k as a function of time. As can be seen, the estimated bandwidth converges toward a stable value with approximately the same speed as the offset estimate sown in graph a) of FIG. 3. The fourth graph d) shows the ideal output signal (solid curve) of the sensor unit 202 and the actual output signal 250 (dashed curve) as functions of time. As can be seen, the output signal 250 (dashed) closely resembles the ideal output once the offset estimate 225 shown in graph a) of FIG. 3 gets close to the actual offset value 2. Finally, the last (fifth) graph e) shows the zero-crossing error in % as a function of time. This curve confirms the above statement with regard to the resemblance between the actual output signal 250 and the ideal output.

(36) In the simulation illustrated in FIG. 3 and discussed above, the starting value for the bandwidth estimate is equal to .sub.max/k=588 Hz. The steady-state frequency cut-off value is proportional to the signal frequency and equal to /k. Thus, in the illustrated simulation the steady state frequency value is equal to the starting value, i.e. 588 Hz. The final error on the zero-crossing detection is around 1%, as predicted above in conjunction with FIG. 1, for a ratio of 17 between the signal frequency and the filter frequency.

(37) Further simulations for other signal frequencies (below 10 kHz) have shown similar behaviour, i.e. that the steady-state is reached in approximately six cycles of the input signal. In case of a fixed-bandwidth system with similar performance, the settling time would (as discussed above in conjunction with FIG. 1) have been more than 1000 cycles for a signal at maximum frequency.

(38) It should be noted that the term comprising does not exclude other elements or steps and that the use of the articles a or an does not exclude a plurality. Also elements described in association with different embodiments may be combined. It should also be noted that reference signs in the claims should not be construed as limiting the scope of the claims.