Weighted memory polynomial method and system for power amplifiers predistortion

Abstract

A system and method for linearizing a power amplifier using digital predistortion technique is provided including processing circuitry, the processing circuitry configured to apply a digital predistortion function based on a weighted static polynomial function, a weighted dynamic polynomial function and a threshold parameter which splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate.

Claims

1. A method for linearizing a power amplifier having a memory effect with a system for linearizing a power amplifier through digital predistortion, comprising: inputting an input signal sample, predistorting the input signal sample to generate a first and a second intermediate predistorted signal samples, combining the first and the second intermediate predistorted signal samples to obtain an output signal, wherein the inputting, predistorting and combining are performed on an amplifier containing processing circuitry configured to: obtain the input signal sample that depends on an input signal to the power amplifier; predisort the input signal sample using a static weight function to generate the first intermediate predistorted signal sample; predistort the same input signal sample using a dynamic weight function to generate the second intermediate predistorted signal sample; combine additively the first intermediate predistorted signal sample and the second intermediate predistorted signal sample together to obtain an output signal sample of the predistorter, wherein the processing circuitry is further configured to determine the output signal sample of the predistorter using: $y_{\mathrm{WMP}}\left(n\right)=\underset{i=0}{\overset{N_s}{.Math.}}{}_i{w}_s\left(.Math.x\left(n\right).Math.,i\right)x\left(n\right){.Math.x\left(n\right).Math.}^i+\underset{i=0}{\overset{N_D}{.Math.}}\underset{j=1}{\overset{M}{.Math.}}{}_{\mathrm{ij}}{w}_D\left(.Math.x\left(n\right).Math.,i,j\right)x\left(n-j\right){.Math.x\left(n-j\right).Math.}^i$ wherein y.sub.WMP(n) and x(n) are output and input baseband complex samples, respectively, .sub.i and .sub.ij are coefficients of the static and dynamic functions of the weighted memory polynomial predistorter, respectively, M is the memory depth of the model, N.sub.S and N.sub.D are nonlinearity order of the static and dynamic parts of the predistorter, respectively, and w.sub.S (|x(n)|,i) and w.sub.D(|x(n)|,i,j) are the weight functions applied on the static and dynamic terms of the predistorter, respectively.

2. The method of claim 1, wherein the processing circuitry is further configured to determine the static weight polynomial function using: $w_s\left(.Math.x\left(n\right).Math.,i\right)=\frac{1}{2}\left(\tanh \left(-F\left(i\right).Math.\left(1-\frac{.Math.x\left(n\right).Math.}{{.Math.x.Math.}_{\mathrm{th}}}\right)\right)+1\right)$ wherein tan h is the hyperbolic tangent function, x(n) is the input baseband complex sample, |x|.sub.th is a device dependent threshold value used to separate between the region where the static nonlinearity predominates from that where the dynamic distortions predominate, and F(i) is proportional to the nonlinearity order (i).

3. The method of claim 2, wherein the function F(i) is defined according to:
F(i)=i wherein i is a nonlinearity order.

4. The method of claim 1, wherein the processing circuitry further configured to determine the dynamic weight function using: $w_D\left(.Math.x\left(n\right).Math.,i,j\right)=\frac{1}{2}\left(\tanh \left(G\left(i,j\right).Math.\left(1-\frac{.Math.x\left(n\right).Math.}{{.Math.x.Math.}_{\mathrm{th}}}\right)\right)+1\right)$ wherein tan h is a hyperbolic tangent function, x(n) is the input baseband complex sample and |x|.sub.th is a device dependent threshold value used to separate between the region where the static nonlinearity predominates from that where the dynamic distortions predominate, G(i,j) takes into account the decaying memory effects intensity for further memory indices and the fact that memory effects are mainly linear.

5. The method of claim 4, wherein the function G (i, j) is defined according to: $G\left(i,j\right)=\frac{1}{j^2.Math.i}$ wherein i is a nonlinearity order, and j is a given memory depth.

6. The method of claim 1, wherein the threshold parameter |x|.sub.th splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The characteristics and advantages of an exemplary embodiment are set out in more detail in the following description, made with reference to the accompanying drawings.

(2) FIG. 1 illustrates a simplified block diagram of a wireless transmitter in which a digital predistorter is used to linearize the RF power amplifier;

(3) FIG. 2 shows a schematic diagram of the disclosed digital predistorter including the weighted static polynomial function and the weighted dynamic polynomial function;

(4) FIG. 3 shows exemplary magnitudes of the weighting functions applied to the static and dynamic polynomials;

(5) FIG. 4 shows exemplary AM/AM and AM/PM characteristics of a power amplifier, and exemplary probability density function of a communication signal;

(6) FIG. 5 shows exemplary performance of the weighted memory polynomial digital predistortion system as a function of a threshold value;

(7) FIG. 6 shows exemplary digital predistortion performance of a weighted memory polynomial predistorter and a memory polynomial predistorter.

(8) FIG. 7 illustrates predistorted signal calculation process in sequence, by way of flowchart;

(9) FIG. 8 illustrates predistorted signal calculation process, by way of flowchart;

(10) FIG. 9 shows a schematic diagram of an exemplary processing system.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(11) A novel digital predistortion model, method and system of compensating amplifier's dynamic nonlinear distortions that uses an adaptive weight for dynamic and static terms of the conventional MP models, methods and/or systems is disclosed. The disclosed model, method and system find rationale in the dispersion profile of power amplifiers' AM/AM (amplitude distortion) and AM/PM (phase distortion) characteristics which reveal a mildly nonlinear behaviour with strong memory effects at low input power levels and a highly nonlinear behavior with weak memory effects at high input power levels. A 10-Watt Doherty power amplifier excited by a 20 MHz long term evolution (LTE) signal was used for experimental validation. The performance of the new model, method and system is benchmarked against that of the conventional MP model.

(12) The conventional memory polynomial model expresses the baseband complex waveform at the output of the digital predistorter as a power series with memory of the baseband input complex samples. This model represents the diagonal elements of the Volterra series regression matrix (J. Kim and K. Konstantinou, Digital predistortion of wideband signals based on power amplifier model with memory, Electronics Lett., vol. 37, no. 23, pp. 1417-1418, November 2001incorporated herein by reference)

(13) $\begin{array}{cc}{y}_{\mathrm{MP}}\left(n\right)=\underset{i=0}{\overset{N}{.Math.}}\underset{j=0}{\overset{M}{.Math.}}{a}_{\mathrm{ij}}x\left(n-j\right){.Math.x\left(n-j\right).Math.}^i& \left(1\right)\end{array}$
where y.sub.MP(n) is the complex baseband output sample and x(n) its input counterpart. M, N, and a.sub.ij are the memory depth, the nonlinearity order, and the coefficients of the predistorter, respectively.

(14) The disclosed model, method and system split the memory polynomial model into a static part and a dynamic part and introduces a weight function on the MP model coefficients that will distinguishably act on the input samples based on their power levels. Accordingly, the proposed WMP model, method and system are formulated as:

(15) $\begin{array}{cc}{y}_{\mathrm{WMP}}\left(n\right)=\underset{i=0}{\overset{N_s}{.Math.}}{}_i{w}_s\left(.Math.x\left(n\right).Math.,i\right)x\left(n\right){.Math.x\left(n\right).Math.}^i+\underset{i=0}{\overset{N_D}{.Math.}}\underset{j=1}{\overset{M}{.Math.}}{}_{\mathrm{ij}}{w}_D\left(.Math.x\left(n\right).Math.,i,j\right)x\left(n-j\right){.Math.x\left(n-j\right).Math.}^i& \left(2\right)\end{array}$
where y.sub.WMP(n) and x(n) are the output and input baseband complex samples, respectively, .sub.i and .sub.ij are the coefficients of the static and dynamic terms of the weighted memory polynomial model, respectively, M is the memory depth of the model, N.sub.S and N.sub.D refer to the nonlinearity order of the static and dynamic parts of the WMP model, respectively, and w.sub.S(|x(n)|,i) and w.sub.D(|x(n)|,i,j) are the weight functions applied on the static and dynamic terms of the WMP model, respectively.

(16) For samples having low input power levels, which will fall within the linear region of the PA, the static terms weight function w.sub.S(|x(n)|,i) is applied to decrease the contribution of high order static nonlinear terms, and the dynamic terms weight function w.sub.D(|x(n)|,i,j) is applied to increase the impact of the dynamic terms. Conversely, as the input power level increases, w.sub.S(|x(n)|,i) will confer an increasing influence to high order static nonlinear terms, and w.sub.D(|x(n)|,i,j) will decrease the impact of the dynamic terms.

(17) The static weight function is a hyperbolic tangent function applied to the static function terms of the memory polynomial model. The hyperbolic static weight function gives an increasing weight to the nonlinear static terms as the instantaneous input power increases, and its value is proportional to the nonlinearity order. The static weight function is defined as:

(18) $\begin{array}{cc}{w}_s\left(.Math.x\left(n\right).Math.,i\right)=\frac{1}{2}\left(\tanh \left(-F\left(i\right).Math.\left(1-\frac{.Math.x\left(n\right).Math.}{{.Math.x.Math.}_{\mathrm{th}}}\right)\right)+1\right)& \left(3\right)\end{array}$

(19) where |x|.sub.th is a device dependent threshold value used to separate between the region where the static nonlinearity predominates from that where the dynamic distortions predominate. The function F(i) is proportional to the nonlinearity order (i). One alternative is to define the function F(i) according to:
F(i)=i(4)

(20) The dynamic weight function is a hyperbolic tangent function applied to the dynamic terms of the conventional memory polynomial model. Dynamic terms are given a decreasing weight as the instantaneous input power increases. The value of the dynamic weight function is inversely proportional to memory depth and nonlinearity order. The dynamic weight function is given by:

(21) $\begin{array}{cc}{w}_D\left(.Math.x\left(n\right).Math.,i,j\right)=\frac{1}{2}\left(\tanh \left(G\left(i,j\right).Math.\left(1-\frac{.Math.x\left(n\right).Math.}{{.Math.x.Math.}_{\mathrm{th}}}\right)\right)+1\right)& \left(5\right)\end{array}$

(22) The function G(i,j) takes into account the decaying memory effects intensity for further memory indices and the fact that memory effects are mainly linear. On possible formulation of the function G(i,j) is:

(23) $\begin{array}{cc}G\left(i,j\right)=\frac{1}{j^2.Math.i}& \left(6\right)\end{array}$

(24) The threshold parameter splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate. The static nonlinearity predominates for input power levels beyond the threshold value, and the dynamic distortions predominate for power levels below the threshold value.

(25) Referring to FIG. 1, a block diagram 100 describing the proposed method for linearizing the power amplifier 103 through predistortion of the input signal 104 is shown. The digital predistortion unit 101 acts on the baseband digital input signal 104 to obtain the predistorted baseband digital signal 105. This predistorted digital signal is converted to analog and then up-converted by the digital to analog conversion & frequency up-conversion module 102 to obtain the RF signal that will be applied to the power amplifier 103.

(26) A copy of signal at the output of the power amplifier 103 is down-converted and digitized using the module 106 to obtain the corresponding baseband complex signal. This signal, the predistorter's input signal 104, and the predistorter's output signal 105 are applied to the DPD update module 107 to calculate the DPD coefficients 108 (.sub.i and .sub.ij) that will be used in the digital predistortion unit 101.

(27) The digital predistortion unit 101 implementing the disclosed weighted memory polynomial function is detailed in FIG. 2. The input signal 104 is applied at the input of the weighted static polynomial function 110 to obtain the first intermediate predistorted signal (y.sub.SWMP) 111. The input signal 104 is also applied at the input of the weighted dynamic memory polynomial function 120 to obtain the second intermediate predistorted signal (y.sub.DWMP) 121. The intermediate predistorted signals 111 and 121 are summed in 130 to obtain the predistorter output signal 105.

(28) In FIG. 3, the plot of the magnitude of the static weight function is shown in 301 and the plot of the magnitude of the dynamic weight function is shown in 302. In 301 and 302, the magnitudes of the weight functions are reported as a function of the input magnitude normalized with respect to the maximum input magnitude (|x|.sub.max). This figure, obtained for |x.sub.th|=0.65|x|.sub.max, clearly illustrates the effects of the weight functions as described above. Indeed, the magnitude of the static terms' weight function w.sub.s increases with the magnitude of the input signal as well as the nonlinearity order i. Conversely, for given values of i and j, the magnitude of the dynamic terms' weight function w.sub.D decreases when the amplifier is driven into its nonlinear region. Furthermore, at constant input power, and for given memory depth j, dynamic weight functions corresponding to low nonlinearity order have a more significant impact since memory effects are mainly linear. Moreover, at constant input power, and for given nonlinearity order i, dynamic weight functions have a decaying magnitude with respect to the memory depth. It is worth mentioning that the shape of these functions can be controlled by the choice of |x.sub.th| as well as the dependency of the weight functions on i and j. Typically, the values of |x.sub.th| is chosen in the vicinity of the 1 dB compression point of the device under test.

(29) For the experimental validation, a 10-Watt gallium nitride (GaN) Doherty power amplifier driven by a 4-carrier LTE signal with 1001 carrier configuration and a total bandwidth of 20 MHz was used. The power amplifier was characterized by measuring its instantaneous input and output baseband complex waveforms as described in (F. M. Ghannouchi and O. Hammi, Behavioral modeling and predistortion, IEEE Microw. Mag., vol. 10, no. 7, pp. 52-64, December 2009incorporated herein by reference). The measured waveforms were then processed to cancel the propagation delay. The AM/AM and AM/PM characteristics of the amplifier as well as the probability density function of the test signal are shown in FIG. 4. In the AM/AM characteristic 401 and the AM/PM characteristic 402 significant dispersion is observed at low power levels. The probability density function of the test signal is reported in 403. This figure shows that the large dispersion in the characteristics 401 and 402 is observed for power levels with low probability density function. This dispersion can thus be associated with the memory effects of the DUT and not the presence of high number of samples.

(30) The effects of the threshold parameter |x.sub.th| are investigated in FIG. 5. The plot 500 reports the performance of the weighted memory polynomial function in predicting the desired output signal as a function of the value of |x.sub.th|. This figure shows that there is an optimal value for which the performance are best. This value depends on the power amplifier nonlinearity profile and the drive signal.

(31) First, the MP based digital predistorter was derived for various nonlinearity orders and memory depths. Then, the proposed WMP based digital predistorter was derived for the same set of nonlinearity orders and memory depths. Even though, the proposed WMP predistorter allows for separately selecting the nonlinearity order of the static and dynamic polynomial functions, N.sub.S and N.sub.D were equal during the test. This is to ensure fair comparison with the MP predistorter for which the same nonlinearity order is typically used for all branches. Though, it should be noted that separate optimization of these two orders is an additional feature and advantage of the proposed model.

(32) The predistorters were derived using only a subset of the measurement data (approximately 10% of the samples). The performances of the MP and WMP predistorters were evaluated by measuring the spectra of the signal at the output of the power amplifier before predistortion, after predistortion using the memory polynomial function, and after predistortion using the proposed weighted memory polynomial function. FIG. 6 reports a summary of the obtained results. 601 and 602 are plots of the spectra obtained at the output of the power amplifier before predistortion and after predistortion using memory polynomial and then the weighted memory polynomial functions. In plot 601, both predistorters had the same number of coefficients (15 each). Plot 601 demonstrates the superiority of the proposed predistortion function which leads to better spectrum regrowth cancellation for the same complexity as its MP counterpart. In plot 602, the number of coefficients in the memory polynomial predistorter was increased to minimum needed to ensure similar performance as what was obtained with the 15-coefficients based weighted memory polynomial predistorter. According to 602, the memory polynomial based predistorter requires 28 coefficients to achieve the performance obtained with only 15 coefficients in the case of the weighted memory polynomial predistorter. This experimental validation demonstrates the superiority of the proposed digital predistortion function which reduces by approximately 50% the number of coefficients required to achieve acceptable spectrum regrowth cancellation. This will have a direct impact on the complexity of the digital predistortion identification and update performed in 107.

(33) A novel weighted memory polynomial based predistorter is disclosed for RF power amplifiers linearization. The predistorter model, method and system introduce a weight function on the coefficients of the conventional memory polynomial model. Experimental validation on an LTE Doherty power amplifier demonstrates the superiority of the disclosed model, method and system which can achieve the same performance as its conventional memory polynomial counterpart with up to 50% reduction in the number of coefficients.

(34) The LTE signal was used as an example to illustrate the performance of the disclosed predistorter. The weighted memory polynomial based predistorter can be applied to linearize dynamic nonlinear power amplifiers and transmitters independently of the type and characteristics of their drive signal.

(35) It is understood that the weighted memory polynomial model can also be used for behavioural modelling of dynamic nonlinear power amplifiers and transmitters with consistent advantages compared to the memory polynomial model.

(36) Referring to FIG. 7 a flowchart 700 describing the proposed method in sequence for generating a predistorted signal according to the present invention is shown.

(37) In step 702, processing circuitry obtains an input signal sample of an input signal to the power amplifier;

(38) In step 704, the processing circuitry uses the input signal sample to determine a static weight function and a dynamic weight function;

(39) In step 706, the processing circuitry predistorts the input signal sample using a static weighted polynomial function to generate a first intermediate predistorted signal sample;

(40) In step 708, the processing circuitry predistorts the same input signal sample using a weighted dynamic polynomial function to generate a second intermediate predistorted signal sample; and

(41) In step 710, the processing circuitry combines additively the first intermediate predistorted signal sample and the second intermediate predistorted signal sample together to obtain an output signal sample of the predistorter.

(42) Referring to FIG. 8 a flowchart 800 describing the proposed method for generating a predistorted signal according to the present invention is shown.

(43) In step 802, processing circuitry obtains an input signal sample of an input signal to the power amplifier;

(44) In step 804, the processing circuitry calculates a static weight function;

(45) In step 806, the processing circuitry calculates a dynamic weight function;

(46) In step 808, the processing circuitry predistorts the input signal sample using a static weighted polynomial function to generate a first intermediate predistorted signal sample;

(47) In step 810, the processing circuitry predistorts the same input signal sample using a weighted dynamic polynomial function to generate a second intermediate predistorted signal sample; and

(48) In step 812, the processing circuitry combines additively the first intermediate predistorted signal sample and the second intermediate predistorted signal sample together to obtain an output signal sample of the predistorter.

(49) Next, a hardware description of the device according to exemplary embodiments is described with reference to FIG. 9. In FIG. 9, the device includes a CPU 900 which performs the processes described above. The process data and instructions may be stored in memory 902. These processes and instructions may also be stored on a storage medium disk 904 such as a hard drive (HDD) or portable storage medium or may be stored remotely. Further, the claimed advancements are not limited by the form of the computer-readable media on which the instructions of the inventive process are stored. For example, the instructions may be stored on CDs, DVDs, in FLASH memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk or any other information processing device with which the device communicates, such as a server or computer.

(50) Further, the claimed advancements may be provided as a utility application, background daemon, or component of an operating system, or combination thereof, executing in conjunction with CPU 900 and an operating system such as Microsoft Windows 7, UNIX, Solaris, LINUX, Apple MAC-OS and other systems known to those skilled in the art.

(51) CPU 900 may be a Xenon or Core processor from Intel of America or an Opteron processor from AMD of America, or may be other processor types that would be recognized by one of ordinary skill in the art. Alternatively, the CPU 900 may be implemented on an FPGA, ASIC, PLD or using discrete logic circuits, as one of ordinary skill in the art would recognize. The predistortion can be implemented in the FPGA or the ASIC. Further, CPU 900 may be implemented as multiple processors cooperatively working in parallel to perform the instructions of the inventive processes described above.

(52) The device in FIG. 9 also includes a network controller 906, such as an Intel Ethernet PRO network interface card from Intel Corporation of America, for interfacing with network 99. As can be appreciated, the network 99 can be a public network, such as the Internet, or a private network such as an LAN or WAN network, or any combination thereof and can also include PSTN or ISDN sub-networks. The network 99 can also be wired, such as an Ethernet network, or can be wireless such as a cellular network including EDGE, 3G and 4G wireless cellular systems. The wireless network can also be WiFi, Bluetooth, or any other wireless form of communication that is known.

(53) The device further includes a display controller 908, such as a NVIDIA GeForce GTX or Quadro graphics adaptor from NVIDIA Corporation of America for interfacing with display 910, such as a Hewlett Packard HPL2445w LCD monitor. A general purpose I/O interface 912 interfaces with a keyboard and/or mouse 914 as well as a touch screen panel 916 on or separate from display 910. General purpose I/O interface also connects to a variety of peripherals 918 including printers and scanners, such as an OfficeJet or DeskJet from Hewlett Packard.

(54) A sound controller 920 is also provided in the device, such as Sound Blaster X-Fi Titanium from Creative, to interface with speakers/microphone 922 hereby providing sounds and/or music.

(55) The general purpose storage controller 924 connects the storage medium disk 904 with communication bus 926, which may be an ISA, EISA, VESA, PCI, or similar, for interconnecting all of the components of the device. A description of the general features and functionality of the display 910, keyboard and/or mouse 914, as well as the display controller 908, storage controller 924, network controller 906, sound controller 920, and general purpose I/O interface 912 is omitted herein for brevity as these features are known.

(56) It is to be understood that the present invention is not limited to the embodiments described above, but encompasses any and all embodiments within the scope of the following claims.