Encryption hybrid model SI simulation method based on ADS and HSPICE

Abstract

It is provided an encryption hybrid model SI simulation method based on an ADS and an HSPICE. The method includes: extracting step response data of a TX end chip encryption model by using HSPICE transient simulation; externally generating a random code signal; and taking the extracted step response data and the random code signal as input sources of ADS channel simulation, to realize active simulation to the encryption hybrid model.

Claims

1. An encryption hybrid model signal integrity (SI) simulation method based on an Advance Design System (ADS) and an HSPICE, performed by an SI simulation device, the method comprising: extracting step response data of a transmitter (TX) end chip encryption model by using HSPICE transient simulation; externally generating a random code signal; and performing ADS channel simulation by taking the extracted step response data and the random code signal as input sources of the ADS channel simulation, to realize active simulation to the encryption hybrid model, wherein the HSPICE transient simulation comprises: reserving a model input interface in the TX end chip encryption model; building a wiring model required in a link; connecting the TX end chip encryption model and the wiring model, and providing the connected model in butt joint with a resistor; inputting an ideal step signal at the model input interface reserved in the TX end chip encryption model; and extracting the step response data at a position where the butt joint is provided.

2. The encryption hybrid model SI simulation method based on the ADS and the HSPICE according to claim 1, wherein the step response data is a step response output file with a suffix of and a format of the step response output file is edited to make the step response output file to be a file with a suffix of .tim that is capable of being called by the ADS.

3. The encryption hybrid model SI simulation method based on the ADS and the HSPICE according to claim 1, further comprising: transforming the wiring model into an S parameter for the ADS to call.

4. The encryption hybrid model SI simulation method based on the ADS and the HSPICE according to claim 3, further comprising: transforming the wiring model into an S parameter for the ADS to call.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic view of a simulation link of an encryption hybrid model;

(2) FIG. 2 is a schematic view of butt jointing of a wiring model of an SPICE model; and

(3) FIG. 3 is a schematic view of signal inputting of an RX chip.

DETAILED DESCRIPTION

(4) The embodiments of the present disclosure are described in conjunction with drawings.

(5) A first embodiment

(6) In the present disclosure, step response data of a TX end chip encryption model is extracted by using HSPICE transient simulation.

(7) HSPICE software can be compatible with many major electronics design automation (EDA) tools, such as Cadence and Workview, and can provide many important circuit simulation and design results for integrated circuit performance. The circuit can be accurately simulated, analyzed and optimized in a microwave frequency range from direct current to 100 GHz by using the HSPICE software. In practice, the HSPICE software can provide key circuit simulation and design plan. When the HSPICE software is used to simulate the circuit, a scale of the circuit depends only on an actual memory capacity of the computer of the user.

(8) As illustrated in FIG. 1, TX end chip and RX end chip are simulated by using an SPICE model and an IBIS AMI model respectively. The TX end SPICE model is an RC circuit. A wiring model is a PCB wiring with a length of 5 inches. The TX end SPICE model is an encryption model.

(9) A model input interface is reversed in the TX end SPICE model.

(10) The TX end SPICE model is connected with the 5 inches wiring model. A butt joint resistor with the resistance of 50 ohm is connected to the other end of the wiring model. The wiring model may be transformed into an S parameter for the ADS to call.

(11) After inputting an ideal step signal at the model input interface reversed in the TX end SPICE model, the step response data may be extracted at a position where the butt joint resistor is provided.

(12) The step response data is a step response output file with a suffix of .lis. A format of the file is edited to make the file to be a file with a suffix of .tim that is capable of being called by the ADS.

(13) A random code signal is generated externally. The extracted step response data and the random code signal are taken as input sources of ADS channel simulation, to realize active simulation to the encryption hybrid model.

(14) The method according to the embodiments of the present disclosure can effectively solve the problem that signal integration simulation cannot be accurately performed or cannot be performed because the types of encryption models provided by the manufacturer are not consistent. It is ensured that link quality analysis can be performed according to different types of encryption models. The system design risk can be assessed based on a simulation result and a corresponding improvement can be made, unnecessary time and expense cost are reduced, and design success rate of the system is greatly improved.

(15) Effectiveness of a simulation result of the encryption hybrid model SI simulation based on the HSPICE and ADS transient simulation is verified as follows.

(16) The HSPICE simulation is described hereinafter.

(17) A TX end SPICE model is a normal unencrypted model.

(18) The SPICE model is imported based on an Spice Wizard function of the ADS.

(19) An input interface of the model is reversed to input the step signal outside the model.

(20) A link model is built herein. A 5 inches wiring model is built. Because of different extraction manners of the wiring model in actual projects, the wiring model may be transformed into an S parameter for the ADS to call.

(21) As illustrated in FIG. 2, the imported SPICE model and the 5 inches wiring model are connected. A 50 ohm butt joint resistor is jointed at the end of the link. An ideal step signal is inputted at the input interface reversed in the SPICE model. Amplitude of the signal is determined by characteristics of the chip. Simulation time is set so that step response output can reach a steady state. A simulation time interval is set to guarantee calculation accuracy. Step response data is extracted at a position where the butt joint resistor is provided. The step response data includes the characteristics of the TX end chip and the link.

(22) As illustrated in FIG. 3, the above step response data is imported into the ADS channel simulation as a signal source of the RX end chip, and a random code signal is applied externally. Correlation parameters, such as simulation frequency, code source type and equalization, are set for the channel simulation, to obtain an eye pattern of a front end of the RX end chip. The parameters are determined by an actual situation.

(23) It should be noted that the step response data includes the characteristics of the TX end chip and the link. The random code signal is used for generating the eye pattern.

(24) The ADS transient simulation is described hereinafter. The random code signal is applied directly to the TX end chip to obtain an eye pattern of the front end of the RX end chip.

(25) Since IBIS AMI model cannot be applied to the ADS transient simulation, the obtained eye patterns of the front end of the RX end chip may be compared. Since there is a butt joint in the RX end chip, if the eye patterns are consistent, eye patterns after passing a balanced circuit in the chip are also consistent.

(26) As compared with transient simulation results of HSPICE and ADS, it can be seen that the simulation result based on the step response and the result based on ADS transient simulation are almost identical, which proves an effectiveness of channel simulation by using step response of a chip.

(27) The embodiments are only used to describe the present disclosure, and should not be interpreted as limitation to the present application. Those skilled in the art can make many changes and variations without departing from the spirit and scope of the present disclosure. Therefore, all equivalent technical solutions belong to the scope of the present disclosure, and the patent protection scope of the present disclosure should be defined by the claims.