Component including two semiconductor elements, which are bonded to one another via a structured bonding layer, and method for manufacturing a component of this type
09650240 ยท 2017-05-16
Assignee
Inventors
- Mirko Hattass (Stuttgart, DE)
- Heiko Stahl (Reutlingen, DE)
- Jochen Reinmuth (Reutlingen, DE)
- Julian Gonska (Reutlingen, DE)
- Johannes Classen (Reutlingen, DE)
Cpc classification
B81C1/00269
PERFORMING OPERATIONS; TRANSPORTING
B81B7/007
PERFORMING OPERATIONS; TRANSPORTING
B81C2203/054
PERFORMING OPERATIONS; TRANSPORTING
International classification
H01L21/44
ELECTRICITY
B81C3/00
PERFORMING OPERATIONS; TRANSPORTING
B81B7/00
PERFORMING OPERATIONS; TRANSPORTING
Abstract
Measures are provided for improving and simplifying metallic bonding processes which enable a reliable initiation of the bonding process and thus contribute to a uniform bonding. The present method provides a further option for using bonding layers. The method in the case of which the two semiconductor elements are bonded to one another via a bond of at least one metallic starting layer and at least one further starting layer provides that the two starting layers are structured in such a way that the layer areas which are assigned to one another have differently sized areal extents. Moreover, the layer thicknesses of the two starting layers should be selected in such a way that the layer areas which are assigned to one another meet the material ratio necessary for the bonding process.
Claims
1. A method for manufacturing a vertical hybrid integrated component, the method comprising: providing at least two semiconductor elements; and bonding the two elements to one another via a bond of at least one metallic starting layer and at least one further starting layer, at least one of the two element surfaces to be bonded being provided with the at least one metallic starting layer, out of which at least one first layer area is structured, at least one of the two element surfaces to be bonded being provided with at least one further starting layer, out of which at least one second layer area is structured which is situated so that it forms together with the first layer area of the first starting layer a bonding layer for the two elements during the bonding process, wherein the starting layers are structured so that the layer areas which are assigned to one another have differently sized areal extents and the layer thicknesses of the two starting layers are selected so that the layer areas which are assigned to one another meet the material ratio necessary for the bonding process; wherein the at least two semiconductor elements include at least one of: (i) at least two MEMS elements; at least two ASIC elements; and at least one MEMS element and at least one ASIC element, and wherein the elements of the vertical hybrid integrated component are situated above one another in the form of a chip stack and are bonded to one another.
2. The method of claim 1, wherein each of the two element surfaces to be bonded is provided with at least one starting layer.
3. The method of claim 1, wherein the two starting layers are consecutively deposited and structured on one of the two element surfaces to be bonded.
4. The method of claim 1, wherein a contiguous layer area of the metallic starting layer is assigned multiple layer areas of the further starting layer.
5. The method of claim 1, wherein the at least one layer area is tapered upwardly.
6. The method of claim 1, wherein at least one structural element, which is not assigned a layer area of the further starting layer, is structured out of at least one starting layer and this structural element is configured as an electrode or as a standoff structure.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
(4)
(5)
DETAILED DESCRIPTION
(6) In the exemplary embodiment illustrated in
(7) In the exemplary embodiment described here, a layer area 11, the areal extent of which essentially corresponds to the strived for bonding area, was structured out of the starting layer of element 10. Layer area 11 is assigned a layer area 21 in the starting layer of element 20, the areal extent of which is considerably smaller than that of layer area 11. In turn, the starting layer of element 20 is, however, thicker than the starting layer of element 10 so that the quantitative ratio of the layer materials necessary for the eutectic bonding process is met.
(8) The two elements 10 and 20 are brought into contact for the bonding process, which is illustrated in
(9)
(10) In the state of the bonding process illustrated in
(11) In
(12)
(13) The two starting layers for the bond between two semiconductor elements 10 and 20 may also both be applied to one of the two element surfaces, which is illustrated by
(14) In the case of
(15) A second thicker starting layer was then deposited and structured over the thus structured first starting layer. Resulting layer area 21 is situated centrally on layer area 11, but has a significantly smaller areal extent.
(16) In contrast thereto, the thicker starting layer was initially deposited and structured on element 20 in the case of
(17) To reduce the contact area between the element surfaces to be bonded at the beginning of the bonding process, the flank profiles of the layer areas of the starting layers may also be influenced, for example, at least in the case of some layer materials, which is illustrated in
(18)
(19) In the case of
(20) As already mentioned above, the bonding layer generated according to the present invention is generally thinner than the sum of the layer thicknesses of the two starting layers. In one refinement of the present invention, this fact is used to provide the two element surfaces to be bonded to one another with structural elements which are situated very closely to the respective other element function and interact with it. These structural elements are simply formed in a starting layer for the bond, namely outside a bonding area. Depending on the material, electrodes for activation or the signal detection or also a standoff structure may be implemented, for example, as an overload protection, which is illustrated in
(21) In this exemplary embodiment described here, a layer area 21, the areal extent of which essentially corresponds to the strived for bonding area, was structured out of the starting layer of element 20. This layer area 21 is assigned a layer area 11 in the starting layer of element 10, the areal extent of which is considerably smaller than that of layer area 21. In turn, the starting layer of element 10 is, however, thicker than the starting layer of element 20 so that the quantitative ratio of the layer materials necessary for the eutectic bonding process is provided. Next to layer area 11 and outside the bond to be generated, a further layer area 12 was structured out of the starting layer of element 10.
(22)