EPITAXIAL GALLIUM NITRIDE ALLOY FERROELECTRONICS
20230070465 · 2023-03-09
Inventors
Cpc classification
H01L29/78681
ELECTRICITY
H01L29/66462
ELECTRICITY
H01L29/7781
ELECTRICITY
H01L29/0607
ELECTRICITY
H01L21/02192
ELECTRICITY
H01L29/78391
ELECTRICITY
H01L29/7786
ELECTRICITY
H01L29/40111
ELECTRICITY
H01L29/267
ELECTRICITY
H01L21/02194
ELECTRICITY
H01L29/24
ELECTRICITY
C30B25/10
CHEMISTRY; METALLURGY
International classification
H01L21/02
ELECTRICITY
C30B25/10
CHEMISTRY; METALLURGY
H01L29/778
ELECTRICITY
H01L29/66
ELECTRICITY
H01L29/20
ELECTRICITY
C30B29/40
CHEMISTRY; METALLURGY
H01L29/06
ELECTRICITY
Abstract
A method of fabricating a heterostructure includes providing a substrate, and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate. The wurtzite structure includes an alloy of gallium nitride. The non-sputtered, epitaxial growth procedure is configured to incorporate a group IIIB element into the alloy. The wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.
Claims
1. A method of fabricating a heterostructure, the method comprising: providing a substrate; and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate, the wurtzite structure comprising an alloy of gallium nitride, the non-sputtered, epitaxial growth procedure being configured to incorporate a group IIIB element into the alloy; wherein the wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.
2. The method of claim 1, further comprising forming a semiconductor layer supported by the substrate before implementing the non-sputtered, epitaxial growth procedure such that the wurtzite structure is formed on the semiconductor layer.
3. The method of claim 2, wherein forming the semiconductor layer comprises forming a gallium nitride layer on the substrate.
4. The method of claim 2, wherein forming the semiconductor layer comprises growing the semiconductor layer in an epitaxial growth chamber in which the non-sputtered, epitaxial growth procedure for the wurtzite structure is implemented such that the substrate is not removed from the epitaxial growth chamber between forming the semiconductor layer and implementing the non-sputtered, epitaxial growth procedure.
5. The method of claim 1, further comprising forming a semiconductor layer after implementing the non-sputtered, epitaxial growth procedure such that the semiconductor layer is in contact with the wurtzite structure.
6. The method of claim 5, wherein forming the semiconductor layer comprises growing the semiconductor layer in an epitaxial growth chamber in which the non-sputtered, epitaxial growth procedure for the wurtzite structure is implemented such that the substrate is not removed from the epitaxial growth chamber between implementing the non-sputtered, epitaxial growth procedure and forming the semiconductor layer.
7. The method of claim 1, wherein the group IIIB element is scandium.
8. The method of claim 7, wherein the scandium has a content falling in a range from about 0.31 to about 0.41.
9. The method of claim 1, wherein the substrate comprises sapphire.
10. The method of claim 1, wherein the growth temperature is about 600° C. or lower.
11. The method of claim 1, wherein the non-sputtered, epitaxial growth procedure has a nitrogen-to-metal flux ratio greater than 1.
12. A device comprising: a substrate; and a heterostructure supported by the substrate; wherein the heterostructure comprises a monocrystalline layer of an alloy of gallium nitride, and wherein the alloy comprises a Group IIIB element.
13. The device of claim 12, wherein the monocrystalline layer exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the monocrystalline layer.
14. The device of claim 12, wherein: the heterostructure further comprises a semiconductor layer disposed between the substrate and the monocrystalline layer; and the semiconductor layer is in contact with the monocrystalline layer.
15. The device of claim 14, wherein the semiconductor layer comprises gallium nitride.
16. The device of claim 12, further comprising a metal layer disposed between the substrate and the heterostructure, wherein the metal layer is in contact with the heterostructure.
17. The device of claim 12, wherein the group IIIB element is scandium.
18. The device of claim 17, wherein the scandium has a content falling in a range from about 0.31 to about 0.41.
19. The device of claim 12, wherein the heterostructure further comprises a semiconductor layer supported by, and in contact with, the monocrystalline layer.
20. The device of claim 19, wherein the semiconductor layer comprises gallium nitride.
Description
BRIEF DESCRIPTION OF THE DRAWING FIGURES
[0010] The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.
[0011] For a more complete understanding of the disclosure, reference should be made to the following detailed description and accompanying drawing figures, in which like reference numerals identify like elements in the figures.
[0012]
scans of example Sc.sub.xGa.sub.1—xN films with x = 0.31, 0.36, and 0.41.
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[0027] The embodiments of the disclosed devices and methods may assume various forms. Specific embodiments are illustrated in the drawing and hereafter described with the understanding that the disclosure is intended to be illustrative. The disclosure is not intended to limit the invention to the specific embodiments described and illustrated herein.
DETAILED DESCRIPTION OF THE DISCLOSURE
[0028] Methods for growth of epitaxial (e.g., fully epitaxial) ferroelectric alloys of gallium nitride are described. The disclosed methods are configured to incorporate scandium (Sc) or other group IIIB elements into the wurtzite crystal structure of gallium nitride. Molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), pulsed laser deposition (PLD), and other non-sputtered epitaxial growth procedures may be used to realize the ferroelectric III-nitride alloys. Devices and structures including such materials are also described. For instance, various heterostructures and ferroelectronic devices with one or more ferroelectric scandium gallium nitride layers are described.
[0029] Examples of ferroelectric, single-phase wurtzite ScGaN grown on GaN by plasma-assisted molecular beam epitaxy are described herein. Distinct ferroelectric switching behavior was confirmed by detailed electrical characterization. Coercive fields in the range of 2.0-3.0 MV/cm, and large, retainable remnant polarization in the range of 60-120 .Math.C/cm.sup.2, are unambiguously demonstrated for ScGaN epilayers with Sc contents falling in a range from about 0.31 to about 0.41. Taking advantage of the widely tunable energy bandgap of III-nitride semiconductors, the demonstration of ferroelectricity in ScGaN, together with ferroelectric ScAIN, enable a broad range of emerging applications with combined functionality in ferroelectric, electronic, optoelectronic, photovoltaic, and/or photonic devices and systems.
[0030] Although described in connection with examples of epitaxially grown Sc.sub.xGa.sub.1—xN layers, the disclosed methods and devices may be applied to a variety of gallium nitride alloys. The disclosed methods and devices may thus include or involve the incorporation of scandium into other gallium nitride wurtzite structures. For instance, the disclosed methods and devices may include or involve one or more epitaxially grown Sc.sub.xAl.sub.yGa.sub.1—x—yN layers or Sc.sub.xln.sub.yGa.sub.1—x—yN layers. The configuration, construction, fabrication, and other characteristics of the heterostructures may also vary from the examples described. For instance, the heterostructures may include any number of epitaxially grown layers of ferroelectric and non-ferroelectric nature. The disclosed methods and devices are not limited to gallium nitride alloys including scandium. For instance, the III-nitride alloys may include additional or alternative group IIIB elements, such as yttrium (Y) and lanthanum (La).
[0031] The heterostructures of the disclosed devices may include any number of other alloys of III-nitride materials, including, for instance, Sc.sub.xAl.sub.1—xN layers (e.g., single-crystalline Sc.sub.xAl.sub.1—xN). Such Sc.sub.xAl.sub.1—xN layers may also be grown by plasma-assisted molecular beam epitaxy (MBE) and exhibit robust ferroelectric switching. Further details regarding such layers are set forth in U.S. Application Serial No. 63/185,669, entitled “Epitaxial Nitride Ferroelectronics” and filed May 7, 2021, and P. Wang, et al., “Fully epitaxial ferroelectric ScAIN grown by molecular beam epitaxy,” Applied Physics Letters 118, 223504 (2021), the entire disclosures of which are hereby incorporated by reference.
[0032] Given the widely tunable bandgap from about 3.4 eV for GaN to 6.1 eV for AIN, the realization of ferroelectricity in both Sc.sub.xGa.sub.1—xN and Sc.sub.xA1.sub.1—xN provides a unique material platform with widely tunable ferroelectricity, polarization, and bandgap and further enable alloy, strain, interface, and quantum engineering that was not possible previously. In addition, the bandgap of Sc.sub.xGa.sub.1—xN is predicted to stay direct up to x=0.5, making Sc.sub.xGa.sub.1—xN tantalizing for optoelectronic and photovoltaic applications.
[0033] Although described in connection with MBE growth procedures, additional or alternative non-sputtered epitaxial growth procedures may be used. For instance, metal-organic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE) growth procedures may be used. Still other procedures may be used, including, for instance, pulsed laser deposition procedures.
[0034] Examples of unambiguous ferroelectric switching behavior in single-crystalline Sc.sub.xGa.sub.1— .sub.xN films grown on GaN templates by MBE are described. X-ray diffraction (XRD) was used to confirm the wurtzite structure of the synthesized Sc.sub.xGa.sub.1—xN films. The polarization switching process has been examined by multiple electrical characterization methods including P-E and J-E (polarization and current density over electric field, respectively) loops, positive-up-negative-down (PUND) measurements, and frequency-dependent measurements.
[0035] A wake-up or initiation process was observed during the first several measurement cycles. After sufficient poling, coercive fields in the range of 2.0-3.0 MV/cm, and large, retainable remnant polarization in the range of 60-160 .Math.C/cm.sup.2 were measured for Sc.sub.xGa.sub.1—xN thin films with Sc contents of 0.31-0.41. The ferroelectric Sc.sub.xGa.sub.1—xN examples described herein, together with ferroelectric Sc.sub.xAl.sub.1—xN, which may all be grown by MBE, enable a broad range of emerging heterostructures and applications with tunable and integrated functionality in ferroelectric, electronic, optoelectronic, photovoltaic, and photonic devices and systems.
[0036] Examples of Sc.sub.xGa.sub.1—xN films were grown using a Veeco GENxplor MBE system equipped with a radio frequency (RF) plasma-assisted nitrogen source. Commercial GaN/sapphire templates (SinoVio Semiconductor Technol. (Dongguan) Co.Ldt.) with a dislocation density of about 5x10.sup.8 cm.sup.-2 were used as substrates and a 100-nm-thick Si-doped layer of GaN was first grown at about 700° C. as the bottom contact layer. Sc.sub.xGa.sub.1—xN layers were then grown with a fixed Ga beam flux and the Sc content was controlled by tuning Sc/Ga beam equivalent pressure (BEP) ratio calibrated by energy dispersive x-ray spectroscopy (EDS). During ScGaN growth, all shutters were opened simultaneously without interruption. The doping concentration of the n-GaN layer was determined by secondary ion mass spectrometry (SIMS) as about 1 x 10.sup.19 cm.sup.-3 and the carrier concentration at room temperature was about 5x10.sup.18 cm.sup.-3 determined by Hall effect measurement. The substrate temperature was monitored by a thermocouple on the backside of the wafer calibrated by observing the reversible (7 x 7) to (1 x 1) reconstruction transition for Si(111) at 830° C. The III/V ratio for ScGaN growth was set to about 0.8 to about 0.85 to avoid Ga droplet formation. Pt/AI circular electrodes with a diameter of 20 .Math.m were lithographically patterned on top of the Sc.sub.xGa.sub.1—xN films and indium solder was placed on the n-GaN as bottom electrode. All electrical characterizations, including polarization-electric (P-E) hysteresis loops and PUND measurements of the patterned Sc.sub.xGa.sub.1—xN thin film capacitors were measured using a Radiant Precision Premier II ferroelectric tester driven from the bottom n-GaN contact layer. Triangular waveform sequences were used for measuring J-E and P-E loops and square pulses were adopted when doing PUND and retention tests. The setup and measurement method have been calibrated using standard commercial ferroelectric lead zirconium titanate (PZT) films to make sure they were able to extract the correct polarization. XRD 2theta-omega (20-w) scans were performed using a Rigaku SmartLab diffractometer with a Cu K.sub.α1 radiation x-ray source (1.5406 Å).
[0037] Sc.sub.xGa.sub.1—xN films with different Sc contents (0.31-0.41) were grown to explore the ferroelectric property of the material. The film thicknesses measured by cross-sectional scanning electron microscopy (SEM) were 100, 120, and 150 nm for Sc.sub.0.31Ga.sub.0.69N, Sc.sub.0.36Ga.sub.0.64N, and Sc.sub.0.41Ga.sub.0.59N, respectively. Part a of
[0038] Owing to the difficulties in determining Sc content from XRD 2θ-ω scans, EDS equipped in a SEM was used to calibrate the Sc content using Sc.sub.xGa.sub.1—xN films grown on AIN templates under the same growth conditions. The accelerating voltage and emission current used for EDS measurements were 10 kV and 10 .Math.A, respectively, with an error bar of ±2%. The Sc contents acquired from EDS were in good agreement with the values derived from BEP ratios.
[0039] To investigate and characterize the polarization switching behavior in the examples, a bipolar triangular AC voltage waveform was applied to the bottom electrode and the displacement current was sensed by the top electrode. Part a of
which agrees well with the trend shown in Part b of
[0040] Part a of
[0041] Finally, the polarization switching behavior of Sc.sub.xGa.sub.1-xN examples with varying Sc contents were explored.
[0042] Part a of
[0043] Part c of
[0044]
[0045] Described herein are examples of distinct ferroelectric functionality in single-crystalline wurtzite phase Sc.sub.xGa.sub.1—xN films grown by MBE. Coercive fields in the range of 2.0-3.0 MV/cm, and large, retainable remnant polarization in the range of 60-120 .Math.C/cm.sup.2, were demonstrated for Sc.sub.xGa.sub.1—xN thin films with Sc contents of 0.31-0.41. Given the widely tunable bandgap and lattice parameters between GaN and AIN, the fully epitaxial ferroelectric Sc.sub.xGa.sub.1—xN together with Sc.sub.xAl.sub.1—xN will be useful in a broad range of current and emerging applications, e.g., with tunable and integrated functionality, in ferroelectric, electronic, optoelectronic, photovoltaic, and photonic devices and systems.
[0046]
[0047] The method 600 may begin with an act 602 in which a substrate is prepared and/or otherwise provided. In some cases, the act 602 includes providing a sapphire substrate in an act 604. Alternative or additional materials may be used, including, for instance, silicon, bulk GaN, bulk AIN, or other semiconductor material. Still other materials may be used, including, for instance, silicon carbide. The substrate may be cleaned in an act 606. In some cases, a native or other oxide layer may be removed from a substrate surface in an act 608. Additional or alternative processing may be implemented in other cases, including, for instance, doping or deposition procedures. The substrate thus may or may not have a uniform composition. The substrate may be a uniform or composite structure.
[0048] In an act 610, one or more growth templates or other layers are formed. The layer(s) are thus formed on, or otherwise supported by, the substrate. The layer(s) may or may not be in contact with the substrate. In some cases, the layer(s) are composed of, or otherwise include, a semiconductor material. For instance, the act 610 may include an act 612 in which a semiconductor layer is formed. For example, a III-nitride layer, such as a GaN layer, may be grown or otherwise formed on the substrate. Other compound or other semiconductor materials may be used, including, for instance, AIN or AlGaN. The act 612 may thus be implemented before (e.g., in preparation for) implementing an epitaxial growth procedure in which a wurtzite structure is formed. The wurtzite structure may thus be formed on the semiconductor layer. The semiconductor layer may be configured or used as a growth template for the wurtzite structure and/or other elements of the heterostructure. In some cases, the act 612 may include growing the semiconductor layer in an epitaxial growth chamber in which the epitaxial growth procedure for the wurtzite structure is implemented. As a result, the substrate may remain within, e.g., is not removed from, the epitaxial growth chamber between forming the semiconductor layer and implementing the epitaxial growth procedure for growing the wurtzite structure.
[0049] Alternatively or additionally, the act 610 includes an act 614 in which one or more metal or other conductive layers are deposited and patterned. For example, an aluminum layer may be deposited on a silicon substrate in preparation for the epitaxial growth of the wurtzite structure.
[0050] The method 600 may include an act 616 in which one or more contacts are formed. In the example of
[0051] In an act 622, a non-sputtered epitaxial growth procedure is implemented to form a wurtzite structure supported by the substrate. As described herein, the wurtzite structure is composed of, or otherwise includes, an alloy of gallium nitride. For instance, the alloy may be ScGaN. Additional or alternative III-nitride materials may be used, including, for instance, gallium nitride (ScInGaN) and other alloys of gallium nitride. As also described herein, the epitaxial growth procedure is configured to incorporate scandium and/or another group IIIB element into the alloy of the III-nitride material. The alloy may thus be Sc.sub.xGa.sub.1—xN, for example. In some cases, the act 622 includes an act 624 in which an MBE procedure is implemented. In other cases, an MOCVD or other non-sputtered epitaxial growth procedure is implemented in an act 626.
[0052] The act 622 may constitute a continuation, or part of a sequence, of growth procedures. The growth procedures may be implemented in a common, or same, growth chamber. The act 622 may thus include an act 628 in which epitaxial growth is continued in the same chamber. Sequential layers of the heterostructure may thus be grown without exposure to the ambient. The quality of the interface between the layers may accordingly be improved.
[0053] The growth temperature may be at a level such that the wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure. Ferroelectric switching and other behavior may thus be achieved. Growth of a single crystal of the scandium-including alloy (e.g., a monocrystalline layer of the alloy) is also achieved. For example, in some cases, a Sc.sub.xGa.sub.1—xN alloy may be epitaxially grown at a growth temperature of about 600° C. or less. The Sc.sub.xGa.sub.1—xN layer may be grown at other growth temperatures, e.g., as described herein. In some cases, a nitrogen-to-metal flux ratio higher than 1 may be used.
[0054] The growth temperature may correspond with the temperature measured at a thermocouple in the growth chamber. The growth temperature at the epitaxial surface may be slightly different. The growth temperature is accordingly approximated via the temperature measurement at the thermocouple.
[0055] At each level within the range of suitable growth temperatures, the resulting wurtzite structure is monocrystalline. The resulting wurtzite structure is monocrystalline to a degree not realizable via, for instance, sputtering-based procedures for forming Sc.sub.xGa.sub.1—xN layers. Such procedures are only capable of producing structures with x-ray diffraction rocking curve line widths on the order of a few degrees at best. In contrast, the structures grown by the disclosed methods exhibit x-ray diffraction rocking curve line widths on the order of a few hundred arc-seconds or less, well over an order of magnitude less. In this manner, leakage current paths are minimized or otherwise sufficiently reduced so that the resulting wurtzite structure has a suitably high breakdown field strength level, e.g., sufficiently greater than the ferroelectric coercive field strength.
[0056] The above-noted differences in crystal quality evidenced via x-ray diffraction rocking curve line widths may also be used to distinguish between monocrystalline and polycrystalline structures. As used herein, the term “polycrystalline” refers to structures having x-ray diffraction rocking curve line widths on the order of a few degrees or higher. As used herein, the term “monocrystalline” refers to structures having x-ray diffraction rocking curve line widths at least one order of magnitude lower than the order of a few degrees.
[0057] Comparing the wurtzite structures of the layers grown by MBE or other non-sputtered techniques (e.g., MOCVD or HVPE) with sputtering deposition techniques, the microstructure of the former techniques is more uniform with highly ordered stacking sequence of atoms. In sputter deposited layers, domains with cubic phase or domains with in-plane mis-orientation are readily observed. The existence of these mis-aligned domains suppresses the complete switching of polarization, and further results in the fast loss of polarization during fatigue testing. Regarding phase purity, the highly crystallographic orientation of layers grown by MBE or other non-sputtered techniques exhibits more repeatable ferroelectric switching, which is useful in a number of device applications.
[0058] The method 600 may include an act 630 in which one or more layers (e.g., semiconductor layers) are formed after growth of the wurtzite structure. As a result, the layer(s) may be in contact with the wurtzite structure. For instance, one or more III-nitride (e.g., GaN or AlGaN) or other semiconductor layers may be epitaxially grown in an act 632. The act 632 may be implemented in the same epitaxial growth chamber used to grow the wurtzite structure. As a result, the substrate (and heterostructure) is not removed from the epitaxial growth chamber between implementing the acts 622 and 630.
[0059] Alternatively or additionally, the act 630 includes an act 634 in which one or more metal or other conductive layers or structures are formed. The layers or structures may be deposited or otherwise formed. In some cases, the conductive structure is configured as an upper or top contact. For instance, the conductive structure may be a gate.
[0060] The method 600 may include one or more additional acts. For example, one or more acts may be directed to forming other structures or regions of the device that includes the heterostructure. In a transistor device example, the regions may correspond with source and drain regions. The nature of the regions or structures may vary in accordance with the nature of the device.
[0061] The order of the acts of the method 600 may differ from the example shown in
[0062] A number of different types of devices may be fabricated by the method 600 of
[0063] A number of example devices are now described. In each example, the device includes a substrate and a heterostructure supported by the substrate. The heterostructure includes a monocrystalline layer of an alloy of a III-nitride material. As described herein, the alloy includes scandium. As also described herein, the monocrystalline layer exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the monocrystalline layer. In some cases, the III-nitride material is aluminum nitride (GaN), but other III-nitrides may be used.
[0064] In some of the devices described below, the heterostructure (or, more generally, the device) also includes a semiconductor layer disposed between the substrate and the monocrystalline layer (or, more generally, the heterostructure). The semiconductor layer may include a further III-nitride material, such as GaN. In some cases, the semiconductor layer is in contact with the heterostructure. The epitaxial growth of the layers may result in a high quality interface between the layers. Alternatively or additionally, the device also includes a metal or other conductive layer disposed between the substrate and the heterostructure. The metal layer may be in contact with the heterostructure, examples of which are described below.
[0065]
[0066] Other types of memory devices include one transistor, one capacitor (1T-1C) FeRAM devices. For example, a FeRAM device may include a MIM ferroelectric capacitor composed of, or otherwise including, Al, Sc.sub.xGa.sub.1—xN, and Al supported by a pre-processed silicon or GaN substrate.
[0067]
[0068]
[0069]
[0070] Still other types of transistor devices may utilize the epitaxially grown ferroelectric layers described herein, including, for instance, N-polar bottom-gated and gate-recessed transistor devices, both with and without a gate oxide layer.
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[0075]
[0076] The term “about” is used herein in a manner to include deviations from a specified value that would be understood by one of ordinary skill in the art to effectively be the same as the specified value due to, for instance, the absence of appreciable, detectable, or otherwise effective difference in operation, outcome, characteristic, or other aspect of the disclosed methods and devices.
[0077] The present disclosure has been described with reference to specific examples that are intended to be illustrative only and not to be limiting of the disclosure. Changes, additions and/or deletions may be made to the examples without departing from the spirit and scope of the disclosure.
[0078] The foregoing description is given for clearness of understanding only, and no unnecessary limitations should be understood therefrom.