ULTRASONIC PULSE VELOCITY TESTER DEVICE WITH THRESHOLD ERROR CORRECTION

20230127960 · 2023-04-27

    Inventors

    Cpc classification

    International classification

    Abstract

    Ultrasonic pulse velocity (UPV) is an extremely important parameter for the assessment of strength of concrete structures and study of elastic properties. ASTM international standard: (ASTM: C597-09) covers the determination of the propagation velocity of longitudinal stress wave pulses through concrete. The suggested method involves transmission of longitudinal ultrasound by transmitting transducer and receiving by a suitable similar transducer. The transit time-measurement and the associated triggering pulses must provide the overall time-measurement resolution of at least 1 μs. The present invention relates to the design of ultrasonic pulse velocity measuring device capable to generate ultrasound preferably in the solid materials including concrete or material supporting the propagation of ultrasound and precisely measure the ultrasonic propagation delay time commonly known as the transit time. The present invention relates to an improved design of an ultrasonic transit time measurement device having provision for automatic pulse threshold error correction. The invention also discloses the method to realize fast counting for the generation of high resolution with relatively slower microcontrollers. The accuracy in the transit time measurement is relatively improved by subtracting the threshold corrected zero offset (without material under test) from the threshold corrected transit time (with sample).

    Claims

    1. An ultrasonic pulse velocity tester device for measuring transit time of a material with threshold error correction comprising: an envelope detector, at least two comparators, at least two counters, a transmitting transducer, a receiving transducer being attached to a receiving amplifier through a programmable attenuator, and a microcontroller to compensate the threshold error automatically, wherein the threshold error correction is calculated using values obtained from the at least two counters, and wherein a first counter of the at least two counters counts transit time with threshold error and a second counter of the at least two counters counts the time between two thresholds that is threshold error.

    2. The ultrasonic pulse velocity tester device of claim 1, wherein the material is one of a metallic, a non-metallic, and a concrete material supporting ultrasonic propagation.

    3. The ultrasonic pulse velocity tester device of claim 1, wherein the at least two comparators comprise a low threshold comparator and a high threshold comparator.

    4. The ultrasonic pulse velocity tester device of claim 1, wherein the transit time is measured using a counter 1 and a counter 2.

    5. The ultrasonic pulse velocity tester device of claim 4, wherein each of the counter 1 and the counter 2 comprises an asynchronous external counter, placed outside the microcontroller, and a most significant bit of the asynchronous external counter acts as clock input for an internal counter placed inside the microcontroller.

    6. The ultrasonic pulse velocity tester device of claim 5, wherein each asynchronous external counter is a fast counter and each internal counter is a slow counter.

    7. The ultrasonic pulse velocity tester device of claim 6, wherein each external counter is driven in the following manner: i. each external counter is cleared by a synchronization pulse or a transmitter pulse triggering the transducer; ii. the clock of the asynchronous external counter of the counter 1 is enabled by an AND gate and a preset of flip flop; and the asynchronous external counter of the counter 1 is disabled by an output of a low threshold comparator of the at least two comparators, connected to clear of flip flop; and iii. the clock of the asynchronous external counter of the counter 2 is enabled by combination of two AND gates with the help of output of the low threshold comparator and a high threshold comparator of the at least two comparators.

    8. The ultrasonic pulse velocity tester device as claimed in claim 1, wherein the second counter is running at the same clock rate or higher of that of the first counter to achieve same time resolution or better.

    9. The ultrasonic pulse velocity tester device as claimed in claim 1, wherein a gain of the receiving amplifier is controlled by the microcontroller selected from Arm, PIC and STM 32 to achieve a desired amplitude with the help of outputs of the at least two comparators.

    10. The ultrasonic pulse velocity tester device of claim 1, wherein the receiving amplifier output is envelope detected by the envelope detector using a bipolar junction transistor (BJT) or selected from field effect transistor (FET) or a metal-oxide semiconductor field-effect transistor (MOSFET) to work in class AB mode and the operating point is selected in such a way that it is just above the cutoff

    11. The ultrasonic pulse velocity tester device of claim 1, wherein time constant of parallel RC of the envelope detector is related to the operating frequency of receiving transducer.

    12. The ultrasonic pulse velocity tester device of claim 1, wherein the second counter is used for the purpose of correction in ultrasonic transit time measurement using software or hardware.

    13. The ultrasonic pulse velocity tester device of claim 1, wherein an accurate transit time measurement is obtained by subtracting the threshold corrected zero offset without material under test from the threshold corrected transit time with material under test.

    14. A process for accurately measuring the transit time with threshold error correction using ultrasonic pulse velocity tester device of claim 1 comprising: measuring threshold corrected transit time (time 1) without material under test, measuring threshold corrected transit time (time 2) with material under test and subtracting time 2 from time 1.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0029] The present invention is described, by the way of examples, with reference to the drawings, in which

    [0030] FIG. 1: Schematic diagram depicting the operating principle of the transmitter

    [0031] FIG. 2: Block diagram of receiver with auto threshold correction provision.

    [0032] FIG. 3: Detailed circuit diagram of the transmitter circuit.

    [0033] FIG. 4: Detailed circuit diagram of receiver amplifier with comparators to detect two different thresholds

    [0034] FIG. 5: Detailed circuit diagram of microcontroller interface with fast counters and associated control.

    [0035] FIG. 6: The effect and contribution of threshold amplitude in the error of pulse arrival delay measurement.

    [0036] FIG. 7: Typical curve fitting for a sine approximated pulse from arrival to up to 60°.

    [0037] FIG. 8: Detailed timing diagram showing the logic for threshold error detection

    DETAILED DESCRIPTION OF THE INVENTION

    [0038] The FIGS. 1 and 2 shows disclosed ultrasonic pulse velocity (transit time) measuring device consists of preferably but not exclusive a low end 8-bit microcontroller (10) to generate the square wave pulse(s) required to excite the ultrasonic transducer (50). If required, depending on the requirements and to add the processing capability a high end microcontroller such as 32 bit or better may also be preferred. Before exciting the transducer, the controller sends a synchronization pulse (220) which is useful for the other device(s). The transmitted pulse generally narrower of the order of 2-3 microseconds is used to activate a fast high voltage switch (30) realized using MOSFET (IRFPG50). A high voltage capacitor (20) is charged through high voltage source (40) and the charge of the capacitor is pumped into the piezoelectric transducer to generate ultrasound in the desired medium. The detailed circuit of transmitter is shown in FIG. 3.

    [0039] At the receiving end a similar piezoelectric transducer (60) is used to generate electrical pulses in response to the received ultrasonic waves. The received signal is amplified to a sufficient level by broadband amplifier (80) and if required the signal may also be attenuated by the input programmable attenuator (70). The amplified signal is then fed to the active class AB envelope detector (90) which removes the RF component from the signal. The envelope detected signal is then applied simultaneously to two analog voltage comparators. The low threshold voltage comparator (100) has 1V as its DC reference input and the high threshold comparator (110) has 2V as its input reference. The detailed circuit of receiver of the disclosed invention is shown in FIG. 4.

    [0040] The major drawback of a counter based time delay measurement approach is the error caused due to finite threshold value kept at comparator for the received pulse detection. With a fixed threshold for the pulse detection the amplitude of pulse plays key role in the accuracy of pulse arrival time detection. FIG. 6 indicates typical envelop detected pulse which is fed to the comparators for detection of pulse arrival. The actual arrival of the received pulse has to be considered only at the beginning that is at to. However, detection of this point is extremely difficult due to presence of finite amplitude of electrical noise. Therefore, certain amplitude well above the noise level is considered as the pulse arrival and is treated as the reference for the comparator. This finite threshold results in the error and generally the excess time delay measurement. This error due to threshold is also function of the amplitude of received signal. So, up to certain level the error can be minimized by increasing the gain of receiver to produce pulse of large amplitude so the detection can be made close to to. However, the possibility of error becomes more prone if the material being tested is highly attenuating. Therefore, a method to overcome this limitation needs to be developed.

    [0041] The disclosed invention avoids error due to threshold in ultrasonic transit time measurement. The concept is based on consideration of pulse shape as a linear rise in amplitude with time. This is approximated particularly after providing sufficient gain at the receiver so the pulse amplitudes cross the second comparator (110) before 60°.

    [0042] FIG. 7 shows the linear fit to a sine pulse having considered maximum amplitude below 60°.

    [0043] The linear fit shows excellent fit with R squared value 0.993. FIG. 8 shows the detailed timing diagram of the developed method indicating the logic for threshold error correction. Two counters are used; the first counter 1(120) is 20 bit and counter 2(130) is 12 bit. The counters can run at extremely fast rate above the general purpose controllers. To run the counters faster IC 74393 is used which can run up to 100 MHz and generate time measurement resolution of 10 ns. The internal counters of microcontroller are driven by respective MSBs of 4 bit binary counters IC 74393. As depicted in the FIG. 8 the sync pulse (220) generated from the microcontroller clears the 74393 counters. At the transmitted pulse (230) generated from the controller starts the main 20 bit counter 1 by presetting the flip flop (IC 7474) and the counter 1 is stopped at received pulse by low threshold comparator (100) whose reference is kept at 1V. This low threshold comparator also presets the second flip flop to start the second counter 2 and this counter 2 is stopped at the pulse from high threshold comparator (110) whose reference is kept at 2V. Now, the counter 2 indicates the counts proportional to the time delay between t.sub.1 and t.sub.2. This Δt is subtracted from the main time delay and the error is compensated.

    EXAMPLES

    [0044] The following examples are given by way of illustration of the working of the invention in actual practice and should not be construed to limit the scope of the present invention in any way.

    Example 1

    [0045] The present circuit is built by using a general purpose 8-bit microcontroller ATMEGA16 is used for the generation of broadband pulse and square pulses of known frequency. However, any suitable high end or computer may be utilized to perform this function and control

    Example 2

    [0046] A capacitor is used to store charge and the charge is pumped into the exciting transducer using a fast MOSFET (IRFPG50). However, any fast switching device such as MOSFET or BJT or IGBT can be used to achieve the same functionality

    Example 3

    [0047] At the receiver end fixed gain voltage amplifier is used to amplify signal above 60 dB. A programmable potentiometer (10 k Ω) of 100 steps is used to attenuate the signal if required.

    [0048] However, a suitable improved (higher steps) programmable potentiometer can also be utilized to achieve better steps in the gain. A fixed gain amplifier can be replaced with a programmable amplifier and the gain can be controlled by the microcontroller or computer.

    Example 4

    [0049] The transistor envelope detector used to remove the RF components from the received signal is biased in class AB and particularly in such a way that the output at the emitter is just few mV to receive extremely small amplitude. However, in place of transistor any suitable device such as FET or MOSFET may also be used with RC constant at the emitter to remove desired RF.

    Example 5

    [0050] For the generation of radio frequency (RF) needed to run the counters, NOT gates based crystal oscillator widely used has been preferred and used. Crystal was preferred to have stable frequency of 20 MHz. Here, 20 MHz is selected to achieve time measurement resolution of 50 ns. However, suitable higher frequency may be used to achieve better resolution depending on requirement. The frequency generation can also be made with other commercial crystal based clock generator modules.

    Example 6

    [0051] The counters used herein this case are hybrid to achieve fast counting rate and overcome limitations of counters within the controller. Here hybrid counters mean lower four bits of the counters are outside with extremely fast counting capability and the remaining bits are the internal counter bits of controller. Whereas, the internal counters may or may not have faster counting rate as the external ones are. However, the maximum counting rate of internal counters should be at least 1/16.sup.th of the rate of external counters.

    Example 7

    [0052] In the disclosed invention the hybrid counter contains external fast and internal slow counters. However, if extremely fast counters are being used only internal counters may also be used to achieve the logic for threshold error correction. Or if required full external counters may also be used for the same purpose.

    Example 8

    [0053] In the present invention the initialization (clear) of external counter is done with help of transmitted pulse generated by the microcontroller and the AND gate is enabled/disabled by the external flip-flop IC 7474 in terms of preset and clear. The IC 7474 may also be replaced with suitable flip flop having similar functionality.

    Advantages

    [0054] The main advantages of the present invention are: [0055] 1. MOSFET based capacitor discharge based excitation module to deliver high power. [0056] 2. The provision of providing automatic threshold error correction will result in ultrasonic transit time (delay) measurement relatively accurate. [0057] 3. The transit time measurement involving difference in the threshold corrected zero offset and threshold corrected material time delay ultimately minimizes the error in the actual transit time measurement. [0058] 4. Highly sensitive envelop detector may detect small signal amplitude. [0059] 5. Inclusion of two counters (delta) approach also detects wrong pulses and hence avoids possibility of wrong measurement. [0060] 6. Fast 4-bit counters external to effectively increase the resolution of up to 10 ns which is extremely difficult by even with high end microcontrollers.