Integrated CMOS/MEMS microphone die components
09641950 ยท 2017-05-02
Assignee
Inventors
Cpc classification
B81B2201/0257
PERFORMING OPERATIONS; TRANSPORTING
B81B3/0051
PERFORMING OPERATIONS; TRANSPORTING
B81C2203/0145
PERFORMING OPERATIONS; TRANSPORTING
B81B2203/0127
PERFORMING OPERATIONS; TRANSPORTING
B81B3/007
PERFORMING OPERATIONS; TRANSPORTING
B81C2203/0714
PERFORMING OPERATIONS; TRANSPORTING
International classification
B81B7/00
PERFORMING OPERATIONS; TRANSPORTING
H04R31/00
ELECTRICITY
B81B3/00
PERFORMING OPERATIONS; TRANSPORTING
Abstract
A die is manufactured using complementary metal-oxide semiconductor (CMOS) techniques to create transistors, electrical pathways, and microelectromechanical system (MEMS) structures. The MEMS structures include springs, plates, mechanical stops, and structural supports, which can be combined to form complex MEMS structures including microphones, pressure sensors, accelerometers, resonators, gyroscopes, and the like.
Claims
1. A diaphragm for a CMOS MEMS capacitive microphone die comprising: a first substantially planar metallic layer having a top surface and a bottom surface, where a portion along the perimeter of the first layer defines a first edge of the first layer; a second substantially planar metallic layer having a top surface and a bottom surface, where a portion along the perimeter of the second layer defines a first edge of the second layer, the first edge of the second layer is substantially the same size and shape as the first edge of the first layer, and the first edge of the second layer is substantially aligned vertically with the first edge of the first layer, except that the first edge of the first layer extends horizontally, with respect to the geometric horizontal center of the first layer, beyond the first edge of the second layer; and a first plurality of vias between the first and second layers, the vias attached to the top surface of the first layer and the bottom surface of the second layer.
2. The diaphragm of claim 1, where: a portion along the perimeter of the first layer defines a second edge of the first layer, the second edge of the first layer being a different portion than the first edge of the first layer; a portion along the perimeter of the second layer defines a second edge of the second layer, the second edge of the second layer being a different portion than the first edge of the second layer; the second edge of the second layer is substantially the same size and shape as the second edge of the first layer; and the second edge of the second layer is substantially vertically aligned with the second edge of the first layer, except that the second edge of the second layer extends horizontally, with respect to the geometric horizontal center of the first layer, beyond the second edge of the first layer.
3. The diaphragm of claim 1, further comprising: a second plurality of vias extending upwards from the first layer along its first edge where the first edge of the first layer extends beyond the first edge of the second layer.
4. The diaphragm of claim 1, further comprising: a third plurality of vias extending downwards from the second layer along its second edge where the second edge of the second layer extends beyond the second edge of the first layer.
5. The diaphragm of claim 1, where: the first layer being substantially solid from side to side; and the second layer having a plurality of openings between the top surface and bottom surface.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE INVENTION
(24) The following sections set forth numerous specific embodiments taking advantage of various aspects of the invention. These are not intended to be an exhaustive collection of every embodiment of the invention, as embodiments of the invention can be combined in a multiplicity of ways without departing from the principles of the invention.
(25) General Fabrication Techniques
(26) The embodiments disclosed can be fabricated using standard sub-micron CMOS fabrication techniques known to one of skill in the art, for example:
(27) 1. On the portions of a silicon wafer substrate intended to be populated by transistors, build the transistors using standard CMOS techniques. The portions of the wafer for the MEMS structures remain untouched, leaving the field oxide in this area.
(28) 2. Deposit a layer of SiO.sub.2 over the entire wafer.
(29) 3. Apply a patterned mask onto the SiO.sub.2 layer with openings for the electrical vias needed for the transistor interconnects and for the vias needed for the structure intermetal supports for the MEMS structure.
(30) 4. Etch the SiO.sub.2 layer using reactive ion etching (RIE).
(31) 5. Fill the vias with tungsten using physical vapor deposition (PVD).
(32) 6. Planarize the layer using chemical-mechanical polishing (CMP).
(33) 7. Deposit an adhesion layer of Ti using sputtering.
(34) 8. Deposit a barrier layer of TiN using sputtering.
(35) 9. Deposit a metallic layer of Al/Cu alloy (1% Cu) using sputtering.
(36) 10. Apply a patterned mask onto the metallic layer to create interconnects for electrical pathways and for the MEMS structures.
(37) 11. Etch the metallic layer using RIE.
(38) 12. Repeat steps 2-11 for as many metallic layers as required.
(39) 13. Deposit a passivation layer of Si.sub.3N.sub.4, and pattern and dry etch openings in the passivation layer as needed.
(40) 14. Optionally, add a polyimide layer on top of the passivation and pattern openings as needed.
(41) 15. Optionally, create one or more openings through the silicon wafer beneath the MEMS structure.
(42) 16. Introduce vHF (or other etchant) through the openings of the passivation layer and/or silicon wafer to etch the SiO.sub.2 portions of the MEMS structures. (The length of exposure to the vHF required to release the MEMS structures will vary according to the concentration of the vHF, the temperature and pressure, and the amount of SiO.sub.2 to be removed.)
(43) 17. Dice the silicon wafer.
(44) The dimensions of the various components can vary according to application requirements. For example, the metallic layers can range in thickness from approximately 0.5 m to 1.0 m, and each layer needn't be the same thickness as the other layers. The vias can range in from approximately 0.2 m to 0.5 m and be spaced apart from one another between approximately 0.5 m to 5.0 m, and the vias needn't be uniform in size or pitch. The vias on any given layer could be lined up in rows and columns or they could be offset from one another; the vias of one layer could be directly above the vias of the layer below or they could be offset from the vias of the layer below. The thickness of the SiO.sub.2 between metallic layers can range from approximately 0.80 m to 1.0 m, and each layer of SiO.sub.2 between metallic layers needn't be the same thickness as other layers of SiO.sub.2.
(45) Further, other materials common to CMOS fabrication may be used. Metals other than the Al/Cu (1%) alloy, such as copper or Al/Cu alloys of different proportions, may be used for the metallic layers. Dielectrics other than SiO.sub.2, such as polymers, may be used for the intermetal layers and would likely require use of a different release etchant. A material other than silicon may be used for the wafer substrate, provided that it is otherwise compatible with the CMOS fabrication process.
(46) Further, during the release step, in addition to controlling the depth of the etching through time, temperature, and pressure, the structure could include physical barriers that block the further penetration of the etchant.
(47) Further, the foregoing list of steps can be altered to meet the requirements for the use of specific fabrication equipment, the fabrication requirements of the non-MEMS components of the die, and the fabrication requirements of specific MEMS structures. The following sections describe examples of additional fabrication requirements for specific MEMS structures.
(48) Anisotropic MEMS Spring Structure
(49) In a preferred embodiment of MEMS spring structure 1000, shown in
(50) Spring structure 1000 is fabricated using standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques.
(51) The following table compares spring structure 1000 to a solid metal structure of the same dimensions:
(52) TABLE-US-00001 Structure 1000 Comparable Solid Beam Moment of Inertia (Z) 2.234 3.175 Moment of Inertia (Y) 0.139 0.280 Ratio of Z to Y Stiffness 16.1:1 11.3:1
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(54) TABLE-US-00002 Structure 1006 Comparable Solid Beam Moment of Inertia (Z) 11.027 19.621 Moment of Inertia (Y) 0.231 0.514 Ratio of Z to Y Stiffness 47.7:1 38.1:1
(55) Depending on the purpose of the spring structure in the MEMS device, the length of the metallic layers may vary. For example, when used to support a piston-style diaphragm in a MEMS microphone die, it may be approximately 100 m, but when used for other applications, such as an accelerometer or valve, its length would differ according to the configuration of the device and the mass of the moving component. Likewise, number of metallic layers and/or the width of the spring can be changed to increase or decrease the stiffness of the spring as needed for the purpose of the spring in the MEMS device. Generally, the stiffness of the spring will vary with the third power of the length (inversely), linearly with the width, and with the third power of the height.
(56) Vacuum Sealed MEMS Die
(57) In a preferred embodiment of vacuum sealed MEMS die 2000, shown in cross-section before release in
(58) After fabricating unreleased structure 2001 in MEMS die 2000 an etchant is introduced into chamber 2002 through opening 2008. The etchant removes the dielectric material 2003 in chamber 2002, including any exposed dielectric material in now-released MEMS structure 2001a and in support structure 2004. The extent of etching of the dielectric in support structure 2004 is controlled by etch time. As shown
(59) Vacuum sealed MEMS device 2000 is fabricated using the standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques, with the following change:
(60) 17. In a vacuum, attach a silicon sealing wafer to the bottom of the die wafer using techniques such as electrostatic bonding, eutectic bonding, or glass frit.
(61) 18. Reduce the thickness of the sealing wafer to approximately 100 m, using techniques such as grinding, lapping, polishing, chemical-mechanical polishing (CMP), or combinations of these techniques.
(62) 19. Dice the silicon wafer.
(63) Lightweight-but-Rigid Capacitive Sensor Plates
(64) With the lightweight-but-rigid capacitive sensor plate 3000 partially shown in
(65) Sensor plate 3000 is fabricated using the standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques.
(66) As suggested by
(67) The shape and size of the plate may be varied according to the application for the plate. For example, when used as a back plate of a capacitive sensor, it may be rectangular and extend into the walls of a supporting structure surrounding the sensor structure. Further, when used as a back plate of a capacitive sensor, metallic layer 3001 could be perforated to be acoustically transparent; alternatively, openings 3005 could extend through metallic layer 3001. Further, the shape of the openings 3005 in metallic layers 3001 and/or 3002 could be any regular or irregular polygon, circle, or oval, the shape of the plate could be any regular or irregular polygon, circle, or oval, and the plate could include additional metallic layers.
(68) Mechanical Stops
(69) In the preferred embodiment of mechanical stops 4000a and 4000b of capacitive sensor diaphragm 4001, shown in
(70) In a pattern opposite that of the edges of metallic layers 4002 and 4003 of sensor diaphragm 4001, support structure 4006 includes at least two metallic layers 4007 and 4008 with offset edges adjacent to the offset edges of metallic layers 4002 and 4003. That is, on three sides, the edges of metallic layer 4007 extend beyond metallic layer 4008, and on the other three sides, the edges of metallic layer 4008 extend beyond metallic layer 4007, such that the edges of metallic layers 4007 and 4008 act as mechanical stops that prevent excessive movement of sensor diaphragm 4001.
(71) Referring now to
(72) A sensor with mechanical stops 4000a and 4000b can be fabricated using the standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques.
(73) In another preferred embodiment, metallic layer 4003b of cantilever 4009, shown in
(74) As shown in
(75) In another preferred embodiment, shown in
(76) A sensor with mechanical stops is fabricated in part using the standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques. However, standard CMOS fabrication rules would not normally allow vias without metallic layers above and below, and so the rules would need to be overridden during fabrication (there is nothing that physically prohibits fabricating such vias).
(77) While the embodiments of
(78) Structural Supports for a MEMS Device
(79) In a first preferred embodiment of a structural support for a MEMS die 5001, shown in
(80) In a second preferred embodiment of structural support for a MEMS die 5011, shown in
(81) In a third preferred embodiment of structural support for a MEMS die 5021, shown in
(82) Support via 5002, pillar 5012, and pillar 5022 are fabricated using the standard sub-micron CMOS fabrications techniques, for example, as disclosed above under General Fabrication Techniques. The specific shapes, locations, and number of supports 5002, 5012, and 5022 can be varied according to the shape, location, and purpose of the MEMS structures 5006, 5016, and 5026.
(83) Exemplar ApplicationCapacitive Microphone
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(85) In operation, as sound waves strike diaphragm 6001, diaphragm 6001 moves up and down like a piston within the structure 6005, changing the capacitance between diaphragm 6001 and back plate 6008. Springs 6002, 6003, and 6004 act to restore the position of diaphragm 6001 in between wave fronts. Pressure stops 6006 and 6007 limit the movement of diaphragm 6001 in response to excess pressure or physical shock.
(86) In this embodiment, back plate 6008 is positioned above substrate 6013, with diaphragm 6001 positioned above back plate 6008. Alternatively, microphone die 6000 could have been fabricated such that diaphragm 6001 is positioned above substrate 6013, with back plate 6008 positioned above diaphragm 6001. In either embodiment, the sound waves would strike diaphragm 6001 either from the top or from the bottom, depending on how microphone die 6000 is mounted in the microphone package. Various configurations for mounting microphone die 6000 in a package are disclosed, for example, in U.S. Pat. No. 8,121,331, which is incorporated by reference in its entirety.
(87) Exemplar ApplicationResonator
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(89) In operation, when an alternating current is applied to the resonator, the fingers of moving combs 7002 move between the fingers of fixed combs 7001, the resonant frequency of which determines an impedance minimum between the two elements. Although there is a vacuum in the chamber, anchors/pillars 7005 prevent metallic layer 7007 from bowing and potentially interfering with the movement of moving combs 7002. As such, there is no need for extra space in the chamber to account for bowing, and resonator 7000 will be thinner than prior art resonators. Additionally, metallic layer 7007 will act as a shield to protect the resonator from electromagnetic interference.
(90) Exemplar ApplicationFluid Pressure Sensor
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(92) As can be seen in
(93) In operation, as sensor die 8000 is exposed to pressure exerted by fluids or gases, diaphragm 8002 bows in proportion to the amount of pressure, changing the capacitance between diaphragm 8002 and back plate 8001. CMOS circuitry (not shown) in die 8000 detects the change in capacitance and converts it to a usable external signal. Further, as diaphragm 8002 is composed of a metallic layer, it also functions as a low resistance EMI shield to protect the die from electromagnetic interference.
(94) The embodiment of