Floating memristor emulator

Abstract

The floating memristor emulator is based on a circuit implementation that uses grounded capacitors and CFOAs in addition to combinations of diodes and resistors to provide the required nonlinearity and time constants. This circuit results in low power consumption, cost reduction and ease of implementation because it avoids the use of multipliers, ADCs and RDACs. The present circuit is used in an FM demodulator, which exploits the frequency-dependence of the memristance. Successful use in the FM demodulator confirmed the functionality of the present floating memristor emulator circuit.

Claims

1. A floating memristor emulator, comprising: first, second, third, and fourth current feedback operational amplifiers (CFOAs), each of the CFOAs having y, x, z, and w terminals, the y terminal of the first CFOA being connected to the z terminal of the second CFOA, the y terminal of the third CFOA being connected to the z terminal of the fourth CFOA, and the x terminals of the first and third CFOAs being in operable communication with each other; grounded capacitors C.sub.1 and C.sub.3 connected to the respective z terminal of CFOAs one and three; grounded capacitors C.sub.2 and C.sub.4 connected to the respective x terminal of CFOAs two and four; a differential voltage input, v.sub.inp, v.sub.inn formed from the y terminals of the first and third CFOAs; a potentiometer R.sub.5 having first and second end terminals and a wiper, the first terminal being connected to the y terminal of the fourth CFOA, the second terminal being connected to the y terminal of the second CFOA, and the wiper being connected to ground; a first parallel resistor-diode combination R.sub.3 and D.sub.1 connected in series with the first terminal of the potentiometer R.sub.5 and having a cathode portion of the diode D.sub.1 connected to the w terminal of the first CFOA; and a second parallel resistor-diode combination R.sub.2 and D.sub.2 connected in series with the second terminal of the potentiometer R.sub.5 and having an anode portion of the diode D.sub.2 connected to the w terminal of the third CFOA.

2. The floating memristor emulator according to claim 1, further comprising a potentiometer R.sub.1 connected between the x terminals of the first and third CFOAs to define the operable communication between the x terminals, the wiper of potentiometer R.sub.1 being connected to the third CFOA.

3. The floating memristor emulator according to claim 2, wherein current through the potentiometer R.sub.1 is characterized by the relation:
i.sub.R.sub.1=(v.sub.inpv.sub.inn)/R.sub.1, where v.sub.inp is an input voltage at they terminal of the first CFOA and v.sub.inn is an input voltage at the y terminal of the third CFOA.

4. The floating memristor emulator according to claim 3, wherein voltage at the w terminal of the first CFOA is characterized by the relation: $v_{R_p}=\frac{1}{C_1}\frac{v_{\mathrm{inp}}-v_{\mathrm{inn}}}{R_1}t.$

5. The floating memristor emulator according to claim 4, wherein current at the w terminal of the first CFOA is characterized by the relation: $i_{R_p}=\frac{v_{R_p}}{R_{5\mathrm{upper}}+R_{\mathrm{eq}1}},$ where R.sub.5upper is the first terminal of potentiometer R.sub.5, and R.sub.eq1 is a nonlinear equivalent resistance depending on the status of the diode D.sub.1.

6. The floating memristor emulator according to claim 5, wherein the voltage v.sub.1 at terminal y of the fourth CFOA is characterized by the relation: $v_1=\frac{v_{R_p}{R}_{5\mathrm{upper}}}{R_{5\mathrm{upper}}+R_{\mathrm{eq}1}}.$

7. The floating memristor emulator according to claim 6, wherein an outward current i.sub.inn from the y terminal of the third CFOA is characterized by the relation: $i_{\mathrm{inn}}=C_4\frac{v_1}{t}.$

8. The floating memristor emulator according to claim 7, wherein a voltage v.sub.R.sub.n at the w terminal of the third CFOA is characterized by the relation: $v_{R_n}=\frac{-1}{C_3}\frac{v_{\mathrm{inp}}-v_{\mathrm{inn}}}{R_1}t.$

9. The floating memristor emulator according to claim 8, wherein current i.sub.R.sub.n at the w terminal of the third CFOA is characterized by the relation: $i_{R_n}=\frac{-v_{R_n}}{R_{5\mathrm{lower}}+R_{\mathrm{eq}2}},$ where R.sub.5lower is the second terminal of potentiometer R.sub.5, and R.sub.eq2 is a nonlinear equivalent resistance depending on the status of the diode D.sub.2.

10. The floating memristor emulator according to claim 9, wherein the voltage v.sub.2 at terminal y of the second CFOA is characterized by the relation: $v_2=\frac{v_{R_n}{R}_{5\mathrm{lower}}}{R_{5\mathrm{lower}}+R_{\mathrm{eq}2}}.$

11. The floating memristor emulator according to claim 10, wherein an inward current i.sub.inp on the y terminal of the first CFOA is characterized by the relation: $i_{\mathrm{inp}}=-C_2\frac{v_2}{t}.$

12. The floating memristor emulator according to claim 11, wherein: diodes D.sub.1 and D.sub.2 have identical value; an input capacitance C.sub.i is characterized by the relation C.sub.1=C.sub.3; an output capacitance C.sub.d is characterized by the relation C.sub.2=C.sub.4; the wiper of potentiometer is set midway with $R_{5\mathrm{lower}}=R_{5\mathrm{lower}}=\frac{1}{2}{R}_5;$ and a differential voltage v.sub.R from the w terminals of the first and third CFOAs is characterized by the relation: $v_R=v_{R_p}-v_{R_n}=\frac{2}{C_i{R}_1}{v}_{M}t,$ where v.sub.M is a differential input voltage characterized by the relation v.sub.inpv.sub.inn.

13. The floating memristor emulator according to claim 12, wherein a differential current i.sub.R=i.sub.Rp=i.sub.Rn is characterized by the relation: $i_R=\frac{1}{k_1}{v}_{M}t,$ where k.sub.1 is a parameter characterized by the relation: $k_1=\frac{\left(R_5+2R_{\mathrm{eq}}\right)C_i{R}_1}{2}.$

14. The floating memristor emulator according to claim 13, wherein a differential input current i.sub.M is characterized by the relation: $i_M=i_{\mathrm{inp}}=i_{\mathrm{inn}}=k_2\frac{v_R}{t},$ where k.sub.2 is a parameter characterized by the relation: $k_2=\frac{C_d{R}_5}{R_5+2R_{\mathrm{eq}}}.$

15. The floating memristor emulator according to claim 14, further comprising: an inverting amplifier having an input and an output, the input being connected in a circuit with the floating memristor emulator, and wherein gain of the output varies in relation to a frequency of a signal at the input, defining an inverting amplifier-floating memristor circuit functioning as an FM discriminator.

16. The floating memristor emulator according to claim 15, further comprising an AM envelope detector having an input and an output, the FM discriminator having an output connected to the input of an AM envelope detector, the envelope detector having an output fully demodulating an FM signal input to the FM discriminator.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic diagram of a floating memristor emulator according to the present invention.

(2) FIG. 2A is a schematic diagram showing an I.sub.M model in terms of input current for a floating memristor emulator according to the present invention.

(3) FIG. 2B is a schematic diagram showing an I.sub.R model in terms of emulator current for a floating memristor emulator according to the present invention.

(4) FIG. 3A is a plot showing current and voltage waveform characteristics of the floating memristor emulator according to the present invention.

(5) FIG. 3B is a plot showing current-voltage characteristics with a wide difference in the resistance values of the floating memristor emulator according to the present invention.

(6) FIG. 4A is a plot showing current and voltage waveform characteristics of the floating memristor emulator according to the present invention at 2.9 kHz.

(7) FIG. 4B is a plot showing current-voltage characteristics with narrow difference in resistance values at 2.9 kHz of the floating memristor emulator according to the present invention.

(8) FIG. 5 is a plot showing behavior at 6.0 kHz of the floating memristor emulator according to the present invention.

(9) FIG. 6 is a schematic diagram showing a test circuit for the floating memristor emulator according to the present invention.

(10) FIG. 7 is a schematic diagram showing a FM demodulator using the floating memristor emulator according to the present invention.

(11) FIG. 8 is a plot showing FM and the converted AM of the FM demodulator using the floating memristor emulator according to the present invention.

(12) FIG. 9 is a plot showing the converted AM signal and the output demodulated signal of the FM demodulator using the floating memristor emulator according to the present invention.

(13) FIG. 10 is a plot showing the input FM signal and the output modulating signal at the output of the low pass filter connected to the FM demodulator using the floating memristor emulator according to the present invention.

(14) Similar reference characters denote corresponding features consistently throughout the attached drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(15) The present floating memristor emulator circuit includes four current feedback operational amplifiers (CFOA's 102a, 102b, 102c, and 102d), configured as shown in FIG. 1. The first 102a, second 102c, third 102b, and fourth 102d current feedback operational amplifiers (CFOAs), each have y, x, z, and w terminals. The y terminal of first CFOA1 102a is connected two the z terminal of the second CFOA2 102c. The y terminal of the third CFOA3 102b is connected to the z terminal of the fourth CFOA4 102d. A differential voltage input, v.sub.inp, v.sub.inn is formed from the y terminals of the first and third CFOAs (102a, 102b). The x terminals of CFOA1 102a and CFOA3 102b are in operable communication with each other. For example, a potentiometer R.sub.1 may be connected between the x terminals of CFOA1 102a and CFOA3 102b (the wiper portion being connected to CFOA3 102b). Grounded capacitors C.sub.1 through C.sub.4 are connected to their respective CFOAs (102a, 102c, 102b, and 102d). A parallel combination (R.sub.3 and D.sub.1) has a cathode portion of D) connected to the w terminal of COFA1 102a. The R.sub.3, D.sub.1 combination is connected in series with the upper part of the potentiometer R.sub.5 which is connected to the y terminal of CFOA4 102d. The wiper portion of potentiometer R.sub.5 is connected to ground. A parallel combination (R.sub.2 and D.sub.2) has an anode portion of D.sub.2 connected to the w terminal of COFA3 102b. The R.sub.2, D.sub.2 combination is connected in series with the lower part of the potentiometer R.sub.5, which is connected to they terminal of CFOA2 102c. The input voltage produces a current through the resistance R.sub.1 given by:
i.sub.R.sub.1=(v.sub.inpv.sub.inn/R.sub.1.(1)

(16) This current will flow outward from terminal x of CFOA1 (102a) and inward into terminal x of CFOA3 102b. This current will be induced in terminal z of CFOA1 (102a), where it will be integrated by the capacitor C.sub.1 to produce a voltage given by:

(17) $\begin{array}{cc}{v}_{R_p}=\frac{1}{C_1}\frac{v_{\mathrm{inp}}-v_{\mathrm{inn}}}{R_1}t.& \left(2\right)\end{array}$

(18) This voltage will be induced on terminal w of CFOA1 (102a) and will produce an outward current from terminal w of CFOA1 (102a), i.sub.Rp through the parallel combination of R.sub.3 and D.sub.1 in series with the upper part of the potentiometer R.sub.5. This current can be expressed as:

(19) $\begin{array}{cc}{i}_{R_p}=\frac{v_{R_p}}{R_{5\mathrm{upper}}+R_{\mathrm{eq}1}}.& \left(3\right)\end{array}$

(20) In equation (3), R.sub.5upper is the resistance of the upper part of the potentiometer R.sub.5 and R.sub.eq1 is a nonlinear resistance that depends on the status of the diode D.sub.1. The voltage at terminal y of the CFOA 4 (102d) will depend on the status of the diode D.sub.1. This voltage can be expressed as:

(21) $\begin{array}{cc}{v}_1=\frac{v_{R_p}{R}_{5\mathrm{upper}}}{R_{5\mathrm{upper}}+R_{\mathrm{eq}1}}.& \left(4\right)\end{array}$

(22) The voltage v.sub.1 will be induced on terminal x of the CFOA4 (102d) and will be differentiated by the capacitor C.sub.4. Thus, the outward current in the lower input terminal will be given by:

(23) $\begin{array}{cc}{i}_{\mathrm{inn}}=C_4\frac{v_1}{t}.& \left(5\right)\end{array}$

(24) In a similar way the current i.sub.R.sub.1 will be induced in the terminal z of CFOA3 (102b) and will be integrated by the capacitor C.sub.3 to produce a voltage given by:

(25) $\begin{array}{cc}{v}_{R_n}=\frac{-1}{C_3}\frac{v_{\mathrm{inp}}-v_{\mathrm{inn}}}{R_1}t.& \left(6\right)\end{array}$

(26) In equations (2) and (6), the voltage v.sub.M=v.sub.inpv.sub.inn is the differential input voltage. The voltage v.sub.Rn will be induced on terminal w of CFOA3 (102b) and will produce an inward current i.sub.Rn through the parallel combination of R.sub.2 and D.sub.2 in series with the lower part of the potentiometer R.sub.5. This current can be expressed as:

(27) $\begin{array}{cc}{i}_{R_n}=\frac{-v_{R_n}}{R_{5\mathrm{lower}}+R_{\mathrm{eq}2}}.& \left(7\right)\end{array}$

(28) In equation (6) R.sub.5lower is the resistance of the lower part of the potentiometer R.sub.5 and R.sub.eq2 is a nonlinear resistance that depends on the status of the diode D.sub.2. The voltage at terminal y of CFOA2 (102c) can be expressed as:

(29) $\begin{array}{cc}{v}_2=\frac{v_{R_n}{R}_{5\mathrm{lower}}}{R_{5\mathrm{lower}}+R_{\mathrm{eq}2}}.& \left(8\right)\end{array}$

(30) In equation (8), R.sub.5lower is the resistance of the lower part of the potentiometer R.sub.5 and R.sub.eq2 is a nonlinear resistance that depends on the status of the diode. This voltage will be induced on terminal x of CFOA2 (102c) and will be differentiated by the capacitor C.sub.2. Thus, the inward current in the upper input terminal will be given by:

(31) $\begin{array}{cc}{i}_{\mathrm{inp}}=-C_2\frac{v_2}{t}.& \left(9\right)\end{array}$

(32) Assuming that the diodes D.sub.1 and D.sub.2 are identical, C.sub.1=C.sub.3=C.sub.i, C.sub.2=C.sub.4=C.sub.d, R.sub.2=R.sub.3, and the potentiometer R.sub.5 is midway with

(33) $R_{5\mathrm{upper}}=R_{5\mathrm{lower}}=\frac{1}{2}{R}_5,$
then R.sub.eq1=R.sub.eq2=R.sub.eq,

(34) 0$v_{R_n}=-v_{R_p}=-\frac{1}{2}{v}_R,$
i.sub.Rn=i.sub.Rp=i.sub.R and v.sub.2=v.sub.1. Combining equations (1) and (6), the voltage v.sub.R=v.sub.Rpv.sub.Rn can be expressed as:

(35) $\begin{array}{cc}{v}_R=v_{R_p}-v_{R_n}=\frac{2}{C_i{R}_1}{v}_{m}t.& \left(10\right)\end{array}$

(36) Using equations (2), (3), (6) and (7) the current i.sub.R=i.sub.Rp=i.sub.Rn can be expressed as:

(37) $\begin{array}{cc}{i}_R=\frac{1}{k_1}{v}_{m}t.& \left(11\right)\end{array}$
In equation (11) the parameter k.sub.1 is given by,

(38) $\begin{array}{cc}{k}_1=\frac{\left(R_5+2R_{\mathrm{eq}}\right)C_i{R}_1}{2}.& \left(12\right)\end{array}$
Also combining equations (5) and (9) the input current can be expressed as:

(39) $\begin{array}{cc}{i}_M=i_{\mathrm{inp}}=i_{\mathrm{inn}}=k_2\frac{v_R}{t}.& \left(13\right)\end{array}$
In equation (13) the parameter k.sub.2 is given by:

(40) $\begin{array}{cc}{k}_2=\frac{C_d{R}_5}{R_5+2R_{\mathrm{eq}}}.& \left(14\right)\end{array}$

(41) Equations (11) and (13) can be represented by models 200a and 200b of FIGS. 2A and 2B, respectively. Models 200a and 200b correspond to a voltage-controlled memristor, where the voltage exciting the memristor v.sub.M is integrated in the form of a current i.sub.R. This current is converted via a nonlinear resistor to voltage v.sub.R, and the voltage is transformed by differentiation to the memristor current i.sub.M. As stated supra, the present memristor emulator circuit uses four CFOAs. They are of type AD844. Simple Germanium (Ge) diodes in the circuit provide the necessary nonlinear function. Four equal-valued, grounded capacitors (47 nF) complete the z and x terminal connections for memristor circuit 100. Two equal-valued resistors (3 k) complete the w and y terminal connections for memristor circuit 100. The variability of the resistor connections, wherein the equal-valued 3 k resistors are interconnected by a 1 k potentiometer, allows for compensation for any mismatch between the capacitors (C.sub.1, C.sub.2, C.sub.3, and C.sub.4).

(42) Experimental results of the floating memristor emulator circuit 100 are shown in plots 300a, 300b, 400a, 400b, and 500 of FIGS. 3A, 3B, 4A, 4B, and 5, respectively. Inspection of the plots clearly shows the frequency dependence of the memristance. As the frequency increases, the memristor emulator tends to behave as a normal resistor.

(43) The functionality of the present floating memristor emulator circuit 100 of FIG. 1 was tested by using it in FM-to-AM conversion. The FM-AM conversion circuit 600 shown in FIG. 6 is a simple frequency dependent, variable-gain inverting amplifier exploiting to advantage the frequency dependence of the memristance to form an FM discriminator circuit that is used in the first stage of the FM demodulator 700 shown in FIG. 7. The FM-AM conversion circuit 600 was tested using an FM signal formed of a carrier of frequency=2 kHz, a modulating frequency=100 Hz and frequency deviation=900 Hz. As shown in FIG. 7, the output of FM-to-AM converter (discriminator) 600 circuit of FIG. 6 was applied to an envelope detector of the FM demodulator 700, which fully demodulates an FM signal input to the FM discriminator. A low pass filter follows the envelope detector. The first stage of the FM demodulator uses the floating memristor emulator 100 connected to the negative input of an operational amplifier OA1 with resistive negative feedback (R1). The positive input of OA1 is connected to ground. Operational amplifier OA1's output feeds a second stage (envelope detector) of the FM demodulator. The results obtained are shown in plots 800-1000 of FIGS. 8-10, respectively. Inspection of plots 800 through 1000 clearly shows that the present FM-to-AM converter works as expected and exploits to advantage the frequency dependence of the floating memristor emulator 100 of FIG. 1.

(44) It is to be understood that the present invention is not limited to the embodiments described above, but encompasses any and all embodiments within the scope of the following claims.