Dimmer output emulation with non-zero glue voltage

Abstract

An apparatus may include a dimmer output voltage emulator for causing a power converter interface circuit to draw current from a capacitor in the power converter interface during a period of time when a dimmer coupled to the power converter interface circuit is non-conducting to generate an emulated dimmer output voltage. The emulated dimmer output voltage may emulate part of a cycle of a non-zero AC dimmer output voltage of the dimmer after a triac of the dimmer prematurely stops conducting that would occur if the triac continued conducting during the part of the cycle. The dimmer output voltage emulator may include a pull-down circuit to pull down current of the interface circuit and generally decrease the emulated dimmer output voltage during a first period of time and a hold circuit to maintain the emulated dimmer output voltage below a substantially non-zero threshold value during a second period of time.

Claims

1. An apparatus comprising: a dimmer output voltage emulator configured to cause a power converter interface circuit to draw current from a capacitor in the power converter interface during a period of time when a dimmer coupled to the power converter interface circuit is non-conducting to generate an emulated dimmer output voltage, wherein: the emulated dimmer output voltage emulates part of a cycle of a non-zero alternating current dimmer output voltage of the dimmer after a triac of the dimmer prematurely stops conducting that would occur if the triac continued conducting during the part of the cycle; and the dimmer output voltage emulator comprises a pull-down circuit to pull-down current of the power converter interface circuit and generally decrease the emulated dimmer output voltage during a first period of time and a hold circuit to maintain the emulated dimmer output voltage below a substantially non-zero threshold value during a second period of time.

2. The apparatus of claim 1, wherein the hold circuit provides a steady state current draw from the power converter interface circuit during the second period of time.

3. The apparatus of claim 1, wherein the first period of time begins when a triac of a triac-based dimmer circuit ceases conducting during a cycle of an AC supply voltage, the second period of time begins when the supply voltage is below a second threshold voltage, the first period ends when the second period begins, and the second period ends when the supply voltage begins to increase.

4. The apparatus of claim 3, wherein the second threshold voltage is approximately zero.

5. The apparatus of claim 1, wherein the dimmer is a trailing-edge dimmer.

6. A method comprising: causing a power converter interface circuit to draw current from a capacitor in the power converter interface during a period of time when a dimmer coupled to the power converter interface circuit is non-conducting to generate an emulated dimmer output voltage, wherein generating the emulated dimmer output voltage comprises: emulating part of a cycle of a non-zero alternating current dimmer output voltage of the dimmer after a triac of the dimmer prematurely stops conducting that would occur if the triac continued conducting during the part of the cycle; and pulling down current of the power converter interface circuit and generally decreasing the emulated dimmer output voltage during a first period of time and maintaining the emulated dimmer output voltage below a substantially non-zero threshold value during a second period of time.

7. The method of claim 6, wherein maintaining the emulated dimmer output voltage below the substantially non-zero threshold value during the second period of time comprises providing a steady state current draw from the power converter interface circuit during the second period of time.

8. The method of claim 6, wherein the first period of time begins when a triac of a triac-based dimmer circuit ceases conducting during a cycle of an AC supply voltage, the second period of time begins when the supply voltage is below a second threshold voltage, the first period ends when the second period begins, and the second period ends when the supply voltage begins to increase.

9. The apparatus of claim 8, wherein the second threshold voltage is approximately zero.

10. The apparatus of claim 6, wherein the dimmer is a triac-based dimmer.

11. An apparatus comprising: a power converter interface circuit configured to couple to a dimmer; a dimmer output voltage emulator coupled to the power converter interface circuit and configured to cause the power converter interface circuit to generate an emulated dimmer output voltage, wherein: the emulated dimmer output voltage emulates part of a cycle of a non-zero alternating current dimmer output voltage of the dimmer after a triac of the dimmer prematurely stops conducting that would occur if the triac continued conducting during the part of the cycle; and the dimmer output voltage emulator comprises a pull-down circuit to pull-down current of the power converter interface circuit and generally decrease the emulated dimmer output voltage during a first period of time and a hold circuit to maintain the emulated dimmer output voltage below a substantially non-zero threshold value during a second period of time; a power converter coupled to the dimmer output voltage emulator; and a controller coupled to the dimmer output voltage emulator and the power converter, wherein the controller is configured to control the power converter in accordance with the emulated dimmer output voltage.

12. The apparatus of claim 11, wherein the hold circuit provides a steady state current draw from the power converter interface circuit during the second period of time.

13. The apparatus of claim 11, wherein the first period of time begins when a triac of a triac-based dimmer circuit ceases conducting during a cycle of an AC supply voltage, the second period of time begins when the supply voltage is below a second threshold voltage, the first period ends when the second period begins, and the second period ends when the supply voltage begins to increase.

14. The apparatus of claim 13, wherein the second threshold voltage is approximately zero.

15. The apparatus of claim 11, wherein the dimmer is a trailing-edge dimmer.

16. The apparatus of claim 11, wherein the power converter is a switching power converter.

17. The apparatus of claim 11, further comprising a lamp coupled to the power converter.

18. The apparatus of claim 17, wherein the lamp comprises a light-emitting diode lamp.

19. The apparatus of claim 11, wherein the apparatus comprises a lamp assembly configured to house a lamp.

20. The apparatus of claim 19, wherein the lamp assembly comprises a multifaceted reflector form factor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:

(2) FIG. 1 illustrates a lighting system that includes a triac-based leading-edge dimmer, as is known in the art;

(3) FIG. 2 illustrates example voltage and current graphs associated with the lighting system depicted in FIG. 1, as is known in the art;

(4) FIG. 3 illustrates an example lighting system having a dimmer output voltage emulator, in accordance with embodiments of the present disclosure;

(5) FIG. 4 illustrates an example lighting system similar to that of FIG. 3 with selected components of an example dimmer and example power converter interface circuit, in accordance with embodiments of the present disclosure;

(6) FIG. 5 illustrates example voltage graphs associated with the lighting system of FIG. 4, in accordance with embodiments of the present disclosure;

(7) FIG. 6 illustrates an example dimmer emulator, in accordance with embodiments of the present disclosure; and

(8) FIG. 7 illustrates example voltage and current graphs involving an emulated dimmer output voltage which is caused by an embodiment of a pull-down circuit, in accordance with embodiments of the present disclosure.

DETAILED DESCRIPTION

(9) FIG. 3 illustrates an example lighting system 300 having a dimmer output voltage emulator 302, in accordance with embodiments of the present disclosure. Voltage supply 306 may generate a supply voltage V.sub.SUPPLY, which in some embodiments may be identical or similar to the supply voltage generated by voltage supply 104 of FIG. 1. Dimmer 308 may generate a dimmer voltage V.sub.DIM and may provide dimmer voltage V.sub.DIM to power converter interface circuit 304. In some embodiments, dimmer 308 may be identical or similar to triac-based dimmer 102 of FIG. 1. Dimmer emulator 302 may sense dimmer voltage V.sub.DIM and generate an emulator signal E.sub.S that causes the power converter interface circuit 304 to generate an emulated dimmer output voltage V.sub.EDV. Emulated dimmer output voltage V.sub.EDV may effectively function as a dimmer output voltage. Power converter interface circuit 304 may convert the emulated dimmer output voltage V.sub.EDV into a link voltage V.sub.L to power converter 314.

(10) Dimmer emulator 302 may also provide a dimmer information signal D.sub.S to controller 312. Dimmer information signal D.sub.S may indicate how much energy power converter 314 should provide to load 310. For example, if dimmer signal V.sub.DIM indicates a 50% dimming level, then dimmer information signal D.sub.S may indicate a 50% dimming level. Controller 312 may respond to the dimmer information signal D.sub.S and cause power converter 314 to provide 50% power to load 310. The particular generation of emulator signal E.sub.S and dimmer information signal D.sub.S are matters of design choice and, for example, depend on the particular respective designs of power converter interface circuit 304 and controller 312. In some embodiments, dimmer emulator 302 may include an analog-to-digital converter to convert the dimmer signal V.sub.DIM into a digital dimmer information signal D.sub.S. In these and other embodiments, dimmer emulator 302 may include a timer that determines the phase delay of the dimmer signal V.sub.DIM and may convert the phase delay into dimmer information signal D.sub.S. In these and other embodiments, emulator signal E.sub.S may be a current that controls the emulated dimmer output voltage V.sub.EDV. In some embodiments, emulator signal E.sub.S and dimmer signal information signal D.sub.S may be two different signals. In other embodiments, emulator signal E.sub.S and dimmer information signal D.sub.S may be the same signal.

(11) Load 310 may comprise any type of load. In at least one embodiment, load 310 may include one or more lamps, such as one or more light emitting diodes (LEDs). The particular type and design of controller 312 is a matter of design choice. An example of a controller 312 may be any controller available from Cirrus Logic, Inc. having offices in Austin, Tex., USA. The particular type and design of power converter 314 is a matter of design choice. In some embodiments, power converter 314 may be a switching power converter, such as a boost-type, buck-type, boost-buck-type, or Cuk-type switching power converter. In these and other embodiments, power converter 314 provides power factor correction and regulates output voltage V.sub.OUT and/or current delivered to load 310. For example, U.S. Pat. No. 7,719,246, entitled Power Control System Using a Nonlinear Delta-Sigma Modulator with Nonlinear Power Conversion Process Modeling, filed Dec. 31, 2007, with inventor John L. Melanson describes example power converters and controllers that may be used in connection with this disclosure.

(12) FIG. 4 illustrates an example lighting system 400 similar to that of FIG. 3 with selected components of example dimmer 102 and example power converter interface circuit 402, in accordance with embodiments of the present disclosure. FIG. 5 illustrates example voltage graphs associated with the lighting system 400, in accordance with embodiments of the present disclosure. Voltage supply 306 may provide a supply voltage V.sub.SUPPLY, and triac-based dimmer 102 may generate a dimmer voltage V.sub..sub._.sub.DIM as described in conjunction with FIG. 1. In the embodiments represented by FIG. 5, triac 106 may turn ON at time t.sub.1 when the supply voltage V.sub.SUPPLY is at 45 and 225. Power converter interface circuit 402, which represents an example power converter interface 304, may include a full-bridge diode rectifier 404 that rectifies dimmer voltage V.sub..sub._.sub.DIM to generate voltage V.sub..sub._.sub.R, while the triac 106 is ON between times t.sub.1 and t.sub.2. The voltage V.sub..sub._.sub.R may recharge capacitor 414. In some embodiments, load 310 presents a low wattage load to power interface circuit 402. For example, in some embodiments, load 310 may include one or more low wattage lamps, such as 5- to 10-watt light emitting diodes (LEDs). In this embodiment, load 310 may draw a relatively small amount of current which may cause the dimmer current i.sub.DIM to drop below the holding current value HC at time t.sub.2. Thus, as shown in FIG. 5, current i.sub.DIM may fall below the holding current value HC, and triac 106 may turn OFF prematurely at time t.sub.2. Conventionally, when triac 106 turns OFF at time t.sub.2, triac 106 would chop the trailing edge of rectified voltage V.sub..sub._.sub.R at time t.sub.2. However, dimmer emulator 408, which represents one embodiment of dimmer emulator 302, may cause power converter interface circuit 402 to emulate a continuous rectified voltage V.sub..sub._.sub.R.

(13) When triac 106 turns OFF, capacitor 406 may maintain the voltage across triac 106 and inductor 120 low so that very little current is drawn from the timing circuit 115 during time period T.sub.ON. In some embodiments, the current drawn from the timing circuit 115 may be low enough to prevent triac 106 from firing prior to the next phase cut ending time at time t.sub.4. Capacitor 406 may have a capacitance value of, for example, 100 nF.

(14) In some embodiments, supply voltage V.sub.SUPPLY may comprise a sine wave. Thus, the ideal voltage V.sub..sub._.sub.R during the ON period T.sub.ON is a portion of a sine wave. Voltage V.sub..sub._.sub.R may charge capacitor 412. A current i.sub.R that is proportional to the derivative of the voltage V.sub..sub._.sub.R over time, i.e. i.sub.R dV.sub..sub._.sub.R/dt, and drawn from capacitor 412 may cause the voltage V.sub..sub._.sub.R across capacitor 412 to emulate the dimmer output voltage V.sub.DIM that would occur if the dimmer current i.sub.DIM remained above the holding current value HC. Thus, when triac 106 turns OFF, the voltage V.sub..sub._.sub.R may become an emulated dimmer output voltage (e.g., an emulated dimmer output voltage V.sub.EDV of FIG. 3). Accordingly, in some embodiments, dimmer emulator 408 may generate a current i.sub.R to cause power converter interface circuit 402 to generate voltage V.sub..sub._.sub.R as the emulated dimmer output voltage V.sub.EDV. When dimmer emulator 408 generates a current i.sub.R to cause power converter interface circuit 402 to generate voltage V.sub..sub._.sub.R, voltage V.sub..sub._.sub.R may be referred to as the emulated dimmer output voltage V.sub..sub._.sub.R.

(15) When the triac 106 is turned ON, current i.sub.R may charge link capacitor 414 through diode 416 as long as the voltage V.sub..sub._.sub.R exceeds the link voltage V.sub.L by at least the forward-biased voltage (e.g., 0.7V) of diode 416. In some embodiments, link capacitor 414 may have a large enough capacitance to provide an approximately constant link voltage V.sub.L to power converter 314. In some embodiments, the capacitance of capacitor 412 is 10 nF, and the capacitance of link capacitor 414 is 1.5 F.

(16) As the voltage V.sub..sub._.sub.R decreases, the current i.sub.DIM may decrease below the holding current value HC at time t.sub.2, and triac 106 may turn OFF at time t.sub.2. Dimmer emulator 408 may then discharge capacitor 412 by drawing current i.sub.R from capacitor 412. During the time between t.sub.2 and t.sub.3, dimmer emulator 408 may draw current i.sub.R in proportion to dV.sub..sub._.sub.R/dt so that the emulated dimmer output voltage V.sub..sub._.sub.R emulates a decreasing sine wave. As the voltage V.sub..sub._.sub.R approaches zero volts at time t.sub.3, the dimmer emulator 408 may draw sufficient current i.sub.R from capacitor 412 to hold the voltage V.sub..sub._.sub.R below a threshold voltage V.sub.GLUE, until the triac 106 turns ON again at time t.sub.4. Holding the voltage V.sub..sub._.sub.R low during the OFF period T.sub.GLUE allows the timing circuitry 115 to reset and turn triac 106 ON at time t.sub.4 during the next half cycle of the supply voltage V.sub.SUPPLY.

(17) Dimmer emulator 408 can be implemented in any of a variety of ways. For example, U.S. Pat. No. 8,569,972, entitled Dimmer Output Emulation, filed Aug. 17, 2010, with inventor John L. Melanson describes example dimmer emulators that, if adapted consistent with this disclosure, may be used in connection with embodiments of this disclosure.

(18) FIG. 6 illustrates an example dimmer emulator 600, in accordance with embodiments of the present disclosure. Dimmer emulator 600 may be used in embodiments of dimmer emulator 302 and/or dimmer emulator 408. Dimmer emulator 600 represents embodiments of a current source that controls current i.sub.R. Dimmer emulator 600 includes a pull-down circuit 602 to pull-down current i.sub.R after triac 106 turns OFF, and a hold or glue circuit 604 to hold the emulated dimmer output voltage V.sub..sub._.sub.R to below a threshold voltage V.sub.GLUE until the triac 106 fires in a next half-cycle of dimmer voltage V.sub.DIM.

(19) FIG. 7 illustrates example voltage and current graphs involving an emulated dimmer output voltage V.sub..sub._.sub.R which is caused by an embodiment of pull-down circuit 602, in accordance with embodiments of the present disclosure. Referring to FIGS. 6 and 7, because supply voltage V.sub.SUPPLY is a cosine wave, and current i.sub.R is directly related to the derivative of emulated dimmer output voltage V.sub..sub._.sub.R, the ideal relationship between current i.sub.R and emulated dimmer output voltage V.sub..sub._.sub.R for a half cycle of supply voltage V.sub.SUPPLY is a quarter sine wave 702. However, a linearly decreasing relationship 704 between current i.sub.R and emulated dimmer output voltage V.sub..sub._.sub.R is a close approximation of the ideal waveform 702. The i.sub.R versus emulated dimmer output voltage V.sub..sub._.sub.R relationship 704 may cause power converter interface circuit 402 to generate an oval emulated dimmer output voltage V.sub..sub._.sub.R versus time graph 706, which is a close approximation to a phase cut supply voltage V.sub.SUPPLY.

(20) In general, pull-down circuit 602 may create a linearly decreasing relationship 704 between current i.sub.R and emulated dimmer output voltage V.sub..sub._.sub.R. Pull-down circuit 602 may include an operational amplifier 605 which includes a non-inverting input terminal + to receive a pull-down reference voltage V.sub.REF.sub._.sub.PD. A feedback loop with voltage divider R1 and R2 between the emulated dimmer output voltage V.sub..sub._.sub.R terminal 605 and voltage V.sub.B at node 612 creates an inverse relationship between voltage V.sub.B and emulated dimmer output voltage V.sub..sub._.sub.R. Thus, as the emulated dimmer output voltage V.sub..sub._.sub.R decreases, operational amplifier 605 drives the gate of n-channel metal oxide semiconductor field effect transistor (NMOSFET) 608 to increase the voltage V.sub.B so that the voltage V.sub.A at the inverting terminal matches the reference voltage V.sub.REF.sub._.sub.PD at the non-inverting terminal +. Similarly, as emulated dimmer output voltage V.sub..sub._.sub.R increases, operational amplifier 605 drives the gate of NMOSFET 608 to decrease voltage V.sub.B so that the voltage V.sub.A at the inverting terminal continues to match the reference voltage V.sub.REF.sub._.sub.PD at the non-inverting terminal +.

(21) The voltage V.sub.DRIVE at the gate of NMOSFET 606 maintains NMOSFET 606 in saturation mode. In some embodiments, voltage V.sub.DRIVE is +12V. Voltage V.sub.B across resistor 614 determines the value of current i.sub.R (i.e., i.sub.R=V.sub.B/R.sub.3, where R.sub.3 is the resistance value of resistor 614). Thus, current i.sub.R varies directly with voltage V.sub.B and, thus, varies inversely with emulated dimmer output voltage V.sub..sub._.sub.R as depicted by the linearly decreasing i.sub.R versus V.sub..sub._.sub.R relationship 704. From the topology of pull-down circuit 602, voltage V.sub.B is related to the reference voltage V.sub.REF.sub._.sub.PD in accordance with the following equation:
V.sub.B=V.sub.REF.sub._.sub.PD(R.sub.1+R.sub.2)/R.sub.1R.sub.2V.sub..sub._.sub.R/R.sub.1
Where R.sub.1 is the resistance value of resistor 607, and R.sub.2 is the resistance value of resistor 609. If R.sub.1>>R.sub.2, then the voltage V.sub.B may be represented by equation:
V.sub.BV.sub.REF.sub._.sub.PDR.sub.2V.sub..sub._.sub.R/R.sub.1

(22) Because i.sub.R=V.sub.B/R3, if R.sub.1 is 10 M, R.sub.2 is 42 k, and R.sub.3 is 1 k, i.sub.R may be represented by the equation:
i.sub.R0.8(1V.sub..sub._.sub.R/190)mA

(23) Once the pull-down circuit 602 lowers the emulated dimmer output voltage V.sub..sub._.sub.R to a glue down reference voltage V.sub.REF.sub._.sub.GL, glue-down circuit 604 may hold the emulated dimmer output voltage V.sub. R at or below a threshold voltage V.sub.GLUE until the triac 106 fires and raises the emulated dimmer output voltage V.sub..sub._.sub.R. Comparator 616 of glue-down circuit 604 may compare emulated dimmer output voltage V.sub..sub._.sub.R with glue-down reference voltage V.sub.REF.sub._.sub.GL. The particular value of the glue-down reference voltage V.sub.REF.sub._.sub.GL is a matter of design choice. In at least one embodiment, voltage V.sub.REF.sub._.sub.GL is set so that glue-down circuit 604 holds the voltage V.sub..sub._.sub.R at approximately threshold voltage V.sub.GLUE when the voltage V.sub..sub._.sub.R approaches 0V. For example, in some embodiments, glue-down reference voltage V.sub.REF.sub._.sub.GL may be set to 5V. In other embodiments, glue-down reference voltage V.sub.REF GL may be set to a higher voltage (e.g., 10V, 15V, 20V). Because NMOSFET 606 operates in saturation mode, the voltage at node 610 is approximately equal to emulated dimmer output voltage V.sub..sub._.sub.R. When emulated dimmer output voltage V.sub..sub._.sub.R is greater than the glue-down reference voltage V.sub.REF.sub._.sub.GL, the output voltage V.sub.COMP of comparator 616 is a logical 0. In some embodiments, the comparator output voltage V.sub.COMP may be passed directly as signal GLUE_ENABLE to an input of a logical AND gate 632.

(24) In some embodiments, glue-down circuit 604 may also include pull-down, glue logic (P-G logic) 628. The P-G logic 628 may generate the signal GLUE_ENABLE to control conductivity of switch 618. The particular function(s) of P-G logic 628 are a matter of design choice. For example, in some embodiments, P-G logic 628 may enable and disable glue-down circuit 604. In such embodiments, to enable and disable glue-down circuit 604, P-G logic 628 may determine whether the dimmer output voltage V.sub..sub._.sub.DIM contains any phase cuts. If the dimmer output voltage V.sub..sub._.sub.DIM does not indicate any phase cuts, then the P-G logic 628 may disable the glue-down circuit 604 by generating the GLUE_ENABLE signal with a value of logical 0 such that the output and logical AND gate is a logical 0 and switch 618 does not conduct regardless of the value of comparator output voltage V.sub.COMP. In some embodiments, P-G logic 628 may include a timer that may determine how often the comparator output voltage V.sub.COMP changes logical state. If the time between logical state changes is consistent with no phase cuts, P-G logic 628 may disable glue-down circuit 604.

(25) Comparator 630 of glue-down circuit 604 may compare emulated dimmer output voltage V.sub..sub._.sub.R (e.g., at node 610) with a threshold voltage V.sub.GLUE. The particular value of threshold voltage V.sub.GLUE is a matter of design choice. In embodiments in which threshold voltage V.sub.GLUE is approximately 0 V, or in embodiments of glue-down circuit 604 in which comparator 630 and AND gate 632 are not present (thus allowing the GLUE_ENABLE signal to pass directly to switch 618), a low impedance of a power converter interface circuit (e.g., power converter interface circuit 304, power converter interface circuit 402) may be presented to a dimmer (e.g., dimmer 308, dimmer 102), which may lead to a small average direct current in a load (e.g., load 310), which may cause flicker, may cause other elements of a lighting system (e.g., a transformer) to overheat, or may cause other undesirable effects, especially when many loads (e.g., low-power lamps) are coupled to the dimmer. Accordingly, in some embodiments of the present disclosure, threshold voltage V.sub.GLUE may be set to a substantially non-zero voltage (e.g., 2V, 5V, 10V). When emulated dimmer output voltage V.sub..sub._.sub.R exceeds threshold voltage V.sub.GLUE, the output of comparator 630 may have a value of logical 1, otherwise the output of comparator 630 may have a value of logical 0.

(26) Logical AND gate 632 may perform a logical AND of the GLUE_ENABLE signal and the signal output by comparator 630, such that the output of logical AND gate 632 is a logical 1 when the output of comparator 630 and the GLUE_ENABLE signal are both logical 1, and the output of logical AND gate 632 is a logical 0 otherwise. The output of logical AND gate 632 may be communicated to a control terminal of switch 618. Switch 618 may be any type of switch and is, for example, an NMOSFET. When the logical AND gate 632 output voltage is a logical 0, switch 618 may be OFF, and NMOSFETs 620 and 622 may also be also OFF. When the logical AND gate 632 output voltage is a logical 1, NMOSFETs 620 and 622 may conduct. NMOSFETs 620 and 622 are configured as a current mirror sharing a common gate terminal 624. A current source 626 may generate a glue current i.sub.GLUE, which is mirrored through NMOSFET 620. In some embodiments, when emulated dimmer output voltage V.sub..sub._.sub.R is less than glue-down reference voltage V.sub.REF.sub._.sub.GL and emulated dimmer output voltage V.sub..sub._.sub.R is greater than threshold voltage V.sub.GLUE, current i.sub.R may be approximately equal to glue current i.sub.GLUE. The glue current i.sub.GLUE may set to a value large enough to hold the emulated dimmer output voltage V.sub..sub._.sub.R at or below threshold voltage V.sub.GLUE until triac 106 of FIG. 4 fires again. In some embodiments, glue current i.sub.GLUE may be at least as large as the holding current value HC of dimmer 102 of FIG. 4, such as 250 mA. Thus, glue-down circuit 604 draws a steady-state glue current i.sub.GLUE from the power converter interface circuit 402 to maintain the emulated dimmer output voltage V.sub..sub._.sub.R at or below threshold voltage V.sub.GLUE, during a period of time (e.g., at least the period T.sub.GLUE shown in FIG. 5) from when the pull-down circuit 602 lowers the emulated dimmer output voltage V.sub..sub._.sub.R to the glue down reference voltage V.sub.REF.sub._.sub.GL until the triac 106 fires and raises the emulated dimmer output voltage V.sub..sub._.sub.R. In addition, as shown in FIG. 5, after emulated dimmer output voltage V.sub..sub._.sub.R reaches zero volts at the end of a half-phase of emulated dimmer output voltage V.sub..sub._.sub.R, glue-down circuit 604 may enable emulated dimmer output voltage V.sub..sub._.sub.R to rise to the threshold voltage V.sub.GLUE, prior to glue-down circuit 604 drawing a steady-state glue current i.sub.GLUE from the power converter interface circuit 402 to maintain the emulated dimmer output voltage V.sub..sub._.sub.R at or below threshold voltage V.sub.GLUE.

(27) As used herein, when two or more elements are referred to as coupled to one another, such term indicates that such two or more elements are in electronic communication whether connected indirectly or directly, with or without intervening elements.

(28) This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative.

(29) All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.