Maximum power point tracker bypass
09612608 ยท 2017-04-04
Assignee
Inventors
Cpc classification
G05F1/67
PHYSICS
Y02E10/56
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
G05F5/00
PHYSICS
H02J2300/26
ELECTRICITY
International classification
G05F3/06
PHYSICS
G05F1/67
PHYSICS
G05F5/00
PHYSICS
Abstract
A circuit arrangement, includes output terminals that provide an output current and input terminals that receive a source current and a source voltage from a DC current source. A maximum power point tracker is coupled between the input terminals and the output terminals and a bypass circuit is coupled between the input terminals and the output terminals. The bypass circuit is configured to enter a bypass state dependent on the output current and dependent on the source current. The source current flows through the bypass circuit in the bypass state.
Claims
1. A method comprising: providing an output current at output terminals by each of a plurality of modules, wherein the output terminals of the plurality of modules are connected in series, wherein each of the plurality of modules is a power module; receiving a module source current and a module source voltage from a DC current source at input terminals by each of the plurality of modules; and entering a bypass state by at least one of the plurality of modules dependent on the output current and dependent on the module source current of the at least one of the plurality of modules, wherein, in the bypass state, the module source current flows through a bypass circuit coupled between the input terminals and the output terminals of the at least one of the plurality of modules.
2. The method of claim 1, wherein the entering the bypass state comprises entering the bypass state when the source current deviates less than a given value from the output current.
3. The method of claim 2, wherein the entering the bypass state further comprises entering the bypass state when an absolute value of a difference between the output current and the source current is less than 10% of the output current.
4. The method of claim 2, wherein the entering the bypass state further comprises entering the bypass state when an absolute value of a difference between the output current and the module source current is less than 3% of the output current.
5. The method of claim 1, further comprising the bypass circuit leaving the bypass state when a maximum power point tracking condition is met.
6. The method of claim 5, further comprising: evaluating a current through a bypass element coupled in parallel with the DC current source; and the maximum power tracking condition is met when a current through the bypass element is higher than a given threshold value.
7. The method of claim 6, wherein the given threshold value is zero.
8. The method of claim 5, further comprising evaluating the module source voltage via the bypass circuit, wherein the maximum power point tracking condition is met when the module source voltage has a given polarity.
9. The method of claim 8, wherein the given polarity is a polarity indicating that the DC current source acts as a load.
10. The method of claim 1, further comprising converting a DC signal using a DC-DC converter connected between the DC current source and the output terminals and having a control terminal coupled to receive a duty cycle signal and at least one switch; evaluating an output power of the DC current source using a maximum power point detector; and providing the duty cycle signal using the maximum power point detector.
11. The method of claim 10, wherein the using the DC-DC converter comprises using a converter selected from the group consisting of a buck converter, a boost converter, and a buck-boost converter.
12. The method of claim 10, further comprising bypassing at least one switch in the bypass state using the bypass circuit.
13. A method comprising: providing an output current at output terminals by each of a plurality of modules, wherein each of the plurality of modules comprises input terminals, output terminals, a DC-DC converter coupled between the input terminals and the output terminals, and a bypass circuit coupled to the DC-DC converter, wherein the output terminals of the plurality of modules are connected in series, and wherein each of the plurality of modules is a power module; receiving a module source current and a module source voltage at the input terminals of the by each of the plurality of modules; entering a bypass state by a bypass circuit of at least one of the plurality of modules, wherein the entering the bypass state by the bypass circuit of the at least one of the plurality of modules is dependent on the output current and is dependent on the module source current of the at least one of the plurality of modules; and wherein entering the bypass state by the bypass circuit of the at least one of the plurality of modules comprises permanently setting a switching state of a switch of the DC-DC converter in the at least one of the plurality of modules such that the module source current is allowed to permanently pass the DC-DC converter, wherein permanently setting the switching state of the switch is performed by the bypass circuit.
14. The method of claim 13, wherein the entering the bypass state comprises entering the bypass state when the source current deviates less than a given value from the output current.
15. The method of claim 13, further comprising the bypass circuit leaving the bypass state when a maximum power point tracking condition is met.
16. The method of claim 13, further comprising: evaluating a power at the input terminals; providing a duty cycle signal to the DC-DC converter; and driving the switch of the DC-DC converter dependent on the duty cycle signal.
17. A method comprising: providing an output current at output terminals by each of a plurality of modules, wherein each of the plurality of modules comprises input terminals, output terminals, and a bypass circuit coupled between the input terminals and the output terminals, wherein the output terminals of the plurality of modules are connected in series, and wherein each of the plurality of modules is a power module; and entering a bypass state by at least one of the plurality of modules dependent on the output current and dependent on a source current of a DC current source, wherein, in the bypass state, the source current flows through the bypass circuit of the at least one of the plurality of modules.
18. The method of claim 17, wherein the DC current source includes a photovoltaic array with at least one solar cell.
19. A method comprising: providing an output current at output terminals by each of a plurality of modules, wherein each of the plurality of modules comprises input terminals, output terminals, a DC-DC converter coupled between the input terminals and the output terminals, and a bypass circuit coupled to the DC-DC converter, wherein the output terminals of the plurality of modules are connected in series, wherein each of the plurality of modules is a power module; receiving a module source current and a module source voltage at input terminals by each of the plurality of modules; and entering a bypass state by a bypass circuit of at least one of the plurality of modules, wherein the entering the bypass state is dependent on an output current of a DC current source and is dependent on a source current, and wherein entering the bypass state by the bypass circuit of the at least one of the plurality of modules comprises permanently setting a switching state of a switch of the DC-DC converter such that the source current is allowed to permanently pass the DC-DC converter, and wherein the permanently setting the switching state of the switch is performed by the bypass circuit.
20. The method of claim 19, wherein the DC current source includes a photovoltaic array with at least one solar cell.
21. A circuit arrangement, comprising: a plurality of modules, each module comprising: output terminals that provide an output current; input terminals that receive a source current and a source voltage from a DC current source; and a bypass circuit coupled between the input terminals and the output terminals, the bypass circuit entering a bypass state dependent on the output current and dependent on the source current, wherein the source current flows through the bypass circuit in the bypass state, wherein the output terminals of the plurality of modules are connected in series.
22. The circuit arrangement of claim 21, wherein the bypass circuit enters the bypass state when the source current deviates less than a given value from the output current.
23. The circuit arrangement of claim 22, wherein the bypass circuit enters the bypass state when an absolute value of a difference between the output current and the source current is less than 10% of the output current.
24. The circuit arrangement of claim 22, wherein the bypass circuit enters the bypass state when an absolute value of a difference between the output current and the source current is less than 3% of the output current.
25. The circuit arrangement of claim 21, wherein the bypass circuit, when in the bypass state, leaves the bypass state when a maximum power point tracking condition is met.
26. The circuit arrangement of claim 25, further comprising a bypass element coupled in parallel with the DC current source, wherein the bypass circuit is configured to evaluate a current through the bypass element, and wherein the maximum power point tracking condition is met when a current through the bypass element is higher than a given threshold value.
27. The circuit arrangement of claim 26, wherein the given threshold value is zero.
28. The circuit arrangement of claim 25, wherein the bypass circuit evaluates the source voltage, and wherein the maximum power point tracking condition is met when the source voltage has a given polarity.
29. The circuit arrangement of claim 28, wherein the given polarity is a polarity indicating that the DC current source acts as a load.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Examples will now be explained with reference to the drawings. The drawings serve to illustrate the basic principle, so that only aspects necessary for understanding the basic principle are illustrated. The drawings are not to scale. In the drawings the same reference characters denote like signals and circuit components.
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DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
(15) For a better understanding of the present invention and its implementation principles
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(18) What makes the operation of solar cells and, thus, the operation of photovoltaic arrays with a plurality of solar cells difficult, is the fact that for different irradiation powers the maximum output power is obtained for different output voltages V.sub.pv and for different output currents I.sub.pv. To illustrate this,
(19) In order to maximize the electric power provided by a PV cell or a PV array a maximum power point tracker (MPPT) can be used. An MPPT provides a load to the PV cell or the PV array such that the PV cell or the PC array is operated in its MPP or close to its MPP. However, power losses may occur in the MPPT during its operation.
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(21) PV array 2, that will also be referred to as PV panel in the following includes at least one solar cell and can include a plurality of solar cells.
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(23) According to a further embodiment, which is illustrated in
(24) Referring to
(25) The circuit arrangement 1 includes an MPPT 3 connected between the input terminals 11, 12 and the output terminals 13, 14. MPPT 3 may be a usual MPPT that is configured to operate the PV panel 2 connected to the input terminals 11, 12 in its MPP. MPPTs are commonly known, so that further explanations are not required in this regard. The circuit arrangement 1 further includes a bypass circuit 4 coupled between the input terminals 11, 12 and the output terminals 13, 14. The bypass circuit 4 is configured to enter a bypass state dependent on the source current I1 and dependent on the output current Iz. When the bypass circuit 4 is in its bypass state the source current I1 flows through the bypass circuit 4, thereby at least partly bypassing the MPPT 3. At least partly bypassing in this connection means that the source current I1 either completely bypasses the MPPT 3 or bypasses at least those circuit components of the MPPT 3 that in operation of the MPPT 3 cause the highest losses, such as switching elements. Bypass circuit 4 is configured to have lower power losses than the MPPT 3.
(26) When bypass circuit 4 is not in its bypass state MPPT 3 operates the PV panel 2 in its MPP. Operating the PV panel 2 in its MPP means that MPPT 3 draws a source current I1 from PV panel 2 such that PV panel 2 is operated in its MPP. When the source current I1 equals the load current Iz, than it is safe to assume that MPPT 3 is currently not required, because the current Iz drawn by the load Z would also operate PV panel 2 in its MPP. Thus, according to one embodiment the bypass circuit 4 is configured to enter the bypass state when the source current I1 deviates less than a given value from the output current Iz. According to one embodiment the bypass circuit enters the bypass state when the absolute value of a difference between the output current Iz and the source current I1 is less than 10% of the output current, or less than 5% of the output current.
(27) Bypassing the MPPT 3 under those operating conditions under which the MPPT 3 is not needed, helps to increase the overall efficiency of a system including a PV panel 2 and a MPPT 3. The bypass circuit 4 is configured to leave the bypass state when a maximum power point tracking condition is met, i.e. when there is the need to again track the MPP using the MPPT 3.
(28) According to one embodiment a bypass element 5, such as a diode, is connected in parallel with the PV panel 2. In case the MPPT 3 is bypassed and the PV panel 2 is not capable of providing the load current Iz drawn at the output terminals 13, 14 load current Iz causes a current to flow through the bypass diode 5. According to one embodiment bypass circuit 4 evaluates a current through the bypass diode 5 and leaves the bypass state when a current through the bypass diode 5 is higher than a given threshold value. According to one embodiment the threshold is zero, wherein in this case the bypass circuit 4 leaves the bypass state as soon as a current flows through the bypass diode 5.
(29) Assuming that PV panel 2 is not capable of providing the required output current Iz and that the load Z, which may include additional current generators, such as further PV panels, forces the output current Iz to flow through the PV panel 2 when the MPPT 3 is bypassed. In this case PV panel 2 does not act as a generator anymore but acts as a load itself. The source voltage V1 then changes its polarity from the positive polarity illustrated in
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(31) Switching element 41 may be implemented as a transistor, such as a MOSFET. Referring to a further embodiment illustrated in
(32) Bypass circuit 4 is in its bypass state when switching element 41 is switched on, i.e. when switching element 41 is driven in its on-state. Switching element 41 is driven in its on-state by the control circuit 42 dependent on the source current I1 and the output current Iz. For this purpose control circuit 42 receives a source current signal S.sub.I1 that represents the source current I1, and an output current signal S.sub.Iz that represents the output current Iz. These signals S.sub.I1, S.sub.Iz are provided by current measurement circuits (not illustrated). Such current measurement circuits are generally known, so that no further explanations are required in this regard. These current measurement circuits may include shunt resistors, Hall-elements, etc.
(33) Control circuit 42 further receives a maximum power point tracking signal S.sub.MPPT indicating whether the maximum power point tracking condition is met. Referring to the explanation hereinabove, maximum power point tracking signal S.sub.MPPT may either represent a current 15 flowing through bypass diode 5, or the source voltage V1.
(34) The MPPT 3 includes a DC-DC converter 6 connected between the input terminals 11, 12 and the output terminals 13, 14 and a MPP detector 7 that controls the DC-DC converter 6. The DC-DC converter 6 includes at least one switching element (not illustrated in
(35) Providing a source current I1 information and a source voltage V1 information to the MPP detector 7 is only one example. According to a further embodiment MPP detector 7 receives an output current Iz and an output voltage Vz information and adjusts the duty-cycle of the DC-DC converter 6 such that the output power of the circuit arrangement 1 is maximized, wherein the output power is defined by the product of the output current Iz and the output voltage Vz. However, any other algorithms for detecting the MPP of a PV panel 2 and for adjusting a duty-cycle of a DC-DC converter, such as DC-DC converter 6, such that the PV panel 2 is operated in its MPP could be used as well.
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(37) Switching element 62 is, for example, a transistor, such as a MOSFET (as illustrated). The switching element 62 is driven by a pulse width-modulated drive signal S62 provided by a drive circuit 60. Drive circuit 60 receives the duty-cycle information DC from the MPP detector (not illustrated in
(38) The DC-DC converter 6, such as the buck converter illustrated in
(39) The current I1 the DC-DC converter 6 draws from the PV panel 2 is adjusted by the MPP detector 7 through the duty cycle of the DC-DC converter 6. The output current Iz drawn at the output of the DC-DC converter is defined by the load connected to the DC-DC converter 6. With a defined input current I1 of the DC-DC converter 6 the input voltage V1 automatically adjusts according to the characteristic curve of the PV panel 2, and with a defined output current Iz the output voltage Vz automatically adjusts so that the output power, which is the product of the output voltage Vz and the output current Iz, equals the input power, which is the product of the input voltage V1 and the input current I1, minus switching losses in the DC-DC converter 6.
(40) In
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(42) In the buck-mode the second switching element 67 is permanently switched off (open) and the first switching element 62 is switched on and off in a pulsewidth-modulated manner. The converter in this case operates like the buck converter that has been explained with reference to
(43) In the boost-mode the first switching element 62 is permanently switched on (closed), and the second switching element 67 is switched on and off in a pulsewidth-modulated manner. When the second switching element 67 is switched on the inductive storage element 63 is magnetized and, therefore, stores energy. When the second switching element 67 is switched off, the inductive storage element 63 is demagnetized and, therefore, provides energy to the output capacitor 66 and/or the load Z via rectifier element 68. Rectifier element 68 can be implemented as a diode (not illustrated). However, in the example illustrated, rectifier element 68 is implemented as a synchronous rectifier. The rectifier includes a MOSFET that is switched on and off by the drive circuit 60 through a drive signal S68. The drive circuit 60 switches the MOSFET of the rectifier 68 on each time the second switching element 67 is switched off, so that a current can flow from the inductive storage element to the output capacitor.
(44) Drive signals S62, S67 for the first and second switching element 62, 67 are provided by drive circuit 60 dependent on the duty cycle information DC and dependent on a mode information MOD. Mode information MOD is also provided by the MPP detector 7 (not illustrated in
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(46) According to a further embodiment that is illustrated in
(47) It goes without saying that besides a buck converter, a boost converter, or a buck-boost converter, any other type of switched-mode converter, such as a boost-buck converter (not illustrated) may be used as well.
(48) The basic idea of providing a bypass circuit, such as bypass circuit 4 with a switching element 41 illustrated in
(49) According to a further embodiment illustrated in
(50) The DC-DC converter 6 in this embodiment has two operation modes: A first, normal operation mode in which the at least one switching element of the DC-DC converter is switched on and off dependent on a duty-cycle information DC provided by the MPP detector 7; and a second operation mode in which the MPPT is virtually bypassed by setting the duty-cycle of the at least one switching element to 100% or 0%, depending on the type of DC-DC converter. The DC-DC converter 6 is operated in its second operation mode when the bypass circuit 4 is in its bypass state.
(51) Bypass circuit 4 includes a control circuit 42 that generates a control signal. Such control signal is generated in the same manner as the drive signal S41 for switching element 41 illustrated in
(52) Using a switching element, such as switching element 41, for bypassing the MPPT 3 has the advantage, that a switching element can be used that has an extremely low on-resistance, wherein a high-frequency switching capability is not required. Virtually bypassing the MPPT 3 has the advantage that no additional switching element is required. However, switching elements used in DC-DC converters usually have a high-frequency switching capability and, thus, usually have a higher on-resistance.
(53) Referring to