Multi-Stage Amplifier with Improved Operating Efficiency

Abstract

A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor.

Claims

1. A multi-stage amplifier comprising: a first amplifier stage having an input and an output, the output of the first amplifier stage being coupled with a first terminal of a capacitor having a controllable capacitance; a second amplifier stage having an input and an output, the input of the second amplifier stage being coupled to the output of the first amplifier stage and the first terminal of the capacitor, the output of the second amplifier stage being coupled to a second terminal of the capacitor and an output of the multi-stage amplifier; a current sensing circuit having an input and an output, the input of the current sensing circuit being coupled with the output of the multi-stage amplifier; and a control signal generator being coupled between the output of the current sensing circuit and a control terminal of the capacitor, wherein the control signal generator provides a control signal to the capacitor, wherein the capacitance of the capacitor is controlled by the control signal.

2. The multi-stage amplifier of claim 1, wherein the current sensing circuit provides a sense current based on a load current through a load, the load being coupled to the output of the multi-stage amplifier.

3. The multi-stage amplifier of claim 2, wherein the sense current is proportional to the load current.

4. The multi-stage amplifier of claim 2, wherein the control signal generator is a current-to-voltage converter that provides a control voltage based on the sense current, the control voltage decreasing as the sense current increases.

5. The multi-stage amplifier of claim 1, wherein the capacitance of the capacitor and the load current have an inverse relation, in particular the capacitance of the capacitor decreasing as the load current increases.

6. The multi-stage amplifier of claim 1, wherein the control signal generator comprises a current mirror being coupled between the output of the current sensing circuit and the control terminal of the capacitor, the current mirror receiving the sense current from the output of the current sensing circuit.

7. The multi-stage amplifier of claim 6, wherein the control signal generator further comprises a current source being coupled to the current mirror, the control signal generator providing a control voltage based on the sense current and a constant current from the current source.

8. The multi-stage amplifier of claim 6, wherein the control signal generator further comprises a diode being coupled to the current mirror to convert the sense current to a control voltage.

9. The multi-stage amplifier of claim 6, wherein the current mirror comprises an NMOS current mirror.

10. The multi-stage amplifier of claim 8, wherein the diode comprises a diode-coupled PMOS transistor.

11. The multi-stage amplifier of claim 1, wherein the capacitor acts as Miller capacitor to split poles for increasing stability.

12. The multi-stage amplifier of claim 1, wherein the capacitor comprises a varactor or a voltage controlled capacitor.

13. A method of operating a multi-stage amplifier comprising a first amplifier stage; a second amplifier stage; and a Miller capacitor, an output of the first amplifier stage being coupled to an input of the second amplifier stage, the Miller capacitor being coupled between the input of the second amplifier stage and an output of the second amplifier stage, the method comprising: sensing a load current through a load, the load being coupled to an output of the multi-stage amplifier; providing a sense current based on the load current; providing, based on the sense current, a control voltage to the Miller capacitor; and controlling, based on the control voltage, the capacitance of the Miller capacitor.

14. The method of claim 13, wherein the sense current is proportional to the load current, wherein the control voltage decreases as the sense current increases, wherein the capacitance of the Miller capacitor decreases as the load current increases.

15. The method of claim 13, wherein the capacitance of the Miller capacitor is controlled inversely proportional to the load current.

16. The method of claim 13, wherein the control voltage is provided by converting the sense current to the control voltage, in particular by comparing the sense current to a constant current.

17. A method of operating a multi-stage comprising the steps of: providing a first amplifier stage having an input and an output, the output of the first amplifier stage being coupled with a first terminal of a capacitor having a controllable capacitance; providing a second amplifier stage having an input and an output, the input of the second amplifier stage being coupled to the output of the first amplifier stage and the first terminal of the capacitor, the output of the second amplifier stage being coupled to a second terminal of the capacitor and an output of the multi-stage amplifier; providing a current sensing circuit having an input and an output, the input of the current sensing circuit being coupled with the output of the multi-stage amplifier; and providing a control signal generator being coupled between the output of the current sensing circuit and a control terminal of the capacitor, wherein the control signal generator provides a control signal to the capacitor, wherein the capacitance of the capacitor is controlled by the control signal.

18. The method of claim 17, wherein the current sensing circuit provides a sense current based on a load current through a load, the load being coupled to the output of the multi-stage amplifier.

19. The method of claim 18, wherein the sense current is proportional to the load current.

20. The method of multi-stage amplifier of claim 18, wherein the control signal generator is a current-to-voltage converter that provides a control voltage based on the sense current, the control voltage decreasing as the sense current increases.

21. The method of claim 17, wherein the capacitance of the capacitor and the load current have an inverse relation, in particular the capacitance of the capacitor decreasing as the load current increases.

22. The method of claim 17, wherein the control signal generator comprises a current mirror being coupled between the output of the current sensing circuit and the control terminal of the capacitor, the current mirror receiving the sense current from the output of the current sensing circuit.

23. The method of claim 22, wherein the control signal generator further comprises a current source being coupled to the current mirror, the control signal generator providing a control voltage based on the sense current and a constant current from the current source.

24. The method of claim 22, wherein the control signal generator further comprises a diode being coupled to the current mirror to convert the sense current to a control voltage.

25. The method of claim 22, wherein the current mirror comprises an NMOS current mirror.

26. The method of claim 24, wherein the diode comprises a diode-coupled PMOS transistor.

27. The method 7of claim 17, wherein the capacitor acts as Miller capacitor to split poles for increasing stability.

28. The method of claim 17, wherein the capacitor comprises a varactor or a voltage controlled capacitor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The application is explained below in an exemplary manner with reference to the accompanying drawings, wherein

[0027] FIG. 1 shows a typical supply feedback linear regulator using a Miller compensated multi-stage amplifier;

[0028] FIG. 2 shows a multi-stage amplifier embodying an example for the adaptive Miller compensation scheme;

[0029] FIG. 3(a) shows diagrams of behavior across load current of the different elements of the adaptive Miller compensation according to the embodiment;

[0030] FIG. 3(b) shows a transfer function of the output node of the first amplifier stage;

[0031] FIG. 3(c) shows the power supply rejection ratio (PSRR) across frequency for using proposed adaptive Miller capacitance and using prior-art fixed Miller capacitance;

[0032] FIG. 4 shows potential transistor level implementations embodying an example for the multi-stage amplifier using the adaptive Miller compensation scheme, using a current source (FIG. 4(a)) or a diode (FIG. 4(b));

[0033] FIG. 5 shows a flow diagram of an example method for operating the multi-stage amplifier with the adaptive Miller compensation scheme;

[0034] FIG. 6 shows results for the frequency dependent transfer function of output voltage of the first amplifier stage in a real multi-stage amplifier; and

[0035] FIG. 7 shows comparison of the power supply rejection ratio (PSRR) across frequency between adaptive Miller compensation and fixed Miller capacitor;

DESCRIPTION

[0036] FIG. 2 shows a multi-stage amplifier embodying an example for the adaptive Miller compensation scheme. The multi-stage amplifier 200 comprises a first amplifier stage 201, a second amplifier stage 202 and a Miller capacitor 203. The first amplifier stage 201 is a differential amplifier (also referred to as error amplifier) with one input, a reference input 208, coupled to a reference voltage V.sub.ref and the other input, a feedback input 207, coupled to the multi-stage amplifier output voltage V.sub.out, via a feedback factor 206. A load 205 is coupled with the multi-stage amplifier 200 in parallel with an output capacitance C.sub.o 204. The load 205 draws a load current I.sub.load from the multi-stage amplifier 200. The second amplifier stage 202 may be an inverter and may comprise a single amplifier stage or a plurality of substages, e.g. a cascade of multiple amplifier stages and/or buffers. The feedback input 207 of the first amplifier stage 201 receives a fraction of the multi-stage amplifier output voltage V.sub.out determined by the feedback factor 206. In general, the feedback factor 206 can be determined by applying a resistor divider (not shown). The reference input 208 of the first amplifier stage 201 receives a stable voltage reference V.sub.ref and the output voltage of the first amplifier stage V.sub.1 changes through a feedback mechanism, i.e. a main feedback loop, in case that the multi-stage amplifier output voltage V.sub.out changes relative to the reference voltage V.sub.ref, thereby maintaining a constant output voltage V.sub.out of the multi-stage amplifier 200. One can generally obtain the overall gain of the multi-stage amplifier 200 by multiplying the gain of the first amplifier stage Al with the gain of the second amplifier stage A.sub.2.

[0037] The output capacitance C.sub.o 204, also referred to as output capacitor or stabilization capacitor or bypass capacitor, is used to stabilize the multi-stage amplifier output voltage V.sub.out subject to a change of the load 205, in particular subject to a transient of the load current I.sub.load. In an embodiment, a pass device (not shown) is coupled between the output of the second amplifier stage and the output of the multi-stage amplifier to provide the load current to the load. If the multi-stage amplifier 200 is loaded with a varying current, the bandwidth of the pass device changes across different operating conditions.

[0038] Similar to the typical supply feedback linear regulator 100 shown in FIG. 1, the multi-stage amplifier 200 additionally comprises a Miller capacitor 203 having a capacitance C.sub.miller. The Miller capacitor 203 is coupled between the output of the multi-stage amplifier and the node between the first amplifier stage 201 and the second amplifier stage 202. According to the circuit arrangement of the multi-stage amplifier 200 shown in FIG. 2, the equivalent capacitance seen by the first amplifier stage 201 is therefore the Miller capacitance, C.sub.miller, multiplied by the gain of the second amplifier stage 202, A.sub.2. As a consequence, internal poles are split in the amplifier frequency response and good phase margin can thus be achieved to stabilize the amplifier. According to the embodiment, the present disclosure is described in the context of a linear regulator. It should be noted, however, that the disclosure is applicable to multi-stage amplifiers in general.

[0039] According to the disclosure, the Miller capacitor 203 has a controllable capacitance, i.e. the capacitance of the capacitor C.sub.miller is controllable by a control signal, e.g. a control voltage. The Miller capacitor 203 comprises a first terminal 203a, a second terminal 203b and a control terminal 203c. The first terminal of the Miller capacitor 203a is coupled to the node V.sub.1 between the first amplifier stage 201 and the second amplifier stage 202. The second terminal of the Miller capacitor 203b is coupled to the output of the multi-stage amplifier 200. In particular, the control terminal of the Miller capacitor 203c controls the capacitance of the Miller capacitor 203 C.sub.miller with the control signal. In an embodiment, a control voltage V.sub.miller can be applied as the control signal to control the capacitance of the Miller capacitor 203 C.sub.miller. It is noted that the Miller capacitor 203 is configurable rather than having a constant capacitance and can be implemented with, for example but not limited to, a varactor or a voltage controlled capacitor.

[0040] In addition, the multi-stage amplifier 200 comprises a current sensing circuit 209. The current sensing circuit 209 is coupled with the output of the multi-stage amplifier 200 to sense the load current I.sub.load flowing through the load 205. Subsequently, the current sensing circuit 209 creates and provides a scaled replica of the load current I.sub.load, i.e. a sense current I.sub.sense. As a rule, the sense current I.sub.sense is dependent on the load current I.sub.load and therefore the load current I.sub.load can be sensed through the sense current I.sub.sense and/or derived from the sense current. In a typical example, the sense current I.sub.sense is proportional to the load current I.sub.load.

[0041] According to the disclosure, the multi-stage amplifier 200 further comprises a control signal generator 210. The control signal generator 210 is coupled between the output of the current sensing circuit 209 and the control terminal of the capacitor 203c and provides the Miller capacitor 203 with a control signal to control the capacitance of the Miller capacitor 203. In an embodiment, the control signal generator is a current-to-voltage converter 210 and the current-to-voltage converter 210 provides a control voltage V.sub.miller as the control signal to the Miller capacitor 203 through the control terminal of the Miller capacitor 203c. Thus, the capacitance of the Miller capacitor 203 C.sub.miller is controlled by the control voltage V.sub.miller. The control voltage V.sub.miller controls the capacitance of the Miller capacitor 203 C.sub.miller in a way such that the capacitance of the Miller capacitor 203 C.sub.miller decreases as the control voltage V.sub.miller decreases. For example, a voltage controlled capacitor or a switchable bank of capacitors can be used for this purpose where the capacitors are selected with the rail to rail voltage V.sub.miller.

[0042] According to the embodiment, the current-to-voltage converter 210 provides the control voltage V.sub.miller based on the sense current I.sub.sense. For example, the control voltage V.sub.miller decreases as the sense current I.sub.sense increases. As a result, the capacitance of the Miller capacitor 203 C.sub.miller also decreases according to the decreasing control voltage V.sub.miller. Therefore, the capacitance of the Miller capacitor 203 C.sub.miller can be controlled in a way such that the capacitance of the Miller capacitor 203 C.sub.miller decreases as the load current I.sub.load increases. In a preferred example, the capacitance of the Miller capacitor 203 C.sub.miller and the load current I.sub.load have an inverse relation.

[0043] FIG. 3(a) illustrates diagrams of behavior across load current I.sub.load of the different elements of the adaptive Miller compensation according to the embodiment: the sensed current provided by the current sensing circuit 209 (the top diagram, curve 31), the output voltage of the current-to-voltage converter 210, i.e. the control voltage V.sub.miller (the central diagram, curve 32) and the total equivalent Miller capacitance (the bottom diagram, curve 33) across load conditions. As one can see from the top diagram (curve 31), the sense current I.sub.sense increases proportionally to the load current I.sub.load. In contrast, the control voltage V.sub.miller and the total equivalent Miller capacitance C.sub.miller decrease as the load current I.sub.load increases, as shown in the central and the bottom diagram, curve 32 and curve 33, respectively. In a preferred embodiment, the control voltage V.sub.miller and the total equivalent Miller capacitance C.sub.miller decrease inversely proportional to the load current I.sub.load, as indicated by dashed curve 32 and dashed curve 33 of the diagrams, respectively.

[0044] When the Miller capacitor 203 is controlled inversely proportional to the load current I.sub.load, the capacitive loading at the output of the first amplifier stage 201, i.e. a value of C.sub.miller*A.sub.2, where A.sub.2 is the gain of the second amplifier stage, is reduced and the bandwidth of this node (V.sub.1) is extended. This can be observed from FIG. 3(b) presenting the transfer function of the output node of the first amplifier stage 201, i.e. the frequency response of node V.sub.1, for constant Miller capacitance and for adaptive Miller capacitance. Curve 34 represents the frequency response of node V.sub.1 for constant Miller capacitance, while curve 35 represents the frequency response of node V.sub.1 for adaptive Miller capacitance. The diagram FIG. 3(b) clearly shows that the transfer function can be shifted towards higher frequency by using adaptive Miller capacitance, indicating that bandwidth extension can be achieved with the adaptive Miller compensation scheme.

[0045] FIG. 3(c) shows how the power supply rejection ratio (PSRR) across frequency is modified by using the adaptive Miller capacitance. PSRR herein can be calculated by the ratio of the output voltage of the multi-stage amplifier 200, V.sub.LDO, to the input voltage of the multi-stage amplifier 200, V.sub.in. Due to the larger bandwidth at low frequency, PSRR can be significantly improved. Curve 36 represents the PSRR across frequency for constant Miller capacitance, while curve 37 represents the PSRR across frequency for adaptive Miller capacitance. The diagram FIG. 3(c) clearly shows that the PSRR can be shifted towards higher frequency by using adaptive Miller capacitance, indicating that the PSRR can be improved at medium frequencies with the adaptive Miller compensation scheme.

[0046] As such, the proposed multi-stage amplifier allows dynamically changing the capacitance of the Miller capacitor in accordance with the load current of the multi-stage amplifier. It is appreciated that the bandwidth at the output of the first amplifier stage can be increased by adapting the amount of Miller compensation for every load current, while a stable operation of the multi-stage amplifier is still maintained. The proposed multi-stage amplifier may be used for linear regulators requiring adaptive Miller compensation and/or variable dominant pole across frequency, thereby improving the PSRR of the linear regulators.

[0047] FIG. 4 shows two potential transistor level implementations for a multi-stage amplifier using the adaptive Miller compensation scheme according to embodiments. In the embodiments, the load current I.sub.load is sensed. The current-to-voltage converter 210 of FIG. 2 comprises a current mirror 42. The current mirror 42 is coupled between the output of the current sensing circuit 209 and the control terminal of the Miller capacitor 203. The current mirror 42 receives the sense current I.sub.sense from the output of the current sensing circuit 209. Although it is not shown, it should be noted that the current sensing scheme provided by the current sensing circuit 209 may depend on the implementation of the output stage of the amplifier.

[0048] It is further noted that the sense current I.sub.sense received by the current mirror 42 can be proportional to the load current I.sub.load. In addition, the current mirror 42 provides the control voltage V.sub.miller to t the Miller capacitor 203 through the control terminal 203c to control the capacitance of the Miller capacitor 203. According to a preferred embodiment, the current mirror 42 is optionally implemented with an NMOS current mirror. In particular, the sense current I.sub.sense is driven to the NMOS current mirror. Due to the current mirror 42, the load current of different load conditions can be sensed and the control voltage V.sub.miller can be provided accordingly.

[0049] As indicated above, the current-to-voltage converter 210 of FIG. 2 may further comprise a current source 41, as shown in FIG. 4(a). The current source 41 is coupled to the current mirror 42. According to the embodiment, the current source 41 provides a constant current and the current-to-voltage converter 210 provides the control voltage V.sub.miller based on the sense current I.sub.sense and the constant current obtained from the current source 41. That is, a current proportional to the sense current I.sub.sense (as given by the current mirror ratio) is compared to the constant current, and the control voltage V.sub.miller can be then determined. When the sense current I.sub.sense is small, the current mirror 42 provides a high control voltage V.sub.miller due to the constant current from the current source 41. On the contrary, the current mirror 42 provides a low control voltage V.sub.miller when the sense current I.sub.sense is large.

[0050] As such, for low load currents, a bias current is larger and the voltage is high, while the voltage will go down when the load current I.sub.load goes above a limit. In an example, a bias current may be larger in a low load current condition and may result in a high control voltage, whereas the control voltage V.sub.miller may go down when the load current I.sub.load exceeds a threshold. This can be seen from the diagrams of FIG. 3(a). Curve 32 indicates that the control voltage V.sub.miller goes significantly down after the load current I.sub.load has reached a certain value (the threshold value). Likewise, the Miller capacitance C.sub.miller goes significantly down after the load current I.sub.load has reached the threshold value, as represented by curve 33. In this embodiment, the transition between these two states, i.e. V.sub.miller/C.sub.miller is high and V.sub.miller/C.sub.miller is low, will occur for a narrow range of load currents.

[0051] As alternative, the current-to-voltage converter 210 further comprises a diode 43, as shown in FIG. 4(b). The diode 43 is coupled to the current mirror 42 and converts the sense current I.sub.sense received by the current mirror 42 to the control voltage V.sub.miller. When the sense current is small, the control voltage remains high due to low voltage drop across the diode. In contrast, the control voltage becomes low due to high voltage drop across the diode for a large sense current.

[0052] The current-to-voltage converter 210 thus provides the control voltage V.sub.miller which is converted from the sense current I.sub.sense, on which the control voltage V.sub.miller depends: the control voltage V.sub.miller decreases as the sense current I.sub.sense or the load current I.sub.load increases in presence of the diode 43. In one example, the diode 43 can be optionally implemented with a diode-coupled PMOS transistor. If a PMOS diode is used to convert the current to a voltage, diagrams for V.sub.miller and C.sub.miller similar to using the implementation setup of FIG. 4(a) can be obtained, but a smoother transition between two states, i.e. V.sub.miller/C.sub.miller is high and V.sub.miller/C.sub.miller is low, caused by the PMOS diode may appear. In other words, one can see more clearly an inverse relation between the control voltage (V.sub.miller)/Miller capacitance (C.sub.miller) and the load current I.sub.load, as illustrated by dashed curves 32 and 33 in FIG. 3(a). Accordingly, curves 32 and 33 go down more smoothly towards large load currents if the adaptive Miller compensation capacitor is implemented with the setup of FIG. 4(b).

[0053] In an embodiment, the control signal generator optionally comprises a load current detector (not shown). The load current detector generates a control voltage to control the configurable Miller capacitor 203.

[0054] FIG. 6 shows results for the frequency dependent transfer function of output voltage of the first amplifier stage (i.e. the differential amplifier) V.sub.1 in a real multi-stage amplifier. Results of using the proposed adaptive Miller compensation scheme and using a prior-art constant Miller capacitance are compared. Curve 60 shows the frequency response of V.sub.1 using constant Miller capacitance and curve 62 represents the frequency response of node V.sub.1 using the proposed adaptive Miller compensation scheme. As one can see from the diagram, the transfer function is shifted towards higher frequency by using the proposed adaptive Miller compensation scheme. Therefore, bandwidth extension of the first amplifier stage V.sub.1 can be achieved with the proposed adaptive Miller compensation scheme.

[0055] FIG.7 shows comparison of the power supply rejection ratio (PSRR) across frequency between using adaptive Miller compensation and using fixed Miller capacitor. The PSRR shown in FIG. 7 has been calculated in the same way as in FIG. 3(c). Changes in PSRR over a frequency range (10 Hz-10 MHz) of using the proposed adaptive Miller compensation scheme and using a prior-art constant Miller capacitance are compared. Curve 70 represents the PSRR across frequency using a fixed Miller capacitor, i.e. a constant Miller capacitance, while curve 72 represents the PSRR across frequency using the proposed adaptive Miller compensation scheme, i.e. controlling the Miller capacitance C.sub.miller according to the load current I.sub.load. As the bandwidth of the first amplifier stage has been pushed to higher frequencies through the use of adaptive Miller capacitance, PSRR is shifted towards higher frequencies by using the proposed adaptive Miller compensation scheme, as indicated by arrow 74 in FIG. 7. Furthermore, one can see a significant improvement in PSRR for intermediate frequencies (more than 10 dB at 100 kHz) by using the proposed adaptive Miller compensation scheme, as indicated by arrow 76 in FIG. 7.

[0056] As such, the proposed adaptively-compensated multi-stage amplifiers provide linear regulators with variable dominant poles across frequency. It is appreciated that the extended bandwidth of the first amplifier stage at relatively high load currents can be achieved by controlling the value of the Miller capacitor across the load. It is further appreciated that the larger bandwidth at low frequency significantly improves the PSRR, thereby providing high PSRR linear regulators with low quiescent current consumption.

[0057] Furthermore, by using the proposed multi-stage amplifiers whose dynamics is adapted to the load conditions of the circuit, the dominant pole is pushed to higher frequencies and the circuit can react faster to changes in the reference voltage V.sub.ref. In other words, the bandwidth of the first amplifier stage changes with the load condition by using the proposed technique. In general, this effect can be observed by sweeping the load current for monitoring the transfer function with poles and/or zeros of the adaptive Miller compensation which may change across load current.

[0058] FIG. 5 shows a flow diagram of an example method 500 for operating a multi-stage amplifier 200 with the adaptive Miller compensation scheme. The method 500 comprises the step of sensing 501 a load current I.sub.load through a load 205 at the output of the multi-stage amplifier 200, where the load 205 is coupled to an output of the multi-stage amplifier 200. Furthermore, the method 500 comprises providing 502 a sense current I.sub.sense at the output of a current sensing circuit 209, based on the load current I.sub.load. As mentioned above, the sense current I.sub.sense may be proportional to the load current I.sub.load. The method 500 further comprises providing 503 a control voltage V.sub.miller to the Miller capacitor 203 at the output of a control signal generator, e.g. current-to-voltage converter 210, based on the sense current I.sub.sense, such that the control voltage V.sub.miller decreases as the sense current I.sub.sense increases. As a result, the provided control voltage decreases as the load current I.sub.load increases.

[0059] Furthermore, the method 500 comprises controlling 504 the capacitance of the Miller capacitor 203 C.sub.miller based on the control voltage V.sub.miller. Thus, the capacitance of the Miller capacitor 203 C.sub.miller can be controlled according to the load current I.sub.load. As mentioned above, the capacitance of the Miller capacitor 203 C.sub.miller decreases as the load current I.sub.load increases or, preferably, the capacitance of the Miller capacitor 203 C.sub.miller is controlled inversely proportional to the load current I.sub.load if the adaptive Miller compensation capacitor 203 is implemented with the setup of FIG. 4(b).

[0060] Therefore, the dynamics of multi-stage amplifiers is adapted to the load conditions of the circuit, thereby pushing the dominant pole, i.e. the pole of the first amplifier stage, to higher frequencies and the circuit can react faster to changes in the reference voltage V.sub.ref. As such, the PSRR for large loads is improved at medium frequencies due to the larger bandwidth of the first amplifier stage.

[0061] As such, the compensation performance of the Miller capacitor can be adapted for various current load conditions by dynamically controlling the capacitance of the Miller capacitor in the multi-stage amplifier according to the load current. It is appreciated that the bandwidth at the output of the first amplifier stage can be maximized without losing the stability of the multi-stage amplifier. The proposed method 500 can also be used for improving the PSRR of the multi-stage amplifier.

[0062] In the disclosure, a multi-stage amplifier using the adaptive Miller compensation scheme and a corresponding method have been described, which are configured to extend the bandwidth of the first amplifier stage for large load conditions. In other words, the capacitive loading at the output of the first amplifier stage is optimized according to the load without sacrificing the amplifier stability. Consequently, the PSRR for large loads is improved at medium frequencies due to the larger bandwidth of the first amplifier stage. Furthermore, load release recovery from maximum current to no/small current in a multi-stage amplifier can be improved by applying this proposed adaptive Miller compensation scheme.

[0063] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope.

[0064] Furthermore, all examples and embodiment outlined in the present document are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.