WAFER MANUFACTURING SYSTEM AND RELATED PROCESS

Abstract

The process for manufacturing a semiconductor wafer includes steps for mounting a semiconductor work piece for exfoliation, energizing a microwave device for generating an energized beam sufficient for penetrating an outer surface layer of the semiconductor work piece, exfoliating the outer surface layer of the semiconductor work piece with the energized beam, and removing the exfoliated outer surface layer from the semiconductor work piece as the semiconductor wafer having a thickness less than 100 micrometers.

Claims

1. A method for manufacturing a semiconductor wafer, comprising the steps of: mounting a semiconductor work piece for exfoliation; energizing a microwave device for generating an energized beam sufficient for penetrating an outer surface layer of the semiconductor work piece; exfoliating the outer surface layer of the semiconductor work piece with the energized beam; applying a coolant directly to the outer surface layer of the semiconductor work piece for cooling the semiconductor work piece at a penetration point where the energized beam bombards the outer surface layer of the semiconductor work piece; and removing the exfoliated outer surface layer from the semiconductor work piece as the semiconductor wafer.

2. The method of claim 1, wherein the semiconductor work piece comprises a pre-cut semiconductor work piece having a thickness of 100 microns to 1 meter.

3. The method of claim 1, wherein the semiconductor work piece comprises a type III-V semiconductor material or a type IV semiconductor material.

4. The method of claim 3, wherein the type III-V semiconductor material comprises gallium arsenide.

5. The method of claim 3, wherein the type IV semiconductor material comprises silicon or germanium.

6. The method of claim 1, wherein the semiconductor wafer comprises a thickness less than 100 microns.

7. The method of claim 6, wherein the semiconductor wafer comprises a thickness of 2-70 microns.

8. The method of claim 1, wherein the semiconductor work piece includes an oxygen content comprising less than 10.sup.15 oxygen atoms per cubic centimeter.

9. The method of claim 1, wherein the energized beam comprises an implantation density of approximately 110.sup.17 ions/cm.sup.2.

10. The method of claim 1, wherein the semiconductor wafer comprises a square semiconductor wafer.

11. The method of claim 1, wherein the microwave device comprises a high current particle accelerator.

12. The method of claim 11, wherein the high current particle accelerator comprises an electron cyclotron resonance ion source or a radio-frequency quadrupole (RFQ) accelerator.

13. The method of claim 1, wherein the energized beam comprises a width approximately the same as the width of the semiconductor work piece.

14. The method of claim 1, wherein the semiconductor work piece comprises a rectangular shape.

15. A method for manufacturing a semiconductor wafer, comprising the steps of: mounting a semiconductor work piece comprising an oxygen content less than 10.sup.15 oxygen atoms per cubic centimeter; energizing a microwave device for generating an energized beam comprising an implantation density of approximately 110.sup.17 ions/cm.sup.2 for penetrating an outer surface layer of the semiconductor work piece; exfoliating the outer surface layer of the semiconductor work piece with the energized beam; applying a coolant directly to the outer surface layer of the semiconductor work piece for cooling the semiconductor work piece at a penetration point where the energized beam bombards the outer surface layer of the semiconductor work piece; and removing the exfoliated outer surface layer from the semiconductor work piece as the semiconductor wafer comprising a thickness less than 100 micrometers.

16. The method of claim 15, wherein the semiconductor work piece comprises a pre-cut semiconductor work piece having a thickness of 100 microns to 1 meter.

17. The method of claim 15, wherein the semiconductor work piece comprises a type III-V semiconductor material selected from the group consisting of gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, or indium antimonide.

18. The method of claim 15, wherein the semiconductor work piece comprises a type IV semiconductor selected from the group consisting of monocyrstalline silicon, polycrystalline silicon, or germanium.

19. The method of claim 15, wherein the semiconductor wafer comprises a thickness of 4-20 microns.

20. The method of claim 15, including the step of exfoliating the semiconductor wafer into multiple semiconductor wafers and moving each of the multiple semiconductor wafers along a conveyor.

21. The method of claim 15, wherein the semiconductor wafer comprises a square semiconductor wafer having a thickness of 2-70 microns.

22. The method of claim 15, wherein the microwave device comprises an electronic cyclotron resonance ion source or a radio-frequency (RFQ) accelerator for generating the energized beam comprising an ion beam or a proton beam, wherein the energized beam moves relative to the semiconductor work piece.

23. The method of claim 15, wherein the energized beam comprises a width approximately the same as the width of a rectangular semiconductor work piece.

24. A method for manufacturing a plurality of semiconductor wafers, comprising the steps of: mounting a pre-cut semiconductor work piece comprising an oxygen content less than 10.sup.15 oxygen atoms per cubic centimeter and having a thickness of 160-600 microns, the semiconductor work piece comprising a type III-V semiconductor selected from the group consisting of gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, or indium antimonide; energizing a microwave device comprising an electron cyclotron resonance ion source or a radio-frequency quadrupole (RFQ) for generating an energized beam sufficient for penetrating an outer surface layer of the semiconductor work piece; exfoliating the outer surface layer of the semiconductor work piece with the energized beam; applying a coolant directly to the outer surface layer of the semiconductor work piece for cooling the semiconductor work piece at a penetration point where the energized beam bombards the outer surface layer of the semiconductor work piece; removing the exfoliated outer surface layer from the semiconductor work piece as the semiconductor wafer comprising a thickness of 2-70 microns; and cutting the semiconductor wafer into multiple semiconductor wafers.

25. An apparatus for manufacturing a plurality of semiconductor wafers from a semiconductor work piece, comprising: a mount for selectively receiving and retaining the semiconductor work piece having an exfoliation surface; a microwave positioned relative to the mount to emit an energized beam in the direction of the exfoliation surface, wherein relative movement of the microwave and the semiconductor work piece exfoliates a semiconductor wafer therefrom; a fluid cooler positioned to apply a coolant directly to an outer surface layer of the semiconductor work piece to cool a penetration point where the energized beam bombards the outer surface layer of the semiconductor work piece for controlling a surface temperature of the semiconductor work piece; and a handle removing each of the plurality of semiconductor wafers exfoliated from the exfoliation surface away from the semiconductor work piece.

26. The apparatus of claim 25, wherein the semiconductor work piece comprises a type IV semiconductor selected from the group consisting of monocyrstalline silicon, polycrystalline silicon, or germanium, or a type III-V semiconductor selected from the group consisting of gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, or indium antimonide.

27. The apparatus of claim 25, wherein the microwave device comprises an electron cyclotron resonance ion source or a radio-frequency quadrupole (RFQ) and the energized beam comprises an elongated beam approximately the width of the exfoliation surface.

28. The apparatus of claim 25, wherein the semiconductor work piece comprises a rectangular shape and the fluid cooler comprises an air cooler.

29. The apparatus of claim 25, wherein the semiconductor work piece comprises an oxygen content less than 10.sup.15 oxygen atoms per cubic centimeter.

30. The apparatus of claim 25, wherein the semiconductor wafer comprises a thickness less than 100 microns.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings illustrate the invention. In such drawings:

[0032] FIG. 1 is a flowchart illustrating the steps used in association with a method and process for manufacturing a wafer;

[0033] FIG. 2A is a diagrammatic view illustrating melting high-purity semiconductor grade wafer material with dopants in an inert chamber;

[0034] FIG. 2B is a diagrammatic view illustrating lowering a seed crystal mounted to one end of a rotatable shaft into the melted mixture;

[0035] FIG. 2C is a diagrammatic view illustrating catalytic crystallization of the melted mixture to the seed crystal;

[0036] FIG. 2D is a diagrammatic view illustrating formation of an ingot through controlled removal of the seed crystal from the mixture;

[0037] FIG. 2E is a diagrammatic view illustrating complete formation of an ingot from the melted mixture;

[0038] FIG. 3 is a diagrammatic perspective view illustrating mounting of the ingot at one end to a rotator;

[0039] FIG. 4 is a diagrammatic perspective view illustrating rotation of the ingot about its longitudinal axis when alternatively coupled to two rotators;

[0040] FIG. 5A is a partial cut-away diagrammatic perspective view illustrating bombardment of the outer surface of the ingot with one or more beams;

[0041] FIG. 5B is an alternative cut-away diagrammatic perspective view illustrating bombardment of the outer surface of the ingot with one or more elongated beams;

[0042] FIG. 6 is a diagrammatic side view of the ingot, illustrating protons penetrating the outer surface of the ingot to a predetermined depth;

[0043] FIG. 7 is a diagrammatic side view of the ingot, illustrating exfoliation of the ingot;

[0044] FIG. 8A is a diagrammatic top view of the bombarded ingot, illustrating single layer exfoliation;

[0045] FIG. 8B is an alternative diagrammatic top view of the bombarded ingot, illustrating multi-layer exfoliation;

[0046] FIG. 9 is a diagrammatic side view illustrating conveying the exfoliated layer away from the ingot;

[0047] FIG. 10 is a diagrammatic side view illustrating cutting the exfoliated layer into individual wafers;

[0048] FIG. 11 is a diagrammatic view illustrating cutting a cylindrical ingot into a square or rectangular ingot with a diamond wire;

[0049] FIG. 12A is a diagrammatic perspective view illustrating bombardment of the outer front work surface of the squared off ingot of FIG. 11 with an elongated beam;

[0050] FIG. 12B is a diagrammatic perspective view illustrating bombardment of the outer side work surface of the squared off ingot of FIG. 11 with an elongated beam;

[0051] FIG. 13A is a diagrammatic perspective view illustrating an exfoliated layer peeling away from the front work surface exfoliated in FIG. 12A;

[0052] FIG. 13B is a diagrammatic perspective view illustrating an exfoliated layer peeling away from the side work surface exfoliated in FIG. 12B; and

[0053] FIG. 14 is a diagrammatic side view illustrating the exfoliated layers being carried away from the work piece by a conveyor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0054] As shown in the drawings for purposes of illustration, the present invention for the improved processes for manufacturing wafers is shown generally with respect to the flowchart in FIG. 1 and the operation of the manufacturing process is shown in more detail in FIGS. 2-10. More specifically, the first step, as shown in FIG. 1, is to create an ingot 100. In one embodiment, the ingot 100 may be a type IV semiconductor such as a monocyrstalline or polycrystalline cylindrical silicon ingot or a germanium ingot. In another embodiment, the ingot 100 may be any other semiconductor material suitable for exfoliation, such as any type III-V semiconductor material such as gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, indium antimonide, etc. Moreover, the ingot 100 may have any cross-sectional shape, such as a polygonal cross-sectional shape. One set of processes and apparatuses disclosed herein aim to, inter alia, reduce the waste associated with squaring off a cylindrical ingot used as a workpiece for creating square or rectangular semiconductor wafers for use with solar panels and the like. Furthermore, the processes and apparatuses disclosed herein are able to further reduce wasted wafer material by at least one order of magnitude for each wafer created in view of eliminating the need to slice individual wafers using the aforementioned diamond coated wire. Accordingly, eliminating both of these wasteful steps in producing solar grade semiconductor photovoltaic material corresponds to a cost savings of the same magnitude. Thus, as will be described in more detail below, the amount of solar PV material produced increases by a factor of at least 20 over the same ingot used by traditional or conventional manufacturing methods. This obviously corresponds to tremendous cost savings in raw material. Additionally, simultaneously exfoliating and removing a continuous sheet of wafer material from the ingot, as described in more detail below, eliminates the need for the relatively more cost intensive two-step exfoliation process and decreases the costs associated with handling numerous individual sheets of exfoliated wafer material, as is known in the prior art.

[0055] As shown in FIG. 2A, high-purity semiconductor-grade wafer material 10 is melted in an inert chamber 12, such as a chamber made from quartz. Of course, as mentioned above, the wafer material 10 may be any semiconductor material suitable for exfoliation, such as a type IV semiconductor material such as monocyrstalline silicon, polycrystalline silicon, or geranium, or any type III-V semiconductor material such as gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, indium antimonide, etc. Dopants 14 (e.g., boron, phosphorus, arsenic, or antimony) may be added to the melted wafer material 10 to add impurities thereto, preferably on the order of 10.sup.13 or 10.sup.16 atoms per cm.sup.3 to polarize the composition as a n-type (negative) or p-type (positive) semiconductor. A seed crystal 16 mounted to one end of a rotatable shaft 18 is then lowered into this somewhat impure mixture 20 of the melted wafer material 10 and the dopants 14 to begin the crystallization process as shown in FIG. 2B. The seed crystal 16, once immersed into this mixture 20 as shown in FIG. 2C, acts as a catalyst to start crystallization of the melted wafer material mixture 20 about the shaft 18. The shaft 18 is then slowly pulled upwards and rotated simultaneously to extract a large ingot 22 from the melt. The ingot 22 may be a single-crystal cylindrical ingot, a polycrystalline cylindrical ingot, or another semiconductor cylindrical ingot, such as any type IV semiconductor material (e.g., geranium) or any type III-V semiconductor material such as gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, indium antimonide, etc. Of course, the ingot 22 may be made from another semiconductor material known in the art. The crystallization of the ingot 22 formed from the mixture 20 is indicated by the decreased amount of the mixture 20 in the inert chamber 12, progressing from FIG. 2C to FIG. 2E. In this respect, FIG. 2E illustrates one ingot 22 for use with the processes disclosed herein.

[0056] Persons of ordinary skill in the art will readily recognize that the above-described process for creating the ingot 22 in accordance with step 100 may vary depending on the desired application and end characteristics of the wafer. For example, one may vary the composition of the melted wafer material 10, the amount and/or types of dopants 14 introduced into and mixed with the melted wafer material 10, the temperature in the inert chamber 12, the angular rotating speed of the shaft 18, and the rate of extracting the seed crystal 16. In this respect, the wafer material creation process 100 should be considered well known to those skilled in the art. In one embodiment, the ingot 22 may be an FZ silicon ingot made by the vertical zone melting process to reduce the number of impurities therein, especially oxygen impurities.

[0057] Once the ingot 22 has been created during step 100, the next step 102 in accordance with FIG. 1 is to mount the ingot 22 in preparation for the exfoliation process. In one embodiment, the ingot 22 remains stationary after being mounted. In another embodiment, the ingot 22 may be mounted to the rotator 24, as illustrated in FIG. 3, which may couple to the shaft 18 or other extension extending out from the body of the ingot 22. In this embodiment, the rotator 24 may be capable of holding and rotating the ingot 22 in the generally horizontal position shown with respect to FIG. 3. Alternatively, as shown in FIG. 4, a pair of rotation arms 26, 26 may extend out from or comprise a portion of the rotator (generally designated as numeral 24) and attach to a pair of planar end surfaces 28, 28 of the ingot 22. Here, the rotation arms 26, 26 may include an attachment mechanism 30 in the form of a grip, clamp, or other device having a high friction surface to retain (e.g., by compression fit) the ingot 22 therebetween. In this respect, any attachment mechanism 30 known in the art capable of supporting and rotating the ingot 22 at a stable and consistent speed in connection with the rotator 24 will suffice. Moreover, the rotator(s) 24, the rotation arms 26, 26 or the attachment mechanism 30 could also be utilized individually or in combination with one another to move the mounted ingot 22 back and forth about its axis of rotation 32 during the ion implantation process, as described in more detail below.

[0058] The next step as shown in FIG. 1 is to energize a microwave device 106 that produces a beam of energized protons or ions capable of penetrating into the outer surface of the ingot 22 as it rotates about the axis 32. Here, FIGS. 5A and 5B illustrate two examples a microwave device 34 for use with the processes disclosed herein. In some embodiments, the microwave device 34 may include a klystron (i.e., an electron tube used to generate or amplify electromagnetic radiation in the microwave region by velocity modulation), an electron cyclotron resonance ion source, a radio-frequency quadrupole (RFQ) accelerator, or any other high current particle accelerator. The microwave device 34 may generate a proton beam 36 (FIG. 5A) or an elongated proton beam 37 (FIG. 5B) out from an accelerator 38 directed toward the outer surface 40 of the ingot 22. In some embodiments, the accelerator 38 may include a Direct Current Gun or a Pelletron accelerator, but other comparable accelerator devices known in the art, such as a radio frequency (RF) accelerator, may be used as well. The accelerator 38 (e.g., an RF resonant cavity) guides microwaves from the microwave device 34 into a resonant cavity to produce high gradient electromagnetic fields that accelerate protons to a desired energy level. This minimizes the size of the microwave device 34 (high eV/m), while maintaining high production value. In this respect, one microwave device 34 may be attached to many RF resonant accelerating cavities (for example, the additional accelerators 38, 38 as illustrated in FIG. 5A) by use of a highway of intersecting electromagnetic waveguides. Thus, an entire factory yielding Gigawatt per year production of PV material can be powered by just a single microwave device 34. The resonant cavities are designed to maximize the quality factor, or Q value, thus minimizing the needed input energy of the microwave source.

[0059] The next step as shown in FIG. 1 is to penetrate a selected layer of the ingot 22. In the embodiment wherein the ingot 22 is rotating, the penetration preferably occurs approximately parallel to an axis of rotation 108 of the ingot 22. Exemplary devices known in the art for penetrating and essentially exfoliating a select surface depth of wafer material are shown and described, for example, in the aforementioned U.S. Pat. No. 7,939,812 to Glavish et al., U.S. Pat. No. 7,982,197 to Smick et al., U.S. Pat. No. 7,989,784 to Glavish et al., and U.S. Pat. No. 8,044,374 to Ryding et al. Here, the proposed method bombards the outer surface 40 of the ingot 22 to a predetermined depth 42 (FIG. 6) with the proton beam 36, 37 having energized protons preferably ranging in energy level from 0.2-2.5 megaelectron volt (MeV). Accordingly, the protons penetrate the ingot 22 to a skin depth 42 of approximately 3-30 micrometers. As the ingot 22 rotates about its axis 32, the proton beam 36, 37 continuously energizes a new layer of the outer surface 40. Of course, the depth 42 may vary depending on the type of microwave device, the energy level generated within the proton accelerator 38, etc. This proton bombardment step 108 allows a layer 44 of the bombarded surface 40 to be peeled or exfoliated away from the body of the ingot 22 and onto a continuous conveyor 46 as generally shown in FIG. 7. The skin depth 42 may range from 3-30 micrometers depending on the energy of the injected protons.

[0060] During step 108, the bombarded surface of the ingot 22 increases in temperature as a result of the proton beam 36, 37. As such, a cooling mechanism is preferably utilized to cool the outer surface 40 of the ingot 22 to prevent adverse or unexpected changes in the material properties of the ingot 22 due to heating. In this respect, it is particularly important to cool the area in and around the ingot 22 being exfoliated. Water or air circulation-based cooling devices may be used with the processes disclosed herein to provide either direct or indirect cooling of the ingot 22.

[0061] The thickness of the exfoliated layer 44 is exaggerated in FIGS. 6 and 7 for illustrative purposes. In this respect, a person of ordinary skill in the art will readily recognize that relative thicknesses of this exfoliated layer 44 will be much thinner than the initial thickness of the ingot 22 made in accordance with step 100. In one embodiment, as the ingot 22 is continuously exfoliated about its axis 32, its diameter will decrease in size and the relative size differential relative to the depth 42 of the exfoliated layer 44 will decrease.

[0062] In general, the beam 36 or the elongated beam 37 needs to energize a portion of the ingot 22 along its length thereof in accordance with the desired width of the resultant wafer. This process may vary depending on the type of beam 36, 37 and the length of the ingot 22 created in step 100. For example, FIG. 5A illustrates one embodiment wherein a single beam 36 emits from one accelerator 38. Here, the beam 36 contacts a portion of the outer surface 40 at a single point. To create the layer 44 having a width 48 (FIGS. 8A, 8B), the beam 36 may move left-to-right and right-to-left along the longitudinal axis of the ingot 22 (i.e., parallel to the height or axis 32 of the ingot 22) to energize the full width 48 of the ingot 22. In this embodiment, the ingot 22 may incrementally rotate to allow the beam 36 to successfully traverse the width 48. Once it has done so, the ingot 22 rotates forward so the next increment of the outer surface 40 can be energized and exfoliated away from the body of the ingot 22. Additional accelerators 38, 38, 38.sup.n producing additional beams 36, 36, 36.sup.n may be included with the microwave device 34 so that the entire width of the ingot 22 can be processed and exfoliated simultaneously to create, for example, layers 44, 44, 44 as shown in FIG. 8B. Alternatively, in lieu of moving any one of the beams 36, 36, 36.sup.n, the accelerators 38, 38, 38.sup.n, or the microwave device 34, the ingot 22 itself may traverse back and forth.

[0063] Alternatively, as shown in FIG. 5B, the microwave device 34 may produce the elongated beam 37 having a beam width equal to the width 48 of the desired finalized wafer. Similar to that described above with respect to the beam 36, multiple elongated beams 37, 37, 37.sup.n (additional beams 37, 37.sup.n not shown in FIG. 5B) may be used to exfoliate part of or substantially the entire width of the ingot 22 in a manner similar to that described above with respect to FIG. 8B. The advantage of using one or more of the elongated beams 37 is that it may not be necessary to stop or increment rotation of the ingot 22 about its axis 32. In this respect, rotation and cooling of the ingot 22 may be timed to specifically facilitate continuous exfoliation as the beam 37 would not otherwise require longitudinal movement along the length of the ingot 22, as does the beam 36.

[0064] The next step as shown in FIG. 1 is to remove the layer of penetrated wafer material from the ingot 110. As described above with respect to one embodiment, the ingot 22 may rotate angularly about the axis of rotation 32 so that the beam 36, 37 does not overlap any previously bombarded area of the surface 40. As the bombardment process continues, the layer 44 of exfoliated material peels away from the ingot 22 on to the conveyor 46. The conveyor 46 may include a metal substrate 50 or other comparable surface having a high enough coefficient of friction to grasp or pull the exfoliated layer 44 away from the ingot 22, as generally shown in FIG. 7. This prevents the exfoliated layer 44 from bunching near the surface 40 as the ingot 22 rotates.

[0065] The rotation of the ingot 22 permits simultaneous exfoliation and removal of exfoliated material in a single, continuous sheet. More specifically, as the ingot 22 rotates, the portion of the outer surface 40 of the ingot 22 being exfoliated changes as the angular position of the ingot 22 changes. Simultaneously, this rotation causes the layer of exfoliated wafer 44 material to peel off of the ingot 22 as the ingot 22 rotates. Since the exfoliated layer 44 continuously peels off the ingot 22 as its angular position changes, a single continuous sheet of wafer material is produced. That is, the rotating ingot 22 unwinds in the same manner that a roll of paper or a coil of metal. This process provides a large savings over conventional exfoliation processes since a continuous sheet of exfoliated wafer material is produced.

[0066] The removal step 110 may produce a ribbon of one or more substrate layers 44, 44, 44.sup.n (e.g., as shown in FIG. 8B) of wafer material 3-30 micrometers thick, depending on the bombarding proton energy. The ingot 22 moves forward a distance equal to the width of the metal substrate producing exactly enough material to be exfoliated onto the metal substrate 50 of the conveyor 46. The width of the metal substrate will correspond to the width 48 of the bombarded ingot surface, and can range from 160-200 mm.

[0067] This new ribbon or layer 44 of metal substrate with PV material is then conveyed away from the ingot 22 during step 112 for subsequent stamping 114 into individual wafers (FIG. 1). In this respect, FIG. 9 illustrates movement of the layer or strip of exfoliated wafer material 44 away from the ingot 22 and toward a press 52 having a die 54 with one or more blades 56 designed to cut or shear the ribbon or layer 44 into individual wafers 58 (FIG. 10) at specific intervals. For example, when the press 52 extends the die 54 downwardly as shown in FIG. 10, the blades 56 contact and cut the strip of wafer material 44 into wafers 58 at intervals such as every 160-200 mm, thereby producing 160160 mm wafers or 200200 mm wafers. While these sizes may be the current dimensions of an average square PV wafer, the size of the wafer 58 should not be limited thereto. That is, the resultant size of the wafer 58 could be larger or smaller depending on the technology used to cut the layer 44 into the individual wafers 58. Furthermore, any device known in the art for slicing or cutting strips of wafer material may be utilized to create the wafers 58 from the strip or layer 44, such as alternative stamping or sawing mechanisms. Preferably, such a cutting or sawing step should create as little residual wafer material waste as possible. At this point, the final product is a square or rectangular PV wafer 58 that can run through conventional wiring and packaging machinery to produce a complete solar panel for use in residential, commercial, or utility scale solar energy production.

[0068] Of course, the processes and apparatuses described above should not be limited only to use with cylindrical ingots. Such processes and apparatuses may be applied to ingots of various shapes, sizes and materials (e.g., any type IV semiconductor, such as monocyrstalline or polycrystalline silicon or germanium, or any type III-V semiconductor material such as gallium arsenide, indium phosphide, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium nitride, gallium phosphide, gallium antimonide, indium nitride, indium arsenide, indium antimonide, etc.), including any type of metal material cast into a shape suitable for further processing as disclosed herein, including FZ silicon.

[0069] For example, the ingot 22 may have a polygonal cross section. An ingot having such a shape may be rotated about its longitudinal axis in the same manner as a cylindrical ingot. Most rotationally processed work pieces (i.e. work pieces turned on a rotator or lathe) must be cylindrical so the tool (i.e. lathe cutter) remains in contact with the work piece throughout the entire 360-degree rotation thereof. The exfoliation process, however, does not require a fixed position tool to remain in constant contact with the ingot. Instead, an energized beam that can accommodate the varying rotational diameter of a non-circular, rotating object preferably processes the work piece ingot. That is, the energized beam bombards the outer surface of the ingot and penetrates a layer of wafer material even though the diameter of the rotating ingot has a polygonal cross section that varies angularly. Therefore, ingots having a polygonal cross section may be exfoliated in the same manner as cylindrical ingots, as discussed in greater detail above.

[0070] Additionally, the wafer material may not necessarily be limited to those materials described above. In fact, any suitable material known in the art for construction of wafers may be used, including, but not limited to, float zone silicon (FZ silicon), polycrystalline silicon, cadmium telluride, sapphire crystal, and copper indium gallium selenide. Moreover, the wafer material can be either an n-type or p-type material. Obviously, the type and concentration of dopants and the specific processing parameters, such as temperatures, may vary depending on the choice of wafer material.

[0071] In an alternative manufacturing process similar to the processes described above with respect to steps (100)-(114), instead of using the cylindrical ingot 22 as shown in FIGS. 3-10, the ingot 22 could be initially cut or squared-off by a diamond wire 60 or other comparable cutting mechanism to form a generally rectangular semiconductor block 62 as shown generally in FIG. 11. Of course, the semiconductor block 62 could be cut as a rectangle or square, and could be cut to a number of different sizes or shapes, as desired. In the embodiment shown in FIG. 11, the semiconductor block 62 has a front work surface 64 (and similarly shaped rear work surface 64) and a side work surface 66 (and corresponding other side work surfaces 66-66) of up to three feet long, all of which are preferably ready for exfoliation in accordance with the embodiments described herein. For purposes of simplicity, the exfoliation process is described below with respect to the front work surface 64 and the side work surface 66, but the exfoliation process may work equally well alone or simultaneously with one or more of the work surfaces 64 and 66-66.

[0072] Alternatively, the exfoliation process disclosed herein could be used with semiconductor wafers that have already been cut into thicknesses on the order of 200-600 microns by methods known in the art. In this respect, these existing or pre-cut semiconductor wafers could be exfoliated to form multiple thinner wafers on the order of 2-70 micrometers, or more preferably on the order of 4-20 micrometers. For example, a 300 micrometer pre-cut semiconductor wafer could be exfoliated with the processes disclosed herein to produce 12 semiconductor wafers having a 25 micrometer thickness. Such pre-cut semiconductor wafers would essentially be used as a work piece in place of the semiconductor block 62 described below in more detail. In general, the processes disclosed herein may be able to form semiconductor wafers (pre-cut or final formed) between about 2 micrometers and 1 meter.

[0073] Once the semiconductor block 62 has been created using methods known in the art, the semiconductor block 62 may be mounted for preparation of the exfoliation process, in accordance with the embodiments described above, or other embodiments known in the art. Although, one difference is that the semiconductor block 62 need not be rotated as described above with respect to the cylindrical silicon ingot 22 because the work surfaces 64, 66 provide a planar exfoliating surface as opposed to a rounded or cylindrical work surface that requires rotation about its axis to produce a flat wafer material.

[0074] In this respect, FIGS. 12A and 12B illustrate two methods of exfoliating the outer work surfaces 64, 66 described above. For example, in FIG. 12A, the microwave device 34 produces the elongated proton beam 37 for contact about the width of the front work surface 64. The beam 37 is preferably moved top down as indicated by the directional arrow. FIG. 12B illustrates a similar embodiment, wherein the microwave device 34 produces similar elongated proton beam 37 that preferably spans the width of the side work surface 66 and moves top-down as indicated by the directional arrow. In this respect, as shown in FIGS. 13A and 13B, an exfoliated layer of semiconductor material 68, 68 begins to exfoliate off or peel away from the semiconductor block 62, in accordance with the embodiments described above. Similarly, this exfoliated layer 68 or 68 may be conveyed away from the work piece 62 by a conveyor 46 or the like (FIG. 14). The exfoliation process could create individual semiconductor wafers 58, for example by exfoliating a front work surface 64 that matches the desired dimensions of the resultant semiconductor wafer 58, or by exfoliating a larger area (e.g., by way of the side work surface 66), and then later cutting the strip of exfoliated semiconductor material into strips as described above with respect to the exfoliated layer 44.

[0075] One particular advantage of the embodiments disclosed herein is the use of the exfoliation process with semiconductor materials having relatively lower oxygen content (e.g., 10.sup.15 oxygen atoms per cubic centimeter). On one hand, current solar grade silicon material used to create silicon wafers sized for use in solar panels have a relatively higher oxygen content (e.g., 10.sup.18 oxygen atoms per cubic centimeter) and are produced by the Czochralski process. These silicon wafers only have an efficiency of 19%-20%, but are economical to produce. On the other hand, silicon materials having a comparatively low oxygen content and therefore higher efficiency (e.g., float zone silicon wafers have an efficiency of approximately 24.7%) must be cut into larger than desired sizes (e.g., on the order of 300-500 microns in thickness) because the rigid material properties prevent known methods (e.g., a diamond wire) from cutting the material any thinner. Thus, silicon wafers made from float zone silicon or the like are currently cost prohibitive due to material costs and the currently available minimum manufacturing thickness of the wafers.

[0076] Accordingly, the exfoliation processes described above are particularly useful in economically producing semiconductor wafers from a higher grade semiconductor material (e.g., float zone silicon) that has a relatively lower oxygen content and a smaller thickness (e.g., 2-70 microns, and preferably 4-20 microns, as opposed to 100+ microns). This is accomplished by bombarding the surface area structure of the semiconductor material with the aforementioned methods for ion implantation, such as by way of the microwave device 34 (e.g., a DC accelerator or other beam having enhanced energy levels). The surface area bombardment is particularly preferred over known methods because the surface area tension of higher purity semiconductor material prohibits physically sawing off (e.g., by a diamond wire) wafers to economical thicknesses (e.g., under 100 microns).

[0077] As shown in FIGS. 13A, 13b and 14, the exfoliated layer 68 or 68 peels away from the semiconductor block 62 by a thickness determined by the energy level of the ions bombarding the surface thereof. In this respect, increasing the energy level of the beam 37 results in deeper surface level penetration and a thicker wafer 58, while decreasing the energy level of the beam 37 results in shallower surface level penetration and a thinner wafer 58. More specifically, using the implantation density of approximately 510.sup.14 to 510.sup.16 ions/cm.sup.2 will penetrate the surface level of float zone silicon to a depth sufficient to produce wafers 58 having a relative thickness of 2-70 microns, and preferably 4-20 microns. In alternative embodiments, an implantation density of approximately 110.sup.17 ions/cm.sup.2 may produce a semiconductor wafer having a thickness of 2-70 microns, or more preferably 4-20 microns. These relatively thin wafers 58 may be placed on the conveyor 46 having a surface that includes a conductive surface or backing 70 to pull the wafers 58 away from the semiconductor block 62 as each wafer 58 is produced.

[0078] Although several embodiments have been described in detail for purposes of illustration, various modifications may be made without departing from the scope and spirit of the invention. Accordingly, the invention is not to be limited, except as by the appended claims.