Light emitting diode and method of fabricating the same
09608165 ยท 2017-03-28
Assignee
Inventors
- Kyung Wan Kim (Ansan-si, KR)
- Tae Kyoon Kim (Ansan-si, KR)
- Yeo Jin Yoon (Ansan-si, KR)
- Ye Seul Kim (Ansan-si, KR)
- Sang Hyun Oh (Ansan-si, KR)
- Jin Woong Lee (Ansan-si, KR)
- In Soo Kim (Ansan-si, KR)
Cpc classification
H10H20/82
ELECTRICITY
H10H20/819
ELECTRICITY
H10H20/8215
ELECTRICITY
H10H20/01335
ELECTRICITY
H10H20/812
ELECTRICITY
International classification
H01L33/30
ELECTRICITY
H01L33/00
ELECTRICITY
Abstract
A method of fabricating a light emitting diode (LED) includes: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; and separating the substrate into unit chips, and at the same time, forming a concavo-convex structure having the shape of irregular vertical lines in a side surface of the unit chip.
Claims
1. A method of fabricating a light emitting diode (LED), comprising: sequentially stacking a first conductivity-type semiconductor layer; an active layer, and a second conductivity-type semiconductor layer on a substrate; separating the substrate along at least two side surfaces into unit chips, and at the same time, forming a concavo-convex structure having a shape of irregular vertical lines in the at least two side surfaces of at least one of the unit chips; and forming an extension electrode electrically connected to the first conductivity-type semiconductor layer, on the at least two side surfaces of the at least one of the unit chips, wherein an entirety of the extension electrode is formed below a top surface of the active layer.
2. The method as claimed in claim 1, wherein grooves disposed in the concavo-convex structure have different widths and/or lengths from each other.
3. The method as claimed in claim 1, wherein the separating of the substrate into the unit chips includes scribing the substrate using a fluid-jet-guided laser.
4. The method as claimed in claim 1, wherein separating of the substrate into the unit chips includes forming a doped region in at least a part of one of the at least two side surfaces of the at least one of the unit chips.
5. The method as claimed in claim 4, wherein the forming of the doped region at the same time as forming the concavo-convex structure in one of the at least two side surfaces of the at least one of the unit chips is performed using a fluid-jet-guided laser including a dopant material.
6. The method as claimed in claim 4, wherein the forming of the concavo-convex structure in an undoped region of one of the at least two side surfaces of the at least one of the unit chips is performed using a fluid-jet-guided laser including no dopant material.
7. The method as claimed in claim 4, wherein the doped region has a different refractive index from an undoped region.
8. The method as claimed in claim 4, wherein the doped region has a higher conductivity than an undoped region.
9. A method of fabricating a light emitting diode (LED), comprising: sequentially stacking a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; separating the substrate into unit chips, and at the same time, forming a first face perpendicular to an upper surface of the substrate, a second face inclined with respect to the first face in a side surface of at least one of the unit chips, and a third face inclined with respect to the first face; and forming an extension electrode electrically connected to the first conductivity-type semiconductor layer, on the side surface of the at least one of the unit chips, wherein: an angle .sub.1 formed by a normal line to the first face and a normal line to the second face is less than 90 degrees; an angle .sub.2 formed by a normal line to the first face and a normal line to the third face is less than 90 degrees; the first conductivity-type semiconductor layer is exposed in the second face; the substrate is exposed in the third face; angle .sub.1 is greater than angle .sub.2.
10. The method as claimed in claim 9, wherein the separating of the substrate into the unit chips includes scribing the substrate using a fluid-jet-guided laser.
11. The method as claimed in claim 10, wherein the separating of the substrate into the unit chips comprises: partially scribing the substrate using the fluid-jet-guided laser; and physically cutting a remaining part of the substrate.
12. The method as claimed in claim 9, wherein the separating of the substrate into the unit chips includes fully scribing the substrate using a fluid-jet-guided laser.
13. The method as claimed in claim 9, wherein the separating of the substrate into the unit chips includes forming a doped region in at least a part of the side surface of the at least one of the unit chips.
14. The method as claimed in claim 13, wherein the forming of the doped region is performed using a fluid-jet-guided laser including a dopant material.
15. The method as claimed in claim 13, wherein the doped region has a different refractive index from an undoped region.
16. The method as claimed in claim 13, wherein the doped region has a higher conductivity than an undoped region.
17. A method of fabricating a light emitting diode (LED), comprising: sequentially stacking a first conductivity-type semiconductor layer, an active layer; and a second conductivity-type semiconductor layer on a substrate; separating the substrate along at least two side surfaces into unit chips; forming a doped region in at least a part of the at least two side surfaces of at least one of the unit chips exposed during the separation; and forming an extension electrode electrically connected to the first conductivity-type semiconductor layer, on the at least two side surfaces of the at least one of the unit chips, wherein an entirety of the extension electrodes is formed below a to surface of the active layer.
18. The method as claimed in claim 17, wherein the forming of the doped region includes scribing the substrate using a fluid-jet-guided laser including a dopant material.
19. The method as claimed in claim 17, wherein the doped region is an n-type doped region.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The above and/or other aspects of the present invention will be more apparent by describing certain exemplary embodiments of the present invention with reference to the accompanying drawings, in which:
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DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS
(19) Certain exemplary embodiments of the present invention will now be described in greater detail with reference to the accompanying drawings.
(20) In the following description, same drawing reference numerals are used for the same elements even in different drawings. The matters defined in the description, such as detailed construction and elements, are provided to assist in a comprehensive understanding of the invention. Thus, it is apparent that the exemplary embodiments of the present invention can be carried out without those specifically defined matters. Also, well-known functions or constructions are not described in detail since they would obscure the invention with unnecessary detail.
(21) It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.
(22) It will be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present. It will be also understood that when an element is on another element, it can be directly on the other element or intervening elements may be present. Other words used to describe the relationship between elements should be interpreted in a like fashion (i.e., between versus directly between, adjacent versus directly adjacent, etc.). The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms a, an, and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises, comprising, includes, and/or including, when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
(23) In addition, as used herein, directional expressions such as upward, upper (portion), an upper surface, etc. may also be understood as the meanings of downward, lower (portion), a lower surface, etc. In other words, expressions of spatial directions should be understood as relative directions, but should not be limitedly understood as denoting absolute directions.
(24) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
(25)
(26) Referring to
(27) A first conductivity-type semiconductor layer 21, an active layer 22, and a second conductivity-type semiconductor layer 23 may be formed on the substrate 10. The first conductivity-type semiconductor layer 21, the active layer 22, and the second conductivity-type semiconductor layer 23 may configure a semiconductor structure 20.
(28) The first conductivity-type semiconductor layer 21 may be a nitride-based semiconductor layer and doped with n-type dopant. For example, the first conductivity-type semiconductor layer 21 may be an In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, x+y1) layer doped with Si as the n-type dopant. The active layer 22 may be an In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, 0x+y1) layer having a single-quantum well or multi-quantum well (MQW) structure. The second conductivity-type semiconductor layer 23 may also be a nitride-based semiconductor layer, and doped with p-type dopant. For example, the second conductivity-type semiconductor layer 23 may be an In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, 0x+y1) layer doped with Mg or Zn as the p-type dopant. The semiconductor structure 20 may be formed using a metal-organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (MBE) method.
(29) Referring to
(30) Next, a current spreading conductive layer 30 may be formed on the upper surface of the semiconductor structure 20, more specifically, the second conductivity-type semiconductor layer 23. The current spreading conductive layer 30 may be a transparent conductive layer, for example, an indium tin oxide (ITO) layer.
(31) Referring to
(32) Referring to
(33) For this, the scribing process may be performed using a fluid-jet-guided laser WGL. More specifically, the scribing may be performed by disposing the fluid-jet-guided laser WGL on the semiconductor structure 20, more specifically, on the first conductivity-type semiconductor layer 21, exposed in the mesa-etched area M, and then moving the fluid-jet-guided laser WGL in the direction toward the lower surface of the substrate 10. The fluid may be water.
(34)
(35) Referring to
(36) When the fluid-jet W becomes in contact with the surface of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21, a width of the fluid jet W may increase due to the surface tension of the fluid, as shown in
(37) At this time, an etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21, by the fluid-jet-guided laser WGL, and an etch rate of the substrate 10 by the fluid-jet-guided laser WGL, may be the same or different. For example, when the substrate 10 is a sapphire (Al.sub.2O.sub.3) substrate, and the first conductivity-type semiconductor layer 21 is a GaN layer, the etch rate of the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL may be greater than the etch rate of the substrate 10 by the fluid-jet-guided laser WGL. For another example, when the substrate 10 is a GaN substrate, and the first conductivity-type semiconductor layer 21 is a GaN layer, that is, when the substrate 10 and the first conductivity-type semiconductor layer 21 are the same material layers, the etch rate of the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL may be substantially the same as the etch rate of the substrate 10 by the fluid-jet-guided laser WGL.
(38)
(39) Referring to
(40) Since the second face S1 and the third face S3, which are the inclined faces, reduce total reflection of light, light extraction efficiency may be improved. Further, a lighting angle may be controlled by adjusting those angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3. The angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3 may vary depending on a pressure and width of the fluid-jet (W in
(41) In addition, the angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3 may vary depending on an etch rate of a corresponding layer by the fluid-jet-guided laser WGL. For example, as described above, when the etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL, is greater than that of the substrate 10, the angle of inclination .sub.1 of the second face S1 exposing the first conductivity-type semiconductor layer 21 may be greater than the angle of inclination .sub.2 of the third face S3 exposing the substrate 10. For another example, when the etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL is substantially the same as that of the substrate 10, the angle of inclination .sub.1 of the second face S1 exposing the first conductivity-type semiconductor layer 21 may substantially the same as the angle of inclination .sub.2 of the third face S3 exposing the substrate 10.
(42)
(43) Referring to
(44) For this, the scribing process may be performed using a fluid-jet-guided laser WGL. More specifically, the scribing process may be performed by disposing the fluid-jet-guided laser WGL on a lower surface of the substrate 10, and then moving the fluid-jet-guided laser WGL in the direction toward an upper surface of the semiconductor structure 20. The fluid may be water.
(45)
(46) Referring to
(47) An upper part of the scribe lane SL may be formed using a fluid-jet-guided laser WGL (
(48) More specifically, the scribing may be partially performed by disposing the fluid-jet-guided laser WGL on the semiconductor structure 20, more specifically, on the first conductivity-type semiconductor layer 21, exposed in the mesa-etched area M, and then partially moving the fluid-jet-guided laser WGL in the direction toward the lower surface of the substrate 10. Then, the fluid-jet-guided laser WGL is removed. Next, the remaining part that was not scribed by the fluid-jet-guided laser WGL may be cut using a dry laser or a physical breaking method. At this time, the side surfaces of the unit chips UC exposed in an upper part of the scribe lane SL formed using the fluid-jet-guided laser WGL may have concavo-convex structures CC having the shape of irregular vertical lines. More specifically, widths and/or lengths of grooves disposed in the concavo-convex structures CC may be different from each other, and the arrangement may be irregular. The concavo-convex structures CC having the shape of the irregular vertical lines may be formed regardless of a crystal face of the semiconductor structure 20 or the substrate 10, unlike when using a dry laser or physical breaking method.
(49) On the contrary, the side surfaces of the unit chips UC exposed in the lower part of the scribe lane SL formed using the dry laser or the physical breaking method may have a regular rough pattern (not shown) formed along a crystal face of the substrate 10. The concavo-convex structures CC formed in the side surfaces of the unit chips UC exposed in the upper part of the scribe lane SL may have a greater surface roughness than the rough pattern formed in the side surfaces of the unit chips UC exposed in the lower part of the scribe lane SL. In addition, each side surface of the unit chips UC exposed in the lower part of the scribe lane SL formed using the dry laser or the physical breaking method may have no lower inclined face (S3 in
(50)
(51) Referring to
(52) A lower part of the scribe lane SL may be formed using a fluid-jet-guided laser WGL (
(53) At this time, the side surfaces of the unit chips UC exposed in a lower part of the scribe lane SL formed using the fluid-jet-guided laser WGL may have concavo-convex structures CC having the shape of irregular vertical lines. More specifically, widths and/or lengths of grooves disposed in the concavo-convex structures CC may be different from each other, and the arrangement may be irregular. The concavo-convex structures CC having the shape of the irregular vertical lines may be formed regardless of a crystal face of the semiconductor structure 20 or the substrate 10, unlike when using a dry laser or physical breaking method.
(54) On the contrary, the side surfaces of the unit chips UC exposed in the upper part of the scribe lane SL formed using the dry laser or physical cutting method may have a regular rough pattern (not shown) formed along a crystal face of the substrate 10 or the semiconductor structure 20. The concavo-convex structures CC formed in the side surfaces of the unit chips UC exposed in the lower part of the scribe lane SL may have a greater surface roughness than the rough pattern formed in the side surfaces of the unit chips UC exposed in the upper part of the scribe lane SL. In addition, each side surface of the unit chips UC exposed in the upper part of the scribe lane SL formed using the dry laser or the physical breaking method may have no upper inclined face (S1 in
(55)
(56) Referring to
(57) The scribing process may be performed using a fluid-jet-guided laser WGL including a dopant material. In this case, the doped region DR may be formed at the same time as forming separated unit chips UC by forming the scribe lane SL in the scribing process. Here, a perspective view of the unit chip UC is similar to that described in
(58) For example, the scribing may be performed by disposing the fluid-jet-guided laser WGL on the semiconductor structure 20, more specifically, on the first conductivity-type semiconductor layer 21, exposed in the mesa-etched area M, and then moving the fluid-jet-guided laser WGL in the direction toward the lower surface of the substrate 10. The fluid may be water. The fluid-jet (W in
(59) Referring to
(60) The extension electrode 41e may function as an interconnection connecting the first electrode 41 to an electrode (not shown) disposed on a package substrate. Accordingly, when the extension electrode 41e is formed, no wire bonding to the first electrode 41 may be required.
(61)
(62) Referring to
(63) In addition, a plurality of the laser beams L progressing in the fluid-jet W become diffused and distributed in the fluid-jet W and in contact with a surface of a material which is to be etched, in different incident angles. As a result, concavo-convex structures (CC in
(64) When the fluid-jet W becomes in contact with the surface of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21, a width of the fluid-jet W may increase due to the surface tension of the fluid (
(65) At this time, an etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL and an etch rate of the substrate 10 by the fluid-jet-guided laser WGL, may be the same or different. For example, when the substrate 10 is a sapphire (Al.sub.2O.sub.3) substrate, and the first conductivity-type semiconductor layer 21 is a GaN layer, the etch rate of the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL may be greater than the etch rate of the substrate 10 by the fluid-jet-guided laser WGL. For another example, when the substrate 10 is a GaN substrate, and the first conductivity-type semiconductor layer 21 is a GaN layer, that is, when the substrate 10 and the first conductivity-type semiconductor layer 21 are the same material layers, the etch rate of the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL may be substantially the same as the etch rate of the substrate 10 by the fluid-jet-guided laser WGL.
(66)
(67) Referring to
(68) Since the second face S1 and third face S3, which are the inclined faces, reduce total reflection of light, light extraction efficiency may be improved. Further, a lighting angle may be controlled by adjusting those angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3. The angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3 may vary depending on a pressure and width of the fluid-jet (W in
(69) In addition, the angles of inclination .sub.1 and .sub.2 of the inclined faces S1 and S3 may vary depending on an etch rate of a corresponding layer by the fluid-jet-guided laser WGL. For example, as described above, when the etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL is greater than that of the substrate 10, the angle of inclination .sub.1 of the second face S1 exposing the first conductivity-type semiconductor layer 21 may be greater than the angle of inclination .sub.2 of the third face S3 exposing the substrate 10. For another example, when the etch rate of the semiconductor structure 20, more specifically, the first conductivity-type semiconductor layer 21 by the fluid-jet-guided laser WGL is substantially the same as that of the substrate 10, the angle of inclination .sub.1 of the second face S1 exposing the first conductivity-type semiconductor layer 21 may substantially the same as the angle of inclination .sub.2 of the third face S3 exposing the substrate 10.
(70)
(71) Referring to
(72) For this, the scribing process may be performed using a fluid-jet-guided laser WGL. More specifically, the scribing process may be performed by disposing the fluid-jet-guided laser WGL on a lower surface of the substrate 10, and then moving the fluid-jet-guided laser WGL in the direction toward an upper surface of the semiconductor structure 20. The fluid may be water. The fluid-jet W may include a dopant material. The dopant material may be, for example, benzene, ethanol, acetone, phosphoric acid, or boric acid. When the dopant material is phosphoric acid, the doped region DR may be an n-type doped region, and when the dopant material is boric acid, the doped region DR may be a p-type doped region.
(73)
(74) Referring to
(75) More specifically, the scribing may be partially performed by disposing the fluid-jet-guided laser WGL on the semiconductor structure 20, more specifically, on the first conductivity-type semiconductor layer 21, exposed in the mesa-etched area M, and then partially moving the fluid-jet-guided laser WGL in the direction toward the lower surface of the substrate 10. Then, the fluid-jet-guided laser WGL is removed. Next, the remaining part that was not scribed by the fluid-jet-guided laser WGL may be cut using the dry laser or physical breaking method.
(76) In this case, a perspective view of the unit chip UC may be similar to that described in
(77) On the contrary, the side surfaces of the unit chips UC exposed in the lower part of the scribe lane SL formed using the dry laser or physical breaking method may have no doped region, and have a regular rough pattern (not shown) formed along a crystal face of the substrate 10. The concavo-convex structures (CC in
(78) In addition, each side surface of the unit chips UC exposed in the lower part of the scribe lane SL formed using the dry laser or physical cutting method may have no lower inclined face (S3 in
(79)
(80) Referring to
(81) In this case, a perspective view of the unit chip UC may be similar to that described in
(82) On the contrary, the side surfaces of the unit chips UC exposed in the upper part of the scribe lane SL formed using the dry laser or physical cutting method may have no doped region, and have a regular rough pattern (not shown) formed along a crystal face of the substrate 10 or the semiconductor structure 20. The concavo-convex structures (CC in
(83) On
(84) In the exemplary embodiments of the present invention described with reference to
(85) For example, the doped region DR may be formed only at an upper part of a side surface of the unit chip UC, more specifically, at a side surface of the first conductivity-type semiconductor layer 21 (
(86) Hereinafter, an exemplary example will be provided for easier understanding of the present invention. However, the following exemplary embodiment is illustrative of the present invention, and is not to be construed as limiting thereof.
Fabrication Example
(87) A part of a semiconductor structure and a substrate was scribed using a water-guided-laser, and then the remaining part was physically cut.
Comparative Example
(88) A part of a semiconductor structure and a substrate was scribed using a dry laser, and then the remaining part was physically cut.
(89)
(90) Referring to
(91) On the contrary, referring to
(92) According to the exemplary embodiments of the present invention, since total reflection of light is reduced by forming a concavo-convex structure in a side surface of a unit chip, light extraction efficiency may be improved. In addition, the side surface of the unit chip may have an inclined face at an upper surface or a lower surface thereof. The light extraction efficiency may be further improved since the total reflection of light is also reduced by the inclined face.
(93) The foregoing exemplary embodiments and advantages are merely exemplary and are not to be construed as limiting the present invention. The present teaching can be readily applied to other types of apparatuses. Also, the description of the exemplary embodiments of the present invention is intended to be illustrative, and not to limit the scope of the claims, and many alternatives, modifications, and variations will be apparent to those skilled in the art.