APD Focal Plane Arrays with Backside Vias

Abstract

An avalanche photodiode (APD) array with reduced cross talk comprises, in the illustrative embodiment, a 2D array of Geiger-mode APDs, wherein a via is formed through the backside (substrate) of each APD in the array.

Claims

1. An article comprising a first avalanche photodiode (APD), the first APD comprising: a substrate layer having a first surface and a second surface, wherein, in operation, input light is received at the first surface of the substrate layer and propagates toward the second surface thereof; a buffer layer abutting the second surface of the substrate layer; a via extending from the first surface of the substrate layer and passing at least partially through the substrate layer towards the second surface thereof; and active device layers.

2. The article of claim 1 wherein the via is filled with transparent epoxy.

3. The article of claim 1 wherein the substrate layer comprises InP.

4. The article of claim 1 wherein a minimum diameter of the via is at least as large as an active region of the first APD and the via is superposed with respect to the active region and aligned therewith.

5. The article of claim 1 further comprising a read-out integrated circuit, wherein the read-out integrated circuit (ROIC) and the first APD are coupled to one another.

6. The article of claim 5 further comprising an indium bump, wherein the indium bump is used to couple the ROIC and the first APD to one another.

7. The article of claim 5 wherein the indium bump aligns with the via.

8. The article of claim 5 wherein the indium bump does not align with the via.

9. The article of claim 1 wherein the via passes completely through the substrate layer.

10. The article of claim 1 wherein the via is offset from an active region of the first APD.

11. The article of claim 1 and further comprising additional APDs configured in the same manner as the first APD, wherein the first APD and the additional APDs are organized in a 2D array, each APD defining a pixel and wherein the 2D array is characterized by a pixel pitch, and wherein a maximum diameter of the via of each of the APDs in the 2D array is about 75% of the pixel pitch and wherein a minimum diameter of the via of each of the APDs is at least as large as a diameter of an active region of each pixel.

12. The article of claim 1 wherein the first APD is a Geiger-mode APD.

13. The article of claim 12 wherein the via passes completely through the substrate layer.

14. The article of claim 12 wherein the via does not pass completely through the substrate layer.

15. The article of claim 14 wherein the via is offset from an active region of the Geiger-mode APD.

16. An article comprising a first Geiger-mode avalanche photodiode (GmAPD), the first GmAPD comprising: a substrate layer having a first surface and a second surface, wherein, in operation, input light is received at the first surface of the substrate layer and propagates toward the second surface thereof; a buffer layer abutting the second surface of the substrate layer; a via passing through the substrate layer and the buffer layer; an absorption layer having a first surface abutting the buffer layer; an electrical passivation layer that is not opaque disposed in the via and extending between the second surface of the InP substrate layer and the first surface of the absorption layer; and a cap layer comprising an InP multiplication region and a diffused region, wherein an active region of the first GmAPD contains the multiplication region and a portion of the diffused region, and wherein a central axis of the via aligns with the center of the active region

17. The article of claim 16 wherein the via is filled with a transparent material.

18. The article of claim 16 wherein the substrate layer comprises InP.

19. The article of claim 16 further comprising a read-out integrated circuit, wherein the read-out integrated circuit (ROIC) and the first GmAPD are coupled to one another.

20. The article of claim 16 and further comprising additional GmAPDs configured in the same manner as the first GmAPD, wherein the first GmAPD and the additional GmAPDs are organized in a 2D array, each GmAPD defining a pixel and wherein the 2D array is characterized by a pixel pitch, and wherein a maximum diameter of the via of each of the GmAPDs in the 2D array is about 75% of the pixel pitch and wherein a minimum diameter of the via of each of the GmAPDs is at least as large as a diameter of the active region of each pixel.

21. A method comprising: providing a wafer, wherein the wafer comprises a substrate; epitaxially growing active device layers on the substrate; defining a plurality of APDs in a 2D array in the active device layers; reducing a thickness of the substrate; forming a plurality of vias in the substrate; and attaching a read out integrated circuit to each APD.

22. The method of claim 21 wherein forming a plurality of vias further comprises forming the vias to extend fully through the substrate.

23. The method of claim 21 wherein forming a plurality of vias further comprises forming the vias so that each via aligns with an active region of a respective APD.

24. The method of claim 21 wherein forming a plurality of vias further comprises forming the vias so that each via is offset from an active region of a respective APD.

25. The method of claim 24 wherein forming a plurality of vias further comprises forming the vias so that each via does not extend fully through the substrate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG. 1 depicts a representative prior-art InGaAs/InP APD or GmAPD device structure with back-side illumination.

[0024] FIGS. 2A-C depict a sequence of steps for fabricating a first embodiment of an APD or GmAPD in accordance with present teachings.

[0025] FIG. 2D depicts the APD or GmAPD of FIG. 2C hybridized to a read-out integrated circuit (ROIC).

[0026] FIGS. 3A-C depict a sequence of steps for fabricating a second embodiment of an APD or GmAPD in accordance with the present teachings.

[0027] FIG. 3D depicts the APD or GmAPD of FIG. 3C hybridized to an ROIC.

[0028] FIG. 4A depicts, for an array of conventional GmAPDs, photons traveling from a primary avalanche location, as generated by blackbody radiation and electroluminescence, toward neighboring active pixels, such as via backside substrate reflection, resulting in spurious dark counts.

[0029] FIG. 4B depicts, for an array of GmAPD in accordance with the present teachings, the manner in which backside-etched vias reduce backside-reflected crosstalk.

[0030] FIG. 5 depicts a comparison of the crosstalk exhibited from a conventional GmAPD camera and a GmAPD camera in accordance with the present invention.

[0031] FIG. 6 depicts an APD or GmAPD having a via in accordance with the illustrative embodiment, wherein minimum and maximum via diameter is compared to the diameter of the active region of the APD or GmAPD.

[0032] FIG. 7 depicts an APD or GmAPD with a partial via, in accordance with an embodiment of the present invention.

[0033] FIG. 8A depicts a side view of an array of APDs or GmAPDs in accordance with the present teachings, wherein, for each pixel, the via is offset from the active region of the pixel.

[0034] FIG. 8B depicts a plan view of a first embodiment of the array of APDs or GmAPDs depicted in FIG. 8A, wherein the vias form a continuous network throughout the array.

[0035] FIG. 8C depicts a plan view of a second embodiment of the array of APDs or GmAPDs depicted in FIG. 8A, wherein the vias form a discontinuous network throughout the array.

DETAILED DESCRIPTION

[0036] Embodiments of the present invention are applicable to both linear-mode APDs and GmAPDs. The benefit, however, for reduced crosstalk is most significant in the case of GmAPDs. Although there are some structural differences between the linear-mode and Geiger-mode APDs (mostly a variation in thickness of certain layers), the primary differences pertain to their mode of operation. Additionally, the read-out integrated circuit (ROIC) that is used with a linear-mode APD requires analogue circuitry to amplify avalanche signals whereas GmAPDs can utilize a much simpler digital readout circuitry (since the signal coming out of the GmAPD is already macroscopic and readable without further amplification). It is to be understood that the structures shown in the various Figures are generic for linear-mode and Geiger-mode APDs and the present teachings apply to both. For convenience, this description will simply refer to the devices as GmAPDs, which is intended to include both Geiger-mode and linear-mode APDs unless otherwise indicated.

[0037] FIG. 1 depicts a typical prior-art InGaAs/InP GmAPD 100. In FIG. 1, the GmAPD is oriented such that the back side (i.e., the substrate) is depicted as being the top of the GmAPD.

[0038] GmAPD 100 comprises n-contact metallization 102, anti-reflection coating 104, substrate 106, buffer layer 108, absorption layer 110, grading layer 112, field control layer 114, cap layer 116, passivation layer 124, and n-contact metallization 126. Cap layer 116 comprises active region 118, which comprises multiplication region 120 and a portion of diffused-region 122. As used herein and in the appended claims, the term active region refers to a region that encompasses multiplication region 120 and a portion of diffused region 118, wherein the extent of the included portion of the diffused region is bounded laterally by the dashed lines, wherein that lateral extent is defined or determined by the deepest region of the diffusion.

[0039] In a specific example of prior-art GmAPD 100 depicted in FIG. 1, substrate 106 is n.sup. InP. The substrate, which typically has a thickness of about 200 microns, is truncated in FIG. 1. In some other embodiments, InP substrate 106 and InP buffer layer 108 can be n.sup.+ (highly doped).

[0040] Absorption layer 110 is typically a lightly-doped intrinsic layer of indium gallium arsenide (InGaAs) or (InGaAsP) with low band-gap energy. Grading layer 112 is an n-doped indium gallium arsenide phosphide (InGaAsP) layer that smooths the interface between absorption layer 110 and field control layer 114. The field control layer is a moderately n-doped layer of indium phosphide. Field control layer 114 enables a low electric field to be maintained in absorption layer 110, while supporting a high electric field in multiplication region 120.

[0041] Cap layer 116 is an intrinsic layer of indium phosphide. Within cap layer 116 is active region 118, which includes multiplication region 120 and diffused-region 122. Active region 118 is formed by diffusing a high level of p-type dopant into the cap layer to form diffused region 122. The extent of diffused region 122 forms a p-n junction. The undoped portion of active region 118 forms multiplication region 120. Avalanche multiplication occurs substantially in multiplication region 120. In some other prior-art GmAPDs, cap layer 116 is a lightly n-doped layer of indium phosphide and diffused region 122 is heavily doped with a p-type dopant. In yet some further embodiments, cap layer 116 is a lightly p-doped layer of indium phosphide and diffused-region 122 is heavily doped with an n-type dopant.

[0042] As previously noted, most conventional SWIR GmAPD cameras are illuminated from the backside (i.e., through the substrate) as a consequence of assembly and device structure considerations. As a result, all incoming photons must first traverse hundreds of microns of substrate material before reaching the active region of the device. Almost all visible photons are absorbed by the InP substrate.

[0043] FIGS. 2a-d and 3a-d depict two embodiments of the invention. The figures show the formation of an individual GmAPD; it will be appreciated that the processing is typically performed on a 2D array of such GmAPDs. Indeed, one of the benefits of embodiments of the present invention is that they are amenable to wafer-level processing.

[0044] In both embodiments, a wafer-level approach is utilized that maintains a majority of the InP substrate intact through the use of deep-etched via structures. As previously indicated, etching vias, as opposed to removing the entire substrate, enables visible photons to reach the i-InGaAsP (1064 nm absorber) or i-InGasAs (1550 nm absorber) absorption layer while still providing sufficient mechanical support to allow for efficient wafer-level processes such as backside metallization, anti-reflection coating, and die singulation as well as singulated die operations such as hybridization. And regardless of the extended spectral response, the presence of the vias substantially reduces the total crosstalk in an array of GmAPDs.

[0045] Fabrication of the structure 200 depicted in FIG. 2d and structure 300 depicted in FIG. 3d begins with epitaxial growth on InP wafer 106, producing the same active device layers, (see, FIG. 1, absorption layer 110, grading layer 112, charge layer 114, multiplication region 120 and diffused region 122), collected referenced as 228, as in current SWIR sensors fabricated by Princeton Lightwave Incorporated of Cranbury, N.J. For use herein and the appended claims, the phrase active device layers means the absorption layer, grading layer, charge layer, multiplication region and diffused region of an APD or GmAPD. See, FIGS. 2A and 3A.

[0046] In the illustrative embodiment, the substrate is InP. This is an appropriate substrate for an InGaAsP, InGasAs, or InAs absorption layer. If a different absorber is used then a different substrate may be required. For example, if a mercury cadmium telluride (MCT) absorption layer is used, then the substrate will typically be CdTe or CdZnTe. If an InAs absorption layer is used, the substrate will typically be InP or InAs.

[0047] In the structures shown in FIGS. 2A-D, indium bump 230, which is used for joining the ROIC, is centered with respect to active device layers 228. In the structures shown in FIGS. 3A-D, indium bump 230 is laterally offset with respect to active device layer 228. This provides additional mechanical stability during hybridization.

[0048] Referring now to FIGS. 2B and 3B, substrate 106 is reduced (e.g., ground, etc.) to a thickness of about 100 microns and the diameter of each via is defined with photoresist (not depicted) in known fashion. An established deep dry-etch technique, such as, without limitation, deep reactive ion etching (DRIE) is used to etch down approximately 90 microns, forming via 232. Next, an HCl-based wet etch is used to remove the remaining 10 microns of material (buffer layer 108), using absorption layer 110 as an etch stop.

[0049] Referring also to FIG. 6, in the illustrative embodiment, via 232 is centered with respect to the active region of GmAPD. Since there is a slope to the sidewalls of via 232, dependent on the etching technique, via 232 has a minimum diameter D.sub.v.sup.min, which is located at the bottom of the via and a maximum diameter D.sub.v.sup.max, which is located at the top of the via. Minimum diameter D.sub.v.sup.min must be at least as large as diameter D.sub.A of the active region so that light can reach the entire extent of the active area unimpeded. The diameter D.sub.A of the active region is defined by the deepest region of the diffused region. To maintain structural integrity of the final structure (i.e., 200 or 300), maximum diameter D.sub.v.sup.max of via 232 is limited to no more than about three-quarters of the pixel pitch (i.e., the center-to-center distance between adjacent pixels). The table below shows exemplary minimum and maximum via diameter for arrays having different pitches:

TABLE-US-00001 Active Region Diameter Via Diameter Via Diameter <microns> D.sub.v.sup.min D.sub.v.sup.max Pitch Min Max <microns> <microns> 25 4 4 19 10 10 19 50 8 8 38 20 20 38 100 10 10 75 34 34 75

[0050] With reference to FIGS. 2C and 3C, absorption layer 110 is then coated with a suitable electrical passivation layer 234 that is not opaque (but need not be fully transparent) and optionally anti-reflective. The layer 234 can comprise a single layer or multiple layers. In some embodiments, layer 234 comprises silicon dioxide. This results in a via-enhanced GmAPD. For via-enhanced GmAPD 200, via 232 is filled with transparent epoxy 236 forming backfilled via 238. For via-enchanced GmAPD 300, via 232 is not filled with epoxy (or any other material).

[0051] Referring now to FIGS. 2D and 3D, the via-enhanced GmAPD is then hybridized, wherein it is attached to Read Out Integrated Circuit (ROIC) 242. Hybridization is implemented by coupling indium bump 230 to metallized bonding pad 240, which is attached to ROIC 242.

[0052] The vias result in reduced crosstalk, which, through reduction of spurious dark counts, improve imaging capability in all current implementations of GmAPD cameras. In conventional GmAPDs, the photons produced via blackbody radiation and electroluminescence in the multiplication region are frequently detected as false counts by neighboring pixels, as illustrated in FIG. 4a. This figure depicts five pixels 1, 2, 3, 4, and 5, each separated by front side trenches 449. Each pixel comprises active device layers 228. Experimental data shows an inverse relationship with distance from the originating pixel.

[0053] At the current minimum InGaAs/InP pixel pitch of 50 microns, the magnitude of nearest-neighbor crosstalk is acceptable, but shrinking to smaller pitch arrays will increase nearest-neighbor crosstalk frequency. As a consequence, crosstalk stands as a fundamental limitation in scaling to larger camera formats via smaller pitch arrays.

[0054] In the case of etched-via arrays in accordance with the present teachings, individual pixels are effectively optically isolated from one another, as depicted in FIG. 4B. Where before there was an unimpeded path through the substrate to neighboring pixels, photons travelling towards the backside of the substrate now encounter a number of surfaces that will promote reflection or absorption, significantly reducing the number of photons which reach the active regions of neighboring pixels.

[0055] Taking pixel 1 for example, some photons produced in active region 228 can escape along path 444, reflecting off the walls of via 232.sub.1. Some photons produced in active region 228 will reflect, along path 448, at the interface of the substrate and wall 446 of via 232.sub.2. And some photons produced in the active region will simply pass through the substrate and out through the mouth of a via, such as along path 450 out of via 232.sub.3.

[0056] The use of etched backside vias, in accordance with embodiments of the present invention, therefore provides a way to mitigate crosstalk, which is vital in ultimately improving both temporal and spatial image fidelity in Geiger-mode APDs.

[0057] To better quantify the impact of the vias on crosstalk, the optoelectronic response of two distinct device geometries were simulated with ray tracing. To verify the model, the geometry and epitaxial structure of a Princeton Lightwave Inc. commercial-off-the-shelf (COTS) GmAPD camera with known crosstalk performance was first recreated. The model reproduced the experimental crosstalk versus distance plot with a high degree of accuracy. This is depicted in FIG. 5. Plot 552 depicts the experimental data from an actual COTS GmAPD camera and plot 554 depicts the results of the modeling of such a camera.

[0058] This model of the COTS device was then modified to incorporate cylindrical voids, representing the vias, centered around the device active region, starting from the backside of the substrate and stopping at the absorption layer. Plot 558 depicts the results of the via-enhanced model. The benefit of the via structure is clear. That is, as distance from the primary avalanche location increases, the number of photons reaching other active regions (pixels) begins dropping by more than an order of magnitude in comparison with the COTS structure.

[0059] The computational demands of 3D modeling currently limit the simulation to a 55 pixel array, preventing a direct calculation of cumulative crosstalk reduction seen by a full 12832 pixel array, which are the full dimensions of the COTS camera referenced above. However, a comparison between the COTS and via models does reveal an approximate 40% reduction for the 55 array, with the bulk of this reduction occurring beyond a distance of two pixels. Cumulative crosstalk has been experimentally shown to increase substantially as an NN sampling grid is increased even to N=32, with this increase attributed largely to back-side reflections. See, e.g., Itzler et al., IEEE Journal of Selected Topics in Quantum Electronics 20 (10) 3802111, (2014); Piccione et al., Optics Express 24 (10), 10635-10648 (2016).

[0060] The use of vias, in accordance with the present teachings, substantially reduces such back-side reflections. Consequently, the gulf between the total crosstalk exhibited by a COTS camera and structures in accordance with the invention is likely to widen even further as the sample size is increased beyond 55.

[0061] FIG. 7 depicts an embodiment of via-enhanced GmAPD 700 in accordance with an embodiment of the invention wherein via 760 does not extend fully through substrate 106. To the extent that the remaining substrate absorbs visible light, via-enhanced GmAPD 700 will not exhibit the enlarged spectral response possible with via-enhanced GmAPDs 200 and 300. However, as compared to a conventional GmAPD with a fully intact substrate, GmAPD 700 will exhibit reduced crosstalk. The reduction in crosstalk is a function of the depth of via 760. Those skilled in the art will be able to model the reduction in crosstalk as a function of via depth. In some embodiments, via 760 extends between 25% to 50% of the way through substrate 106. In some other embodiments, via 760 extends between 50% to 75% of the way through substrate 106. In some other embodiments, via 760 extends between 75% to 99% of the way through substrate 106.

[0062] Although GmAPD 700 depicts a centered indium bump like GmAPD 200, it is to be understood that partial via 760 can be used in conjunction with an off-center indium bump like GmAPD 300. Furthermore, partial via 760 can be back filled with a visually transparent material, such as epoxy as in GmAPD 200 (FIG. 2C) or remain unfilled like GmAPD 300.

[0063] FIGS. 8A-8C depict some further embodiments in accordance with the present teachings. Like the embodiment depicted in FIG. 7, the vias depicted in these embodiments do not extend fully through the substrate. However, unlike the previous embodiments, the vias do not align with the active region of the APD. Rather, they are offset. Thus, these structures will not exhibit extended spectral response (i.e., the substrate will absorb visible light). They will, however, exhibit substantially reduced crosstalk.

[0064] FIG. 8A depicts a side view of a portion of array 800 of APDs or GmAPDs in accordance with the present teachings. Shown are five pixels 1, 2, 3, 4, and 5, each separated by front side trenches 449. Each pixel comprises active device layers 228. For each pixel, partial via 760 does not align with active device layers 228. In the embodiment pictured, the vias align with front-side trenches 449, each via having an offset O from the center of active device layers 228.

[0065] The vias in array 800 are not intended to deliver light, such as visible light, to the active region (not depicted) of active device layers 228. Consequently, there is no requirement that the minimum diameter of the via be at least as large as the diameter of the active region. Minimum via diameter is a function of the capabilities of the particular technique used to create the vias. The maximum diameter of the via is selected to maintain the structural integrity of the array, as discussed earlier in conjunction with other embodiments of the invention.

[0066] In the embodiment depicted in FIG. 8A, each via 760 aligns with one of front-side trenches 449. However, in some other embodiments, although offset from the active region, via 760 does not align with a front-side trench. The offset, partial vias 760 can be backfilled, such as with transparent epoxy, or can remain unfilled.

[0067] FIGS. 8B and 8C depict plan views of two embodiments 800 and 800 of array 800 of FIG. 8A. In the embodiment depicted in FIG. 8B, offset, partial vias 760 form a continuous network throughout the substrate, whereas in the embodiment depicted in FIG. 8C, offset, partial vias 760 are discontinuous. In comparison to array 800 of FIG. 8C, array 800 exhibits poorer structural integrity but somewhat lower crosstalk. This is because the discontinuous arrangement of the vias in array 800 leaves somewhat more substrate intact.

[0068] It is to be understood that the disclosure teaches just one example of the illustrative embodiment and that many variations of the invention can easily be devised by those skilled in the art after reading this disclosure and that the scope of the present invention is to be determined by the following claims.