Vertical III-nitride thin-film power diode

Abstract

A vertical III-nitride thin-film power diode can hold off high voltages (kV's) when operated under reverse bias. The III-nitride device layers can be grown on a wider bandgap template layer and growth substrate, which can be removed by laser lift-off of the epitaxial device layers grown thereon.

Claims

1. A method for fabricating a vertical III-nitride thin-film power diode, comprising: providing a growth substrate having a bandgap; a growing a template layer on the growth substrate; growing a high-doped n-type AlGaN bottom layer on the template layer, wherein the high-doped n-type AlGaN bottom layer has a smaller bandgap energy than the bandgap energies of the template layer and the growth substrate; growing a low-doped n-type AlGaN drift layer on the high-doped n-type AlGaN bottom layer; growing a top contact on the low-doped n-type AlGaN drift layer; bonding a host substrate to the top contact; and exposing the high-doped n-type AlGaN bottom layer through the growth substrate and the template layer to a light source having energy greater than the bandgap energy of the high-doped n-type AlGaN bottom layer but less than the bandgap energies of the template layer and the growth substrate, thereby causing the high-doped n-type AlGaN bottom layer to heat and separate from the template layer and growth substrate due to a difference in thermal expansion.

2. The method of claim 1, wherein the high-doped n-type AlGaN bottom layer has an Al composition less than 60%.

3. The method of claim 2, wherein the light source comprises a laser having a wavelength of 248 nm or less.

4. The method of claim 1, wherein the high-doped n-type AlGaN bottom layer has an Al composition greater than 60%.

5. The method of claim 4, wherein the light source comprises a laser having a wavelength of 193 nm or less.

6. The method of claim 1, further comprising growing an ohmic contact on the high-doped n-type AlGaN bottom layer that is exposed after separation of the template layer and the growth substrate.

7. The method of claim 6, wherein the ohmic contact comprises Ti or Al.

8. The method of claim 1, wherein the top contact comprises a high-doped p-type III-nitride top layer on the low-doped n-type AlGaN drift layer, an ohmic contact on the high-doped p-type III-nitride top layer, and a dielectric layer outside the ohmic contact.

9. The method of claim 8, wherein the high-doped p-type III-nitride top layer comprises AlGaN or GaN.

10. The method of claim 8, wherein the ohmic contact comprises Ni, Pd, or Pt.

11. The method of claim 8, wherein the dielectric layer comprises SiN, SiO.sub.2, SiON, or Al.sub.2O.sub.3.

12. The method of claim 1, wherein the top contact comprises a Schottky contact on the low-doped n-type AlGaN drift layer and a dielectric layer outside the Schottky contact.

13. The method of claim 12, wherein the Schottky contact comprises Ni, Pd, Pt, Mo, Rh, Au, Ru, or W.

14. The method of claim 12, wherein the dielectric layer comprises SiN, SiO.sub.2, SiON, or Al.sub.2O.sub.3.

15. The method of claim 1, wherein the doping of the low-doped n-type AlGaN drift layer is less than 110.sup.16/cm.sup.3.

16. The method of claim 15, wherein the dopant of the low-doped n-type AlGaN drift layer is Si.

17. The method of claim 1, wherein the thickness of the low-doped n-type AlGaN drift layer is greater than 4 m.

18. The method of claim 1, wherein the growth substrate comprises Al.sub.2O.sub.3 or AlN.

19. The method of claim 1, wherein the template layer comprises AlN or AlGaN.

20. The method of claim 19, where in the template layer has an Al composition greater than the high-doped n-type AlGaN bottom layer.

21. The method of claim 1, wherein the top layer further comprises an edge termination structure.

22. The method of claim 21, wherein the edge termination structure comprises a guard ring or a junction termination extension.

23. The method of claim 1, wherein the host substrate comprises CuW or GaAs.

24. The method of claim 1, wherein the bonding comprises bonding a bond metal to the host substrate and the top contact and melting the bond metal.

25. The method of claim 24, wherein the bond metal comprises two or more metals that form a eutectic.

26. The method of claim 24, wherein the bond metal comprises InPd.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The detailed description will refer to the following drawings, wherein like elements are referred to by like numbers.

(2) FIG. 1 is a schematic illustration of a vertical thin-film power diode.

(3) FIGS. 2(a)-(d) is a schematic illustration of the steps to fabricate an exemplary vertical III-nitride thin-film power diode.

(4) FIG. 3 is a top-view schematic illustration of a trenched device wafer. It consists of larger (in this case 11 mm squares) that match the laser lift-off exposure, and smaller device squares.

(5) FIG. 4(a) is a top-view microscope image of Al.sub.0.3Ga.sub.0.7N layers bonded to a GaAs host substrate with the AlN/sapphire template/growth substrate removed. FIG. 4(b) is a cross-sectional schematic illustration of the vertical thin-film power diode structure shown in FIG. 4(a).

(6) FIG. 5(a) is a cross-sectional schematic illustration of a vertical AlGaN thin-film power diode. FIG. 5(b) is a graph of current vs. voltage characteristic of a power diode.

DETAILED DESCRIPTION OF THE INVENTION

(7) In FIG. 1 is shown a vertical thin-film III-nitride power diode 10 comprising epitaxial III-nitride thin-film layers. The diode structure comprises a low-doped n-type drift layer 11 sandwiched between a top contact 12 and a high-doped n-type bottom layer 13. The top contact 12 can comprise an ohmic contact 14 to a high-doped p-type top layer 15 (as shown) or a Schottky contact (not shown) on the drift layer 11. The structure can further comprise a dielectric layer 17 outside the ohmic contact 14 or Schottky contact to help limit the electric field at the surface of the diode. The diode can further comprise an edge termination structure 16 comprising guard rings or junction termination extensions to avoid edge and surface breakdown. The structure can further comprise a bottom ohmic contact 18 to the high-doped n-type bottom layer 13. A host substrate 21 can be bonded with bond metals 19 and 20 to the top contact 12.

(8) The epitaxial III-nitride device layers 11, 13, and 15 can comprise AlGaN semiconductors. The doping concentration of the intrinsic drift layer 11 can be less than about 110.sup.16/cm.sup.3. For example, the dopant can be Si. The drift layer 11 is preferably greater than about 4 m thick. For example, the high-doped p-type top layer 15 can comprise p-type AlGaN or GaN. For example, the ohmic contact 14 can be Ni, Pd, or Pt. Alternatively, if a p-type top layer is not used, the top contact can be a Schottky contact formed from Ni, Pd, Pt, Mo, Rh, Au, Ru, or W directly on the intrinsic drift layer 11. For example, the dielectric layer 17 can comprise SiN, SiO.sub.2, SiON, or Al.sub.2O.sub.3. For example, the host substrate 21 can comprise CuW or GaAs. For example, the bond metal 19 and 20 can be a bilayer of metals that form a low-melting eutectic, such as InPd. For example, the bottom ohmic contact 18 can comprise Ti or Al.

(9) During operation, the intrinsic drift layer is flooded with charge carriers injected from the highly doped p- and n-layers (i.e., anode and cathode). In forward bias, the diode will conduct current when the injected electrons and holes reach an equilibrium point. Due to this high-level injection, due in turn to the depletion process, the electric field extends deeply into the drift layer. Because of the low doping in the intrinsic drift layer, most of the potential will drop across this region. Under reverse bias, the avalanche breakdown voltage can typically be significantly greater than 1 kilovolt.

(10) FIGS. 2(a)-(d) show the steps to fabricate an exemplary vertical AlGaN thin-film power diode according to the present invention. Only one device is shown in the figure, but numerous devices can be arrayed on a wafer and created in parallel. As shown in FIG. 2(a), the epitaxial layers of the power diode can be grown on a non-conductive substrate or template layer comprising AlN, Al.sub.2O.sub.3, or AlGaN. These growth materials are transparent to the laser energy used in subsequent lift-off steps. Above the template layer and growth substrate (e.g., sapphire) is a high-doped n-type bottom contact layer, followed by a low doped AlGaN drift layer that is preferably greater than about 4 m thick. The drift layer supports a majority of the vertical electric field under reverse bias. The drift layer can be topped by optional p-type AlGaN and GaN layers to complete the diode structure.

(11) Fabrication steps are then performed on the top-side of the device, as shown in FIG. 2(b). If a p-type top layer is used then a p-type ohmic contact (as shown) that is Ni, Pd, or Pt-based can be deposited. If a p-type top layer is not used then a Schottky contact can be formed on the drift layer using high work function metals such as Ni, Pd, Pt, Mo, Rh, Au, Ru, and W. The rest of the p-side processing can comprise creating an edge termination structure (e.g., i-AlGaN) outside of the metal ohmic contact comprising guard ring or junction termination extension structures, trenching the wafer into smaller device areas and larger device areas, covering the uncontacted areas with a dielectric such as SiN or SiO.sub.2, and finally covering the device wafer with a bond metal such as InPd. The device wafer is then bonded to a host substrate (e.g., GaAs) also coated with the bond metal. The device wafer and host wafer are brought into contact and then the temperature is raised to melt the bond metal and attach the host substrate to the device wafer. The host wafer needs to match the coefficient of thermal expansion (CTE) of the device wafer. For example, if a sapphire (Al.sub.2O.sub.3) device substrate is used (as shown), then appropriate host substrates can be CuW or GaAs.

(12) The backside of the wafer is then exposed to a high fluence laser, as shown in FIG. 2(c), in a step and repeat manner with a defined exposure area such as 1 mm1 mm (as shown in FIG. 3). This trenching of the epitaxial device layers prevents these layers from cracking during laser separation from attached adjacent material. If the epitaxial layers have an Al composition of 0-60% then a 248 nm excimer laser can be used for laser separation. If the Al composition is higher >60% then a shorter wavelength, 193 nm excimer laser can be used. Typical laser fluences are 0.5-1.5 J/cm.sup.2. The energy is absorbed in the AlGaN device layers and the fast heating and slight differences in the coefficients of thermal expansion of the layers cause the device layers to separate, or lift-off, from the template layer and growth substrate, as shown in FIG. 2(d). The bond to the host substrate prevents cracks in the device layers.

(13) An example of AlGaN layers separated from the growth substrate and template layers is shown in FIG. 4. The AlGaN structure is trenched and then bonded to a GaAs host using Pd/In as a bonding metal. The wafer is then subject to a 1 J/cm.sup.2 laser exposure at 248 nm through the sapphire growth substrate. The sapphire substrate and AlN template layers are separated from the AlGaN layers by lift-off. After removal of the substrate and template layer, an ohmic contact (e.g., Ti or Al) can be formed on the exposed high-doped n-type bottom layer. This can be accomplished by patterning a metal layer right after laser lift-off, or first preparing the surface by wet chemical, plasma etching, and chemo-mechanical polishing. A schematic illustration of the completed device is shown in FIG. 5(a).

(14) The wide bandgap AlGaN semiconductor material and the vertical device processing enable power diodes that can hold off high voltages under reverse bias. In an ideal diode, the voltage across the end terminals of the diode is zero regardless of the current when forward-biased. Conversely, the leakage current is zero regardless of the voltage when reverse-biased. An example of a current vs voltage characteristic of a high power diode when reverse-biased is shown in FIG. 5(b). Under reverse voltage the avalanche breakdown is >2.5 kV, meaning that this diode can hold of voltages of 2.5 kV or less.

(15) The present invention has been described as a vertical III-nitride thin-film power diode. It will be understood that the above description is merely illustrative of the applications of the principles of the present invention, the scope of which is to be determined by the claims viewed in light of the specification. Other variants and modifications of the invention will be apparent to those of skill in the art.