DV/DT CONTROL IN MOSFET GATE DRIVE
20170070223 ยท 2017-03-09
Inventors
Cpc classification
International classification
Abstract
An electronic switching circuit having a field effect transistor with a source, a drain, and a gate. A capacitor and resistor are connected in series between a gate and the source of the field effect transistor. The input signal to the circuit is connected at the junction between the capacitor and resistor.
Claims
1. An electronic switching circuit comprising: a field effect transistor having a source, a drain and a gate, a capacitor and a resistor connected in series between said gate and said source of said field effect transistor, wherein said circuit receives a signal between said drain and a junction between said capacitor and said resistor.
2. The circuit as defined in claim 1 wherein said transistor comprises a field effect transistor.
3. The circuit as defined in claim 1 wherein the value of said capacitor is selected so that the switching speed of said field effect transistor is reduced.
Description
BRIEF DESCRIPTION OF THE DRAWING
[0020] A better understanding of the present invention will be had upon reference to the following detailed description when read in conjunction with the accompanying drawing, wherein like reference characters refer to like parts, and in which:
[0021]
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE PRESENT INVENTION
[0022] Again using the MOSFET AUIRFS3006 as an example, the 3006 device has a large gate capacitance, small Miller capacitance, and therefore inherently fast switching speeds. Consequently, to reduce the dV/dt by increasing the gate resistor results in large increases in timing delays due to the large Cgs but with a smaller impact on the rise and fall times during switching.
[0023] In order to more actively control the dV/dt, the gate driver plus the MOSFET may be viewed as an inverting Class A linear amplifier with a large voltage gain that is driven into saturation. At saturation it provides a different way to view things like the effect of the Miller capacitance as well as the control of switching speeds.
[0024] As shown in the drawing, a high frequency negative feedback 10 is used to control the switching speed of a MOSFET 12 by reducing the gain of the amplifier at the high frequency.
[0025] As shown in the drawing, the MOSFET 12 and its gate drive 14 essentially form a common source inverting amplifier. Therefore, since phase inversion occurs between the gate and drain, simply feeding a portion of the drain voltage back into the gate will produce the negative feedback. Resistors could be used to provide this feedback if a lower closed loop gain was desired, but, as shown in the drawing, a capacitor 16 coupled between the FET drain and FET gate resistor 18 can be used for the negative feedback and provide a limited response at high frequencies. That, in turn, accomplishes a reduction in the dV/dt as desired.
[0026] The key difference is that the capacitor controls the amount of charge applied to the gate from the gate drive dependent upon how fast the FET is switching, rather than applying a fixed amount of charge. Consequently, by adding negative HF feedback to the FET drivers to control high dV/dt edges does control the FET slew rate without significantly increasing switch timing. As such, the rise and fall time for the FET during switching may be changed, but the switching delay remains largely the same.
[0027] Other types of switching devices which have a gate structure, such as IGBTs, may be used instead of the MOSFETs.
[0028] In practice, the value of the capacitor 16 is selected so that the switching speed of the MOSFET meets or slightly exceeds the fastest switching speeds for the circuit application of the MOSFET. However, by utilizing the capacitor to limit the switching speed for the MOSFET, the previously known circuit ringing and other adverse consequences of uncontrolled switching speeds for the MOSFET are avoided.
[0029] Having described my invention, many modifications thereto will become apparent to those skilled in the art to which it pertains without deviation from the spirit of the invention as defined by the scope of the appended claims.