Gate drive circuit with a voltage stabilizer and a method

Abstract

A gate drive circuit creates a bipolar voltage to a gate of an IGB power transistor, and compensates for Miller currents of the IGB power transistor. The compensating is performed by a switching element connected in series with a capacitor between the gate (X4) and a supply voltage.

Claims

1. A gate drive circuit with an active gate voltage stabilizer, comprising: means for creating a bipolar voltage to a gate of an IGB power transistor; and means for compensating for Miller currents of the IGB power transistor, the means for compensating being formed by a switching element connected in series with a capacitor between the gate and a supply voltage input; wherein a switching voltage of the switching element is controlled by two resistances; and wherein one of the two resistances is connected between a source and gate of the switching element, and is an NTC-resistor.

2. The gate drive circuit according to claim 1, wherein the means for compensating comprises: a ceramic capacitor as the capacitor, and a power MOSFET as the switching element connected in series.

3. The gate drive circuit according to claim 1, wherein the means for compensating is connected between a positive supply voltage and the gate of the IGB transistor.

4. The gate drive circuit according to claim 1, wherein the switching element is a varistor or transient suppressor.

5. A method for controlling an IGB power transistor with a gate drive circuit, which method comprises: creating a bipolar voltage to a gate of the IGB power transistor; compensating for Miller currents of the IGB power transistor with a switching element connected in series with a capacitor between the gate and supply voltage input; and controlling a switching voltage of the switching element by two resistances; wherein one of the two resistances is a resistor connected between a source and gate of the switching element, and is an NTC-resistor.

6. The method according to claim 5, whereby the compensating is performed by a ceramic capacitor as the capacitor, and a power MOSFET as the switching element connected in series.

7. The method according to claim 6, wherein the switching element and capacitor are connected between a positive supply voltage of the supply voltage input and the gate of the IGB transistor.

8. The method according to claim 5, wherein the switching element is a varistor or transient suppressor.

9. The method according to claim 5, wherein the compensating is performed after an actual switching event, when a temperature load of a chip housing the IGB power transistor has started to decrease and the chip is recovering from the switching event.

10. The method according to claim 9, wherein a decreasing edge of a temperature load curve is adjusted such that a decreasing edge of at least a heated portion of the chip decreases faster than a corresponding edge of an unheated cold module.

11. The method according to claim 9, comprising: compensating thermal cycling by changing voltage losses in a conducting state of the IGBT power transistor even though control occurs during a state change of the IGBT power transistor.

12. The gate drive circuit according to claim 2, wherein the means for compensating is connected between a positive supply voltage and the gate of the IGB transistor.

13. The gate drive circuit according to claim 12, wherein the switching element is a varistor or transient suppressor.

14. The method according to claim 5, wherein the compensating is performed after an actual switching event, when a temperature load of a chip housing the IGB power transistor has started to decrease and the chip is recovering from the switching event.

15. The method according to claim 10, comprising: compensating thermal cycling by changing voltage losses in a conducting state of the IGBT power transistor even though control occurs during a state change of the IGBT power transistor.

16. The method according to claim 5, wherein the switching element and capacitor are connected between a positive supply voltage of the supply voltage input and the gate of the IGB transistor.

17. The method according to claim 6, wherein the switching element is a varistor or transient suppressor.

18. The method according to claim 6, wherein the compensating is performed after an actual switching event, when a temperature load of a chip housing the IGB power transistor has started to decrease and the chip is recovering from the switching event.

19. The method according to claim 18, wherein a decreasing edge of a temperature load curve is adjusted such that a decreasing edge of at least a heated portion of the chip decreases faster than a corresponding edge of an unheated cold module.

20. The method according to claim 19, comprising: compensating thermal cycling by changing voltage losses in a conducting state of the IGBT power transistor even though control occurs during a state change of the IGBT power transistor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) For a more complete understanding of particular embodiments of features disclosed herein and their advantages, reference is made to the following exemplary embodiments, taken in conjunction with the accompanying drawings. In the drawings:

(2) FIG. 1 illustrates a schematic view of a gate drive circuit with an active gate voltage stabilizer according to an exemplary known embodiment;

(3) FIG. 2 illustrates a schematic view of a gate drive circuit with an active gate voltage stabilizer according to an exemplary embodiment disclosed herein;

(4) FIG. 3 illustrates an exemplary voltage-time-diagram of the gate voltage with and without features as disclosed herein;

(5) FIG. 4 illustrates an exemplary collector voltage of an IGBT transistor with and without features disclosed herein;

(6) FIG. 5 illustrates an exemplary capacitance of a ceramic condensator as a function of gate-emitter voltage as well as an exemplary off-switching voltage of a power field effect transistor V1;

(7) FIG. 6 illustrates an exemplary voltage loss of a IGB transistor with different gate voltages;

(8) FIG. 7 illustrates a voltage-time-diagram of a gate voltage with and without an exemplary embodiment disclosed herein;

(9) FIG. 8 illustrates a voltage-time-diagram of a gate voltage with and without an exemplary embodiment dislosed herein in a second temperature;

(10) FIG. 9 illustrates a voltage-time-diagram of a gate voltage with and without an exemplary embodiment disclosed herein in a third temperature; and

(11) FIG. 10 illustrates a voltage-time-diagram of a gate voltage with and without an exemplary embodiment disclosed herein in a fourth temperature.

DETAILED DESCRIPTION

(12) The present disclosure describes a system for stabilization of voltage of an IGBT during switching and compensating for Miller currents. The system should, for example, ensure operation without occurrence of a local voltage peak with subsequent voltage oscillation. Exemplary embodiments are useful, for example, for power switching elements.

(13) A gate drive circuit is disclosed with an active gate voltage stabilizer having means for creating a bipolar voltage to a gate of an IGB transistor, and means for compensating for Miller currents of the IGB transistor, whereby the means for compensating are formed by a switching element connected in series with a capacitor between the gate and supply voltage.

(14) In an exemplary embodiment, the means for compensating includes a ceramic capacitor and a power MOSFET connected in series.

(15) In an exemplary embodiment, the switching voltage of the switching element is controlled by resistances.

(16) In an exemplary embodiment, a resistor connected between source and gate of the switching element is a NTC-resistor.

(17) In an exemplary embodiment, the means for compensating are connected between positive supply voltage and gate of the IGB transistor.

(18) Considerable advantages can be achieved by embodiments as disclosed herein. For example, a local voltage peak with subsequent voltage oscillation can be avoided with a system as disclosed herein. Further switching losses and collector voltage change speed can be reduced, while decreasing EMC disturbances.

(19) With exemplary embodiments, a capacitance stabilizing the gate has the greatest capacitance when needed and lowest capacitance other times. Hence coupling delays can be at minimum level both in connection with switching on and switching off phases. Also the change rate of gate voltage may be increased.

(20) Maximum voltage can be further achieved in a smaller time interval.

(21) FIG. 1 is a schematic view of a gate drive circuit 30 with a known gate voltage stabilizer. The terminal 10 represents positive supply voltage, such as +15 V, terminal 11 is a control voltage altering between positive and negative supply voltage, terminal 12 represents voltage that is floating on an IGBT emitter potential and terminal 13 represents a negative supply voltage, such as 15 V. The control voltage 11 can cause either transistor V2 or transistor V3 to enter into a conducting state and therefore gate terminal X4 will be connected to either the positive or negative supply voltage. The Miller current caused by Miller capacitor C4 of the power IGB transistor 40 is compensated by a capacitance C10 connected between terminals X4 and X5. The function of the resistor 31 is to switch off the IGB transistor during a failure operation. Capacitors C1 and C2 are used for stabilizing the operating voltages especially in switching situations. The function of R27 is to compensate a voltage drop of transistors V2 and V3. Due to rather straightforward Miller current compensation by a fixed capacitor C10, this circuit increases switching delays and decreases a voltage slew rate between 10 . . . 15 V and 10 . . . 15 V compared to an active gate voltage stabilizer.

(22) In FIG. 2 a schematic view of a gate drive circuit with an active gate voltage stabilizer according to an exemplary embodiment disclosed herein is illustrated.

(23) In short, the simple capacitance of a known circuit is replaced by a dynamic, active circuit having a capacitor and a switch connected in series between gate terminal and positive supply voltage.

(24) In more detail, the electric circuit itself bears similarity to the known circuit of FIG. 1 but capacitor C10 is replaced by capacitor C3 and a switching transistor V1 connected between positive supply voltage 10 and gate terminal X4. The component V1 is for example, a N-channel power MOSFET connected in series with a ceramic capacitor C3 such that the capacitor C3 is connected between positive supply voltage 10 and the source of V1. The drain of V1 is connected to the gate terminal X4. The gate voltage of V1 is determined by resistors R1 and R2, where R1 is connected between the positive supply voltage 10 and the gate of V1, and R2 is connected between source and gate of V1. The resistor R2 is also referenced in this application as a source-gate resistor. The power MOSFET's internal diode 50 is shown between source and drain terminals. In addition a diode V5 is connected in reverse direction between the positive supply voltage and gate terminal X4 for clamping the gate voltage over the positive supply voltage. In addition a resistor R31 is connected between gate terminal X4 and emitter terminal X5 to switch off the IGB transistor during a failure operation.

(25) The power transistors to be compensated may be IGBT transistors; however, other transistors are also contemplated.

(26) The active gate voltage stabilizer includes for example, an n-channel power MOSFET V1, a ceramic capacitor C3 and two resistances R1, R2.

(27) In FIG. 3 a voltage-time-diagram is shown. The first and the second graphs illustrate measurements of an IGBT gate voltage during switching on with (20) or without the coupling disclosed herein. The effect of the Miller current can be seen in both gate voltages in an IGBT turn-on threshold level which is roughly 9 volts. Nevertheless the gate voltage can be seen to be more stable with inclusion of a active stabilizer circuit.

(28) It is a known fact that capacitance of a ceramic capacitor decreases as a function of terminal voltage (FIG. 5). Therefore, capacitance of capacitor C3 increases in an active gate stabilizer circuit while gate voltage rises, and provides the greatest stability in turn-on threshold voltage and reduces turn-on delay time compared to known stabilizer circuits as shown in FIG. 1.

(29) The FIG. 2 MOSFET V1 disconnects stabilizer capacitor C3 from gate circuitry when the gate voltage exceeds the IGBT turn-on threshold voltage, roughly 11.5V in FIG. 3 and the gate stabilizer is no longer necessary. The disconnection allows the gate voltage to reach its maximum value much faster (FIG. 3 curve 20). The disconnection can be seen as a change of slew rate in the gate voltage in FIG. 3 and it decreases power consumption of the gate driver power supply and reduces IGBT switching losses. However, the greatest value of the stabilizing capacitance C3 remains available during an IGBT turn-on threshold level when it is needed the most.

(30) FIG. 4 illustrates a collector voltage of the IGBT transistor with (21) and without features disclosed herein. The sudden voltage drop and greater Miller-effect can be seen in the curve without the active gate stabilizer. The sudden voltage drop produces greater differential voltage slew rate which can be seen in the output of the AC drive causing bearing current and voltage spikes to the AC motors and electromagnetic emissions.

(31) In FIG. 5 the capacitance of a ceramic capacitor C3 is presented as a function of gate-emitter voltage. The vertical dotted line represents a gate voltage value by which the capacitor C3 is disconnected by MOSFET V1 from the gate circuit X4.

(32) FIG. 6 presents the IGBT voltage loss as a function collector current with different gate voltages to provide an understanding of semiconductor power losses.

(33) Although exemplary embodiments have been described in detail for the purpose of illustration, various changes and modifications can be made within the scope of the claims. In addition, it is to be understood that the present disclosure contemplates that, to the extent possible, one or more features of any embodiment may be combined with one or more features of any other embodiment.

(34) For example, exemplary embodiments may be implemented, instead of with a power field effect transistor, with some other switching component to open and close the circuit quickly. These kind of components include, for example, varistors or different kinds on transient suppressors.

(35) In an exemplary embodiment, resistor R2 is a NTC-resistor or thermistor, in other words a resistive component with a Negative temperature coefficient (NTC). The resistance of NTC-resisitors (or thermistors) decreases when the temperature rises.

(36) In this embodiment R2 has been replaced by a NTC-resistor, which is practically measuring the temperature of the IGB transistor 40.

(37) When the voltage of the IGBT gate X4 decreases, also the voltage of the source of V1 decreases because the parallel diode 50 is conducting, therefore C3 is charging. The gate of V1 gets enough voltage and becomes conductive.

(38) While the voltage of the gate of V1 rises the voltage increase is at the beginning slower due to the fact that C3 is discharged through V1. When the voltage divided by the ratio R1/R2 decreases low enough to switch off V1, C3 will be separated from IGB-transistor 40 and the rise of the voltage of the gate X4 of the IGB-transistor 40 will be more rapid. The voltage level for off-switching of V1 depends on the value of the NTC-resistor such that C3 slows down the rise of the voltage of gate X4 longer when the gate X4 is cold. Then the connection losses of the IGBT 40 increase.

(39) In contrast to known circuits where the control is based on switching frequency, an exemplary method in accordance with the present disclosure does not increase a power peak in the power semiconductor chip (power cycling).

(40) This is due to the fact that that the control happens after the actual switching event, whereby the temperature load of the chip has started to decrease and the chip is recovering from the switching event.

(41) With exemplary embodiments disclosed herein, the decreasing edge of the temperature load curve may be adjusted such that the decreasing edge of a hot module (chip or its part) decreases faster than the corresponding edge of a cold module. The compensating of thermal cycling takes place by changing voltage losses in a conducting state of the IGBT 40 even though the control happens during the state change of the IGBT 40.

(42) FIGS. 7-10 show IGBT 40 voltage curves 60 in different temperatures with an exemplary circuit as disclosed herein. Reference curves 70 are without the circuit.

(43) With this embodiment, the life time of the IGT transistors may be increased due to decreased temperature load and variation.

(44) It will be appreciated by those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The presently disclosed embodiments are therefore considered in all respects to be illustrative and not restricted. The scope of the invention is indicated by the appended claims rather than the foregoing description and all changes that come within the meaning and range and equivalence thereof are intended to be embraced therein.

LIST OF REFERENCE NUMBERS

(45) C1 capacitor C3 ceramic capacitor C6 capacitor V1 MOSFET V2 transistor V3 transistor R1 resistor R2 source-gate resistor, in one embodiment NTC-resistor R27 resistor R31 resistor X4 gate terminal X5 emitter terminal 10 positive supply voltage 11 control voltage 12 ground voltage 13 negative supply voltage 20 graph in accordance with the invention 21 graph in accordance with the invention 30 gate driver 40 IGB transistor 50 parallel diode of V1 60 curve in accordance with the invention 70 curve without the invention