SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Abstract

A semiconductor device includes an aluminum (Al) pad on a substrate, a wire bonded onto the Al pad, a cobalt (Co) layer between and directly contacting the Al pad and the wire, and a CoPd alloy on the Al pad and divide the Co layer into a first portion, a second portion, and a third portion. Preferably, the wire includes a copper (Cu) wire and a palladium (Pd) layer coated on the Cu wire.

Claims

1. A semiconductor device, comprising: an aluminum (Al) pad on a substrate; a wire bonded onto the Al pad, wherein the wire comprises a copper (Cu) wire and a palladium (Pd) layer coated on the Cu wire; a cobalt (Co) layer between and directly contacting the Al pad and the wire; and a CoPd alloy on the Al pad and divide the Co layer into a first portion, a second portion, and a third portion.

2. The semiconductor device of claim 1, further comprising: a passivation layer on the substrate, wherein the passivation layer comprises an opening exposing the Al pad.

3. The semiconductor device of claim 1, wherein the CoPd alloy surrounds the second portion.

4. The semiconductor device of claim 1, wherein the CoPd Pd alloy comprises: a first CoPd alloy between the first portion and the second portion; and a second CoPd alloy between the second portion and the third portion.

5. The semiconductor device of claim 4, wherein top surfaces of the first CoPd alloy and the first portion are coplanar.

6. The semiconductor device of claim 4, wherein top surfaces of the first CoPd alloy and the second portion are coplanar.

7. The semiconductor device of claim 4, wherein top surfaces of the second CoPd alloy and the second portion are coplanar.

8. The semiconductor device of claim 4, wherein top surfaces of the first CoPd alloy and the third portion are coplanar.

9. The semiconductor device of claim 1, wherein top surfaces of the Co layer and the CoPd alloy are coplanar.

10. The semiconductor device of claim 1, further comprising: an inter-metal dielectric (IMD) layer on the substrate; a metal interconnection in the IMD layer; and the Al pad on the metal interconnection.

11. The semiconductor device of claim 1, wherein a width of the first portion is less than a width of the second portion.

12. The semiconductor device of claim 1, wherein a width of the third portion is less than a width of the second portion.

13. The semiconductor device of claim 1, wherein a sidewall of the Cu wire is aligned with a sidewall of the second portion.

14. The semiconductor device of claim 1, wherein a width of a bottom surface of the Cu wire is equal to a width of the second portion.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIGS. 1-3 illustrate a wire bonding process according to an embodiment of the present invention.

DETAILED DESCRIPTION

[0009] Referring to FIGS. 1-3, FIGS. 1-3 illustrate a method for fabricating a semiconductor device, or more specifically a wire bonding process according to an embodiment of the present invention. As shown in FIG. 1, a substrate 12 such as a semiconductor substrate made from silicon, silicon carbide, or aluminum oxide (or also referred to as sapphire) is provided, in which the substrate 12 could be a single-layered substrate, a multi-layered substrate, gradient substrate, or combination thereof. According to other embodiment of the present invention, the substrate 12 could also include a silicon-on-insulator (SOI) substrate.

[0010] Devices such as metal-oxide semiconductor (MOS) transistors, oxide-semiconductor field-effect-transistors (OS FETs), CMOS transistors, FinFETs, or other active devices could be formed on the substrate 12. At least a dielectric layer such as an inter-layer dielectric (ILD) layer 14 and an inter-metal dielectric (IMD) layer 16 could be formed on the substrate 12 to cover the active devices, in which metal interconnections 18 could be formed within the IMD layer 16 to electrically connect to the active devices on the substrate 12.

[0011] Next, a contact pad or more specifically an aluminum (Al) pad 20 is formed on the IMD layer 16. Preferably, the formation of the Al pad 20 could be accomplished by first depositing a metal layer made of Al on the surface of the IMD layer 16, and a photo-etching process is conducted to remove part of the metal layer for forming the Al pad 20. Next, a passivation layer 22 is formed on the IMD layer 16 to cover the Al pad 20, and another photo-etching process is conducted to remove part of the passivation layer 22 for forming an opening 24 exposing the surface of the Al pad 20. According to an embodiment of the present invention, the passivation layer 22 can be made with silicon nitride (SiN), silicon dioxide (SiO.sub.2), silicon oxynitride (SiON), polyimide, benzocyclobutene (BCB), lead oxide (PBO), or other insulating material. Next, a cobalt (Co) layer 26 is formed in the opening 24 and onto the surface of the Al pad 20.

[0012] In addition to the aforementioned approach of first forming the Al pad 20, forming the passivation layer 20 on the Al pad 20, patterning the passivation layer 20 to expose the Al pad 20, and then forming the Co layer 26 on the Al pad 20, according to an embodiment of the present it would also be desirable to first form a metal layer made of Al on the IMD layer 16, form a Co layer on the Al layer, conduct a photo-etching process to pattern the Co layer and Al layer at the same time to form the Al pad 20 and patterned Co layer 26 on the Al pad 20, form a passivation layer 22 on the IMD layer 16 and the Co layer 26, and then conduct another photo-etching process to remove part of the passivation layer 22 for forming an opening 24 exposing the Co layer 26, which is also within the scope of the present invention.

[0013] Next, as shown in FIG. 2, a wire bonding process is conducted to form a wire 28 onto the cobalt layer 26. Preferably, the wire bonding process could be accomplished by first coating a palladium (Pd) layer 32 onto the surface of a copper (Cu) wire 30 and then bonding the wire 30 made of the two elements 30, 32 onto the top surface of the cobalt layer 26. Specifically, the coating of the palladium layer 32 is effective in preventing copper oxidation during the bonding process. It should be noted that the area or width of the bottom surface of the wire 28 is substantially less than the area or width of the top surface of the cobalt layer 26 so that after the wire 28 is bonded onto the surface of the cobalt layer 26, there is substantial space or gap between the sidewall of the passivation layer 22 and the outer palladium layer 32 coating.

[0014] Next, as shown in FIG. 3, a thermal treatment process 50 is conducted by using thermal budget to transform the interface between the cobalt layer 26 and the palladium layer 32 coating into a CoPd alloy 34 on the Al pad 20. Specifically, the thermal treatment process 50 is conducted at a temperature between 250 C. to 350 C. so that the portion of the cobalt layer 26 directly contacting the palladium layer 32 of the wire would react to form a CoPd alloy 34.

[0015] Preferably, the CoPd alloy 34 would form a protective ring or corrosion barrier around the copper portion of the wire 28 if viewed under a top view perspective. Since there is good wettability between the cobalt and copper interface, the copper wire 30 portion of the wire 28 would not react with the cobalt layer 26 hence the portion of the copper wire 30 directly contacting the cobalt layer 26 would not react to form alloy. Moreover as the copper wire 30 portion of the wire 28 is enclosed by the CoPd alloy 34 ring so that the copper wire 30 does not contact the Al pad 26 underneath directly, no high resistance CuAl intermetallic compound would be formed in the center area of the Al pad 26 and issues such as galvanic corrosion and bonding failure could be prevented effectively.

[0016] Referring again to FIG. 3, the CoPd alloy 34 ring formed through the aforementioned process also divides the cobalt layer 26 into a first portion 36, a second portion 38, and a third portion 40 if viewed from a cross-section perspective and the CoPd alloy 34 ring itself could further include a first CoPd alloy 42 between the first portion 36 and the second portion 38 and a second CoPd alloy 44 between the second portion 38 and the third portion 40 or if viewed from another perspective the CoPd alloy 34 is disposed to surround the second portion 38.

[0017] Overall, the present invention provides an approach of first forming a cobalt layer on an Al pad, bonding a wire made of copper wire with palladium layer coating onto the surface of the cobalt layer, and then performing a thermal treatment process to form a CoPd alloy on the Al pad. Preferably, the high potential CoPd alloy formed on the Al pad and under the wire could serve as a protective seal ring or corrosion and oxidation barrier to prevent formation of high resistance CuAl intermetallic compound in the center area of the Al pad and issues such as galvanic corrosion and bonding failure.

[0018] Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.