Low resistivity wafer and method of manufacturing thereof

Abstract

A semiconductor wafer including a single crystal doped with a dopant, wherein a resistivity of the wafer is 0.7 mΩ-cm or less, and wherein a striation height of the wafer is 6 mm or more. The resistivity of the wafer may be 0.8 mΩ-cm or less, and the striation height may be 13 mm or more. The resistivity of the wafer may be 0.7 mΩ-cm or less, and the striation may be 22 mm or more. Example features relate to a method of making a semiconductor wafer that includes adding a dopant to a silicon melt, rotationally pulling a crystal from the silicon melt, and applying a magnetic field of 3000 G or more such that the semiconductor wafer has a resistivity that is equal to or less than 0.8 mΩ-cm and a striation height that is equal to or more than 13 mm.

Claims

1. A method of making a semiconductor wafer, the method comprising: adding a dopant to a silicon melt; rotationally pulling a crystal from the silicon melt; and applying a magnetic field equal to or more than 3000 G to the silicon melt such that the semiconductor wafer cut from the crystal has a resistivity that is equal to or less than 0.8 mΩ-cm and a striation height that is equal to or more than 13 mm.

2. The method of claim 1, wherein the semiconductor wafer has a diameter of about 300 mm.

3. The method of claim 1, wherein in the dopant comprises phosphorous.

4. The method of claim 1, further comprising applying pressure to the silicon melt to suppress evaporation of the dopant.

5. The method of claim 4, wherein the applying pressure comprises supplying an argon gas to the silicon melt.

6. The method of claim 5, further comprising supplying argon at a flow rate to suppress evaporation of the dopant.

7. The method of claim 1, further comprising applying pressure to the silicon melt to decrease the resistivity of the semiconductor wafer.

8. The method of claim 7, wherein the applying pressure comprises supplying an argon gas to the silicon melt.

9. The method of claim 8, further comprising supplying argon at a flow rate to decrease the resistivity of the semiconductor wafer.

10. The method of claim 1, wherein the resistivity is equal to or less than 0.7 mΩ-cm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Example features of the present disclosure are further described in the detailed description which follows, in reference to the noted plurality of drawings by way of non-limiting example features of the present disclosure, in which like reference numerals represent similar parts throughout the several views of the drawings, and wherein:

(2) FIG. 1 is a schematic cross-sectional view illustrating a relationship between the resistivity of a wafer and the dopant concentration of the wafer, according to example features of the present disclosure;

(3) FIG. 2 is a photo of the cross-sectional view of a single crystal ingot that shows formation of abnormal growth;

(4) FIGS. 3A-3F illustrate a relationship between striation height and minimum achievable resistivity before abnormal growth occurs according to example features of the present disclosure;

(5) FIGS. 4A and 4B illustrate effectiveness for lowering resistivity in wafers between two dopants;

(6) FIGS. 5A and 5B show striation heights for 200 mm and 300 mm wafers, respectively, according to example features of the present disclosure;

(7) FIG. 6 illustrates a method of measuring striation height in a cross-sectional view of a silicon wafer according to example features of the current disclosure;

(8) FIGS. 7A and 7B illustrate the formation of positive and negative striation heights, respectively, according to example features;

(9) FIGS. 8A and 8B illustrate a relationship between the magnetic field applied during a manufacturing process of a silicon single-crystal wafer and the resulting striation height according to example features;

(10) FIGS. 9A-9C illustrate the effect of the pull speed of silicon ingots on the amount of dopant concentration allowable before abnormal growth occurs for various striation heights; and

(11) FIGS. 10A-10C illustrate the effect of the pull speed of silicon ingots on lowering resistivity of wafers before abnormal growth occurs for various striation heights.

(12) FIG. 11 depicts a crystal pulling apparatus with Gas Supply Intake and Pressure-control Valve.

(13) FIG. 12A is a graph showing the relationship between wafer resistivity and gas flow rate.

(14) FIG. 12B is a graph showing the relationship between wafer resistivity and gas pressure.

DETAILED DESCRIPTION OF THE DISCLOSURE

(15) The particulars shown herein are by way of example and for purposes of illustrative discussion of example features of the present disclosure only and are presented to illustrate what is believed to be the most useful and readily understood description of the principles and conceptual aspects of the example features. In this regard, no attempt is made to show structural details of the example features in more detail than is necessary for the fundamental understanding thereof, the description taken with the drawings making apparent to those skilled in the art how the forms of the example features may be embodied in practice.

(16) When the terms “about” or “substantially” are used in this specification in connection with a numerical value, it is intended that the associated numerical value include a tolerance of ±10% around the stated numerical value. Moreover, when reference is made to percentages in this specification, it is intended that those percentages are based on weight, i.e., weight percentages. The expression “up to” includes amounts of zero to the expressed upper limit and all values therebetween. When ranges are specified, the range includes all values therebetween such as increments of 0.1%. Moreover, when the words “generally” and “substantially” are used in connection with geometric shapes, it is intended that precision of the geometric shape is not required but that latitude for the shape is within the scope of the disclosure. Although the tubular elements of the features may be cylindrical, other tubular cross-sectional forms are contemplated, such as square, rectangular, oval, triangular, and others.

(17) In the drawing figures, the dimensions of layers and regions may be exaggerated for clarity of illustration. Like reference numerals refer to like elements throughout. The same reference numbers indicate the same components throughout the specification. Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the example term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

(18) Example features are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized features (and intermediate structures) of example features. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example features should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a material and are not intended to limit the scope of example features.

(19) In example features, a method of forming a silicon single crystal includes pulling silicon from a silicon melt to form an ingot. During the pulling process, striation forms at the melt-crystal interface, and, therefore, along the cross-section of the silicon ingot, the striation having a height. A relationship may exist between the striation height and any abnormal growth of the silicon ingot, and between striation height and resistivity of the resulting wafer. In particular, increasing striation height allows for adding more dopant concentration in the silicon melt, and, thereby, to help lower resistivity of the crystal and wafers therefrom.

(20) FIGS. 3A-3F illustrate a relationship between striation height and resistivity of silicon wafers for different dopants according to example features of the present disclosure. FIGS. 3A-3C illustrate that arsenic (As) wafers of three different diameters: 150 mm, 200 mm, and 300 mm, all exhibit improved margins for lowering resistivity (without forming abnormal growth) with increasing striation heights. FIG. 3A shows that, for the 300 mm As wafer, a resistivity as low as 1.6 mΩ-cm may be obtained without forming abnormal growth at striation of height of 13 mm according to the present invention. It further shows that resistivity lower than 1.6 mΩ-cm may be possible by further increasing the striation height according to the present invention. Similarly, FIG. 3B shows that, for the 200 mm As wafer, a resistivity as low as 1.4 mΩ-cm may be obtained at striation height of 5 mm. It further shows that resistivity lower than 1.4 mΩ-cm may be obtained by further increasing striation height according to the present invention. Lastly, FIG. 3C shows that, for the 150 mm As wafer, a resistivity as low as 1.4 mΩ-cm may be obtained at striation height of about −1 mm. Again, for all three wafers, lower resistivities are possible without causing abnormal growth by increasing striation heights.

(21) The linearly regressed relationship between the resistivity, expressed as the “Y” axis, and the striation height, expressed as the “X” axis, for each wafer size of the As-doped wafer, is expressed below.

(22) For 300 mm As-doped wafer: y=2.886×10.sup.−6×.sup.3+3.319×10.sup.−4×.sup.2−4.192×10.sup.−2×+2.082.

(23) For 200 mm As-doped wafer: y=−5.514×10.sup.−6×.sup.3+3.872×10.sup.−4×.sup.2−2.216×10.sup.−2×+1.500.

(24) For 150 mm As-doped wafer: y=−3.884×10.sup.−6×.sup.3+2.592×10.sup.−4×.sup.2−1.743×10.sup.−2×+1.389.

(25) FIGS. 3D-3F illustrate that phosphorous (P) wafers of three different diameters: 150 mm, 200 mm, and 300 mm, all exhibit improved margins for lowering resistivity (without forming abnormal growth) with increasing striation heights. FIG. 3D shows that, for the 300 mm P wafer, a resistivity as low as 0.8 mil-cm may be obtained without forming abnormal growth at striation of height of 13 mm according to the present invention. It further shows that resistivity lower than 0.8 mil-cm may be possible by further increasing the striation height according to the present invention. Similarly, FIG. 3E shows that, for the 200 mm P wafer, a resistivity as low as 0.6 mΩ-cm may be obtained at the striation height of 16 mm. It further shows that resistivity lower than 0.6 mil-cm may be possible by further increasing the striation height according to the present invention. Lastly, FIG. 3F shows that, for the 150 mm P wafer, a resistivity as low as 0.6 mil-cm may be obtained at striation height of about 13 mm. Again, for all three wafers, lower resistivities are possible without causing abnormal growth by increasing striation heights.

(26) The linearly regressed relationship between the resistivity, expressed as the “Y” axis, and the striation height, expressed as the “X” axis, for each wafer size of the P-doped wafer, is expressed below.

(27) For 300 mm P-doped wafer: y=−1.556×10.sup.−6×.sup.3+1.439×10.sup.−4×.sup.2−1.469×10.sup.−2×+9.700×10.sup.−1.

(28) For 200 mm P-doped wafer: y=−1.588×10.sup.−6×.sup.3+1.331×10.sup.−4×.sup.2−1.195×10.sup.−2×+7.649×10.sup.−1.

(29) For 150 mm P-doped wafer: y=−1.478×10.sup.−6×.sup.3+7.824×10.sup.−5×.sup.2−9.744×10.sup.−3×+7.176×10.sup.−1.

(30) The following Table 2 provides numerical evidence of achievable minimum resistivities within the range of striation height for various types of wafers (with fixed dopant concentration).

(31) TABLE-US-00002 TABLE 2 Striation Striation height height Dopant Resistivity (mm) (mm) type Size (mΩ cm) ※Minimum ※Maximum Arsenic 300 mm 2.3 −5 35 2 2 35 1.6 13 35 200 mm 1.6 −4 30 1.5 0 30 1.4 5 30 150 mm 1.6 −10 25 1.5 −5 25 1.4 −1 25 Phosphorous 300 mm 1 −2 35 0.9 5 35 0.8 13 35 200 mm 0.9 −10 30 0.8 −3 30 0.7 6 30 0.6 16 30 150 mm 0.9 −16 25 0.8 −8 25 0.7 2 25 0.6 13 25

(32) FIGS. 5A and 5B illustrate the measurement of striation heights for 200 mm and 300 mm wafers according to example features of the present disclosure. Both wafers were doped with phosphorous. FIG. 5A shows that a resistivity of about 0.6 mil-cm may be obtained for the 200 mm wafer at a striation height of 18 mm. FIG. 5B shows that a resistivity of 0.8 mil-cm may be obtained for the 300 mm wafer at a striation height of 25 mm. These figures show under the use of the same dopants, that achieving low resistivity appears more difficult for the larger 300 mm wafer than the smaller 200 mm wafer, even with a larger striation height.

(33) FIG. 6 is a graph illustrating a method of measuring striation height on a silicon wafer, according to example features of the current disclosure. In FIG. 6, the striation is measured by first cleaving the wafer and etching the cross section with a combination of, e.g., HF, CrO.sub.3 and H.sub.2O. After etching, photographs of the etched cross-section are taken via, e.g., an optical microscope. Based on the photographs, the striation angle is measured at various intervals, i.e., at 10 mm intervals. The measured striation angle is plotted on a curve where the X-axis represents distance from the edge of the wafer towards the center of the wafer. The resulting curve, as illustrated in FIG. 6, represents the shape and the height of the striation.

(34) FIGS. 7A and 7B illustrate formation of positive and negative striation heights during the manufacturing process of single-crystal ingots, according to example features. The striation height is illustrative of the height of the solid-liquid interface when the silicon crystal ingot is pulled up from the silicon melt. As shown in FIG. 7A, when the striation height is positive, meaning when the solid-liquid interface is higher than the surface of the silicon melt, the solid-liquid interface is convex. As shown in FIG. 7B, when the striation height is negative, meaning when the solid-liquid interface is lower than the surface of the silicon melt, the solid-liquid interface is concave.

(35) FIGS. 8A and 8B are graphs illustrating a relationship between the magnetic field applied during a manufacturing process of a silicon single crystal wafer and the resulting striation height, according to example features. The single crystal wafer illustrated in FIG. 8A has a size of 300 mm, and the single crystal wafer illustrated in FIG. 8B has a size of 200 mm. The graphs illustrated in FIGS. 8A and 8B show the relationship between the striation height and a magnetic field applied during the pulling process. Among other factors, these figures show that, for both 300 and 200 mm wafers, increasing the magnetic fields increases the striation heights. FIGS. 8A and 8B show how magnetic tend to affect the striation height but were not intended to show lower or upper limits of striation heights in any way. Factors other than magnetic field such as the rotation speeds of the crucible containing the silicon melt, crystal pulling speeds, and dopant concentration amount may further contribute to the varying heights of striation.

(36) FIGS. 9A-9C and 10A-10C illustrate the effects of the pull speed of the silicon ingot on the dopant concentration and resistivity of wafers, respectively, according to example features. FIGS. 9A-9C and 10A-10C include experiments using wafers of three representative striation heights, 24 mm, 0 mm, and −20 mm. FIGS. 9A-9C show that slower pull speeds afford higher dopant concentration (and therefore lower resistivity) without forming abnormal growth for each of the three striation heights. FIGS. 10A-10C confirm the findings in FIGS. 9A-9C as lowering the pull speeds lowers resistivity for all three striation heights. FIGS. 9A-9C further show that larger striation heights tend to allow higher dopant concentration (therefore lower resistivity) in a wafer at a given pull speed before abnormal growth occurs. Again, FIGS. 10A-10C confirm this as the largest striation case, at 24 mm, demonstrates the lowest resistivity across the range of pull speeds taken in this experiment.

(37) FIG. 11 depicts a crystal pulling apparatus with Gas Supply Intake and Pressure-control Valve. FIGS. 12A and 12B are graphs showing the relationship between resistivity and gas flow rate and gas pressure, respectively. Example features of the present invention include a method of manufacturing a semiconductor wafer, wherein the dopant added to the silicon melt is phosphorus. Example features further include a method of manufacturing a semiconductor wafer that includes applying pressure to the silicon melt (hereinafter “grower pressure”) in order to reduce or suppress evaporation of the dopant. In example features, the grower pressure is applied via the application of a gas, such as, e.g., argon. In FIG. 11, the grower pressure can be modulated by controlling the rate of gas flow from the gas supply intake (A). The flow rate may also be controlled from the pressure control valve (B) which releases the gas using a pressure-control valve such as, e.g., butterfly valve. Example features include a method of manufacturing a semiconductor wafer, wherein the resistivity of the wafer is equal to or less than 0.7 mΩ-cm. Suppressing dopant evaporation contributes to lowering wafer resistivity. For example, FIG. 12B shows that increasing pressure (with fixed flow rate at 80 liter/min) from 17 kilopascal (kPa) to 27 kPa reduces the wafer resistivity by about 0.19 mΩ-cm (about 17%). In FIG. 12A, it shows that decreasing the gas flow rate (with fixed gas pressure at 17 kPa) from 80 liter/min to 40 liter/min reduces the wafer resistivity by about 0.08 mΩ-cm (about 7%).

(38) It is noted that the foregoing examples have been provided merely for the purpose of explanation and are in no way to be construed as limiting of the present disclosure. While the present disclosure has been described with reference to exemplary features, it is understood that the words which have been used herein are words of description and illustration, rather than words of limitation. Changes may be made, within the purview of the appended claims, as presently stated and as amended, without departing from the scope and spirit of the present disclosure in its aspects. Although the example features have been described herein with reference to particular structures, materials and features, the example features are not intended to be limited to the particulars disclosed herein; rather, the example features extend to all functionally equivalent structures, methods and uses, such as are within the scope of the appended claims.

(39) The present disclosure is not limited to the above described features, and various variations and modifications may be possible without departing from the scope of the present disclosure.