Controller for an electronically controlled resistor

Abstract

A controller for an electronically controlled resistor, comprising a controllable current generator that outputs an output current; an amplifier receiving an input voltage proportional to the output current, and outputting an amplified input voltage to a first input of an adder; a voltage divider connected between a high-potential terminal and a low-potential terminal of the electronically controlled resistor; a buffer stage receiving an output of an external sense resistor, and outputting a buffered voltage to a controllable current generator to control the output current and to a second input of the adder, wherein the adder outputs a summed voltage; and an operational amplifier receiving the divided voltage and the summed voltage and outputting a control voltage to an external active element, wherein the active element and the sense resistor are connected in series between the high-potential terminal and the low-potential terminal of the electronically controlled resistor.

Claims

1-24. (canceled)

25. A controller 220 for an electronically controlled resistor (ECR) 222, comprising: a first operational amplifier 208, a reference resistor R.sub.ref, a constant voltage source 214, a bias resistor Rbias, an adder 206, a controllable current generator 212, a first terminal 1 of said controller 220 for connecting to a first terminal of an external variable control resistor R.sub.c, a second terminal 2 of said controller 220 for receiving a feedback signal from a common node of an external sense resistor R.sub.sense and an external active element 224, a third terminal 3 of said controller 220 for connecting to a control terminal of the external active element 224, a fourth terminal 4 of said controller 220 for connecting to a second terminal of the external variable control resistor R.sub.c, a fifth terminal 5 of said controller 220 for connecting to a low-potential terminal 12 of the ECR 222, a sixth terminal 6 of said controller 220 for connecting to a high-potential terminal 10 of the ECR 222, the fourth terminal 4 and the fifth terminal 5 of the controller 220 being connected to each other, an output of the first operational amplifier 208 being connected to the third terminal 3 of said controller 220, a first terminal of the reference resistor Rref being connected to a non-inverting input of the first operational amplifier 208 and a second terminal of the reference resistor Rref being connected to the fifth terminal 5 of said controller 220, a first terminal of the bias resistor Rbias, being connected to the sixth terminal 6 of said controller 220 a second terminal of the bias resistor Rbias, being connected to the non-inverting input of the first operational amplifier 208, a first input of the adder 206 being connected to the first terminal 1 of said controller 220, a second input of the adder 206 being connected to the second terminal 2 of said controller 220, an output of the adder 206 beings connected to an inverting input of the first operational amplifier 208, the controllable current generator 212 comprising a second operational amplifier 302, a third operational amplifier 303, a first transistor 311, a second transistor 312, a first resistor Rcg1, a second resistor Rcg2, and a third resistor Rcg3, a control input 24 of the controllable current generator 212 being connected to the second 2 terminal of the controller 220 and to a non-inverting input of the second operational amplifier 302, an inverting input of the second operational amplifier 302 being connected to a common node of the first transistor 311 and the first resistor Rcg1 connected in series, an output of the second operational amplifier 302 being connected to a gate of the first transistor 311, an output 26 of the controllable current generator 212 being connected to the first terminal 1 of said controller 220, to the inverting input of the first operational amplifier 208 and to the second transistor 312, an output of the third operational amplifier 303 being connected to a gate of the second transistor 312, a non-inverting input of the third operational amplifier 303 being connected to a common node of the first transistor 311 and the second resistor Rcg2 connected in series, an inverting input of the third operational amplifier 303 being connected to a common node of the second transistor 312 and the third resistor Rcg3 connected in series, a common node of the second Rcg2 and third Rcg3 resistors being connected to a terminal 22 of the controllable current generator 212 for connecting to the constant voltage source 214 to power the controllable current generator.

26. The controller 220 of claim 25, further comprising a buffer stage 210 connected between the second terminal 2 of said controller 220 and an input 24 of the controllable current generator 212, an output of the buffer stage 210 being also connected to the first input of the adder 206.

27. The controller 220 of claim 25, further comprising an amplifier 204 connected between the first terminal 1 of said controller 220 and the second input of the adder 206.

28. An electronically controlled resistor (ECR) 222 for use with a variable control resistor R.sub.c, the ECR comprising: a high-potential terminal 10, an active element 224, a sense resistor R.sub.sense, a low-potential terminal 12, and a controller 220 according to claim 25, the high-potential terminal 10, the active element 224, the sense resistor R.sub.sense, and the low-potential terminal 12 being connected in series, the high-potential terminal 10 being connected to a sixth terminal 6 of the controller 220, the low-potential terminal 12 being connected to a fifth terminal 5 of the controller 220, a control terminal of the active element 224 being connected to a third terminal 3 of the controller 220, a common node of the sense resistor R.sub.sense and the active element 224 being connected to a second terminal 2 of the controller 220, a first terminal 1 of the controller 220 being designed for connecting to a first terminal of the external variable control resistor R.sub.c, and a fourth terminal 4 of the controller 220 being designed for connecting to a second terminal of the external variable control resistor R.sub.c.

29. The ECR 222 of claim 28, wherein the active element 224 is a transistor.

30. An integrated circuit (IC) for a controller 220 for an ECR 222, the IC comprising: a first operational amplifier 208, a reference resistor R.sub.ref, a bias resistor Rbias, a first terminal 1 designed for connecting to a first terminal of an external variable control resistor R.sub.c, a second terminal 2 designed for receiving a feedback signal from a common node of an external sense resistor R.sub.sense and an external active element 224, a third terminal 3 designed for connecting to a control terminal of the external active element 224, a fourth terminal 4 designed for connecting to a second terminal of the external variable control resistor R.sub.c, a fifth terminal 5 designed for connecting to a low-potential terminal 12 of the ECR 222, a sixth terminal 6 designed for connecting to a high-potential terminal 10 of the ECR 222, and a controllable current generator 212, the controllable current generator 212 comprising a second operational amplifier 302, a third operational amplifier 303, a first transistor 311, a second transistor 312, a first resistor Rcg1, a second resistor Rcg2, and a third resistor Rcg3, a control input 24 of the controllable current generator 212 being designed for connecting to the second terminal 2 and to a non-inverting input of the second operational amplifier 302, an inverting input of the second operational amplifier 302 being connected to a common node of the first transistor 311 and the first resistor Rcg1 connected in series, an output of the second operational amplifier 302 being connected to a gate of the first transistor 311, an output 26 of the controllable current generator 212 being designed for connecting to the first terminal 1, to the inverting input of the first operational amplifier 208 and to the second transistor 312, the output of the third operational amplifier 303 is connected to the gate of the second transistor 312, a non-inverting input of the third operational amplifier 303 being connected to a common node of the first transistor 311 and the second resistor Rcg2 connected in series, an inverting input of the third operational amplifier 303 beings connected to a common node of the second transistor 312 and the third resistor Rcg3 connected in series, the output of the first operational amplifier 208 being connected to the third terminal 3, a first terminal of the reference resistor Rref being connected to the non-inverting input of the first operational amplifier 208, a second terminal of the reference resistor Rref being connected to the fifth terminal 5, a first terminal of the bias resistor Rbias being connected to the sixth terminal 6, a second terminal of the bias resistor Rbias being connected to the non-inverting input of the first operational amplifier 208, and the fourth terminal 4 and the fifth terminal 5 being connected with each other.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0096] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in, and constitute a part of, this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. In the drawings:

[0097] FIG. 1 illustrates a conventional controller (Prior art).

[0098] FIG. 2 illustrates an exemplary embodiment of the controller of an ECR, controlled by a changing voltage of a variable control resistor, e.g., a mechanical potentiometer, a photoresistor, a thermistor, a digital potentiometer, etc.

[0099] FIG. 3 illustrates an exemplary embodiment of the controllable current generator that may be used in the controller.

[0100] FIG. 4 illustrates experimental results of prototyping the controller.

DETAILED DESCRIPTION OF THE INVENTION

[0101] Reference will now be made in detail to the implementation features of the present invention illustrated in the accompanying drawings.

[0102] In order to achieve the technical result stated above, the proposed controller includes (see FIG. 2, which illustrates an exemplary embodiment of the controller 220 for controlling the ECR 222) the following elements and connections thereof: [0103] a first terminal 1 of the controller 220 used to connect the controller 220 to a first terminal of the variable control resistor Rc; [0104] a second terminal 2 of the controller 220 used to connect the controller 220 to a first terminal of a sense resistor Rsense, which is a part of the ECR 222; [0105] a third terminal 3 of the controller 220 used to connect the controller 220 to a control terminal of an active element 224, which is a part of the ECR 222; [0106] a fourth terminal 4 of the controller 220 used to connect the controller 220 to a second terminal of the variable control resistor Rc; [0107] a fifth terminal 5 of the controller 220 used to connect the controller 220 to a low-potential terminal 12 of the ECR 222; [0108] a sixth terminal 6 of the controller 220 used to connect the controller 220 to a high-potential terminal 10 of the ECR 222; [0109] an operational amplifier 208; [0110] a reference resistor Rref; and [0111] a constant voltage source (e.g., a battery) 214,
wherein a noninverting input of the operational amplifier 208 is connected to a first terminal of the reference resistor Rref, a second terminal of the reference resistor Rref is connected to the fifth terminal 5 of the controller 220, and the output of the operational amplifier 208 is connected to the third terminal 3 of the controller 220.

[0112] The controller 220 is further equipped with: [0113] a bias resistor Rbias; [0114] an amplifier 204; [0115] an adder 206; [0116] a buffer stage 210; and [0117] a controllable current generator 212,
wherein [0118] a first terminal of the bias resistor Rbias is connected to the sixth terminal 6 of the controller 220, a second terminal of the bias resistor Rbias is connected to a noninverting input of the operational amplifier 208; [0119] the amplifier 204 input is connected to the first terminal 1 of the controller, and the amplifier 204 output is connected to a first input of the adder 206, while the adder 206 output is connected to an inverting input of the operational amplifier 208; [0120] the second terminal 2 of the controller is connected to the input of the buffer stage 210, and the output of the buffer stage 210 is connected to both a second input of the adder 206 and a control input of the controllable current generator 212; [0121] a power input 22 of the controllable current generator 212 is connected to the positive terminal of a DC power source 214, and the negative terminal of the DC power source 214 is connected to the common wire; and [0122] the output 26 of the controllable current generator 212 is connected to the first terminal 1 of the controller to transmit controlling action therethrough, i.e., changing resistance of the variable control resistor Rc.

[0123] By adding the bias resistor Rbias, the amplifier 204, the adder 206, the buffer stage 210, and the controllable current generator 212 with corresponding connections in accordance with the proposed invention, it is possible during the conversion of the voltage U1 at the high-potential terminal 10 of the ECR 222, to create a potential at the noninverting input of the operational amplifier 208:

[00001]$\begin{array}{cc}U{1}^{}=U1*\mathrm{Rref}/\left(\mathrm{Rref}+\mathrm{Rbias}\right),& \left(1\right)\end{array}$

where Rbias is the resistance of the bias resistor, and Rref is the resistance of the reference resistor.

[0124] At the same time, the inverting input of the operational amplifier 208 receives a summed signal S that is composed of the following summands:

The first summand S.sub.1 is transmitted from the first terminal 1 of the proposed controller 220 through the amplifier 204 with the amplification coefficient K to the first input of the adder 206. The first summand is represented by an amplified voltage drop at the variable control resistor Rc caused by the current Icg that is produced by the controllable current generator 212, i.e.

[00002]$\begin{array}{cc}{S}_1=K^{}*\mathrm{Icg}*\mathrm{Rc}& \left(2\right)\end{array}$

The second summand S.sub.2 is transmitted from the second terminal 2 of the proposed controller through the buffer stage 210 with a unitary transmission ratio to the second input of the adder 206. The second summand is represented by the voltage U.sub.2 of the sense resistor R.sub.sense, which is a part of the ECR 222 that is controlled by the proposed controller 220.
This voltage is defined using the following formula:

[00003]$\begin{array}{cc}{U}_2=I_0*R_{sense},& \left(3\right)\end{array}$

where Rsense is the sense resistor value, which may be as small as possible in terms of implementation, and
I.sub.0 is the current that flows through the ECR 222 and that is defined by the active element 224, which is a part of the ECR 222.

Therefore,

[00004]$\begin{array}{cc}{S}_2=U_2=I_0*R_{sense},& \left(4\right)\end{array}$

and the summed signal S at the inverting input of the operational amplifier 208 is

[00005]$\begin{array}{cc}S=S_1+S_2=K*\mathrm{Icg}*\mathrm{Rc}+I_0*R_{sense}& \left(5\right)\end{array}$

Now, consider that the current Icg of the controllable current generator 212 depends on the voltage U.sub.2 that is transmitted from the buffer stage 210 output to the control input 24 of the controllable current generator, i.e.,

[00006]$\begin{array}{cc}\mathrm{Icg}=U_2*\mathrm{Gcg}=I_0*R_{s\mathrm{ense}}*\mathrm{Gcg},& \left(6\right)\end{array}$

where Gcg is the coefficient of conversion of the control voltage U.sub.2 into the current that has dimension of conductivity.
Therefore, based on formulas (5) and (6),

[00007]$\begin{array}{cc}S=K*I_0*R_{s\mathrm{ense}}*\mathrm{Gcg}*\mathrm{Rc}+I_0*R_{sense}=I_0*R_{s\mathrm{ense}}*(1+K*\mathrm{Rc}*\mathrm{Gcg})& \left(7\right)\end{array}$

[0125] The difference between U.sub.1 and S at the operational amplifier 208 output is transmitted as the controlling signal U.sub.contr (U.sub.contr=U.sub.1S) to the third terminal 3 of the controller 220 used to connect the controller to the control terminal of the active element 224, which is a part of the ECR 222, i.e., to the proposed controller's output. Because of a high amplification coefficient in the feedback chain (operational amplifier 208active element 224 of the ECRsense resistor R.sub.sensebuffer stage 210adder 206operational amplifier 208), the relation U.sub.1S is true with practically satisfactory accuracy.

Therefore, per (1) and (7)

[00008]$\begin{array}{cc}{U}_1*R_{ref}/\left(R_{ref}+R_{bias}\right)=I_0*R_{s\mathrm{ense}}*(1+K*\mathrm{Rc}*\mathrm{Gcg})& \left(8\right)\end{array}$

from which it follows that the resistance of the ECR between a high-potential terminal 10 and a low-potential terminal 12 is:

[00009]$\begin{array}{cc}{R}_0=U_1/I_0=R_{s\mathrm{ense}}*(1+K*\mathrm{Rc}*\mathrm{Gcg})/\left(1+R_{bias}/R_{ref}\right)& \left(9\right)\end{array}$

The formula (9) shows that the resistance of the ECR according to the present disclosure is directly proportionate to the resistance of the sense resistor R.sub.sense and to the value of controlling action, which corresponds to the resistance of variable control resistor Rc (e.g., a digital potentiometer).
The formula (9) also shows that it is possible to obtain low and ultra-low R.sub.o values at low R.sub.sense, in case both following relations are true:

[00010]$\begin{array}{cc}\mathrm{Rc}*\left(K^{}*\mathrm{Gcg}\right)<<1\mathrm{and}{R}_{\mathrm{bias}}{R}_{\mathrm{ref}}& \left(10\right)\end{array}$

The variable control resistor Rc, like in conventional solutions, may be represented by a mechanical potentiometer, a photoresistor, or a thermistor.

[0126] Unlike the prototype, the proposed circuit has the advantage of employing digital potentiometers as control resistors to get low or ultra-low resistances in ECRs, which can be used within a broad range of working voltages and currents, thus achieving the technical result above.

[0127] The proposed controller for an ECR 222 according to FIG. 2 functions as follows. When the controlling action is changed, which corresponds to the change in resistance of the variable control resistor Rc (e.g., a digital potentiometer), the voltage U.sub.Rc is transmitted from this resistor through the amplifier 204 with the transmission coefficient K to the first input of the adder 206 as the first summand S.sub.1=K*U.sub.Rc. The second summand S.sub.2 represented by the voltage U.sub.2 is transmitted from the sense resistor R.sub.sense, which is a part of the ECR 222, through a buffer stage 210 to the second input of the adder 206. This voltage is determined using the formula (3), i.e., U.sub.2=I.sub.0*R.sub.sense, and, therefore, S.sub.2=I.sub.0*R.sub.sense (see formula (4)), where R.sub.sense is the sense resistor value, which may be as small as possible in terms of implementation. The voltage U.sub.2, as shown above, is equal to the voltage drop at the sense resistor R.sub.sense caused by the current I.sub.0, that flows through the ECR 222. In reality, the current I.sub.0 flows through the following chain: the high-potential terminal 10 of the ECR 222the active element 224the sense resistor R.sub.sense that is connected in series to the active element 224the low-potential terminal 12 of the ECR 222, due to the potential difference U.sub.1 between the high-potential terminal 10 and the low-potential terminal 12 of the ECR 222.

Therefore, by summing the voltages K*URc and U.sub.2, i.e. K*U.sub.Rc=S.sub.1 and U.sub.2=S.sub.2=I.sub.0*R.sub.sense, an intermediate signal is generated at the output of the adder 206:

[00011]$\begin{array}{cc}S=S_1+S_2=K*U_{Rc}+I_0*R_{sense},& \left(11\right)\end{array}$

which is then received by the inverting input of the operational amplifier 208.

[0128] At the same time, the constant potential U.sub.1 which is equal (see formula (1)) to U.sub.1=U.sub.1/(1+R.sub.bias/R.sub.ref), is transmitted from the terminal 6 of the controller 220 through a voltage divider formed by the bias resistor R.sub.bias and the reference resistor R.sub.ref to the noninverting input of the operational amplifier 208. Transmitted from the output of the operational amplifier 208 to the third terminal 3 of the proposed controller 220 used to connect to the control terminal of the active element 224, which is a part of the ECR 222, i.e., to the output of the proposed controller 220, is the difference between S and U.sub.1 as the control voltage Ucontr (Ucontr=U.sub.1S). This voltage U.sub.contr is transmitted from the output of the proposed controller 220 to the control terminal of the active element 224.

[0129] However, if the intermediate signal S value at the inverting input of the operational amplifier 208 is higher than the voltage U.sub.1, then the voltage U.sub.contr at the control terminal of the active element 224 half-closes the active element 224, reducing the current I.sub.0 and causing the voltage U.sub.2 to fall, which is transmitted through the buffer stage 210 to the second input of the adder 206 as the second summand S.sub.2=I.sub.0*R.sub.sense, see formula (4).

In addition, the voltage U.sub.2 is transmitted to the control input 24 of the controllable current generator 212, decreasing current I.sub.cg thereof according to the formula (6):

[00012]$I_{cg}=U_2*G_{cg}=I_0*R_{s\mathrm{ense}}*G_{cg},$

where G.sub.cg is the coefficient of conversion of the control voltage U.sub.2 into the current that has conductivity dimension.
The decreasing of current I.sub.cg of the controllable current generator 212 causes the decreaing of voltage drop at the variable control resistor R.sub.c (e.g., a digital potentiometer), and, consequently, decreased after being amplified K times in the amplifier 204 is the first summand S.sub.1 at the first input of the adder 206 (see formulas (2) and (6)):

[00013]$\begin{array}{cc}{S}_1=K^{}*I_{\mathrm{cg}}*R_c=I_0*R_{s\mathrm{ense}}*G_{\mathrm{cg}}*K^{}*R_c& \left(12\right)\end{array}$

By summing the summands S.sub.1 and S.sub.2 in the adder 206, an intermediate signal S is generated at the adder's 206 output, see formula (7): S=I.sub.0*R.sub.sense*(1+K*Rc*G.sub.cg which signal S decreases due to the current I.sub.0 fall as it is described above.

[0130] Due to a high amplification coefficient of the operational amplifier 208, this process will persist until the intermediate signal S at the inverting input of the operational amplifier 208 becomes equal to the voltage U.sub.1 at the noninverting input of the operational amplifier 208. Conversely, if the intermediate signal S value at the adder 206 output is lower than the voltage U.sub.1, then the voltage U.sub.contr at the control terminal of the active element 224 half-opens the active element 224, increasing the current I.sub.0 therethrough and causing the voltage U.sub.2 to increase, which voltage is transmitted through the buffer stage 210 to the second input of the adder 206 as the second summand S.sub.2=I.sub.0*R.sub.sense (see formula (4)). In addition, the voltage U.sub.2 is transmitted to the control input 24 of the controllable current generator 212, increasing its current I.sub.cg according to the formula (6): I.sub.cg=U.sub.2*G.sub.cg=I.sub.0*R.sub.sense*G.sub.cg.

The summand S.sub.1 also increases, see formula (12): S.sub.1=I.sub.0*R.sub.sense*G.sub.cg*K*R.sub.c
By summing the increasing summands S.sub.1 and S.sub.2 in the adder 206, an intermediate signal S that is described by the formula (7) is generated at the adder 206's output. The intermediate signal increases due to the current I.sub.0 increase as described above.
Due to a high amplification coefficient of the operational amplifier 208, this process will persist until the intermediate signal S at the inverting input of the operational amplifier 208 becomes equal to the voltage U.sub.1 at the noninverting input of the operational amplifier 208, i.e., S=U.sub.1. Therefore, because of a high gain feedback that loops around the operational amplifier 208the active element 224 of the ECR 222the sense resistor R.sub.sensethe buffer stage 210the adder 206the operational amplifier 208, the relation S=U.sub.1 will always be true for the claimed invention with practically satisfactory accuracy.
Or, by substituting the corresponding values from (1) and (11), we get formula (8) again:

[00014]$U_1*R_{ref}/\left(R_{ref}+R_{bias}\right)=I_0*R_{s\mathrm{ense}}*(1+K*R_c*G_{cg})$

Equation (8) is reliably true even under various destabilizing factors, including wide temperature fluctuations, thanks to the high gain feedback.

[0131] Consider now that the resistance R.sub.0 between the high-potential terminal 10 and the low-potential terminal 12 of the ECR 222 is the quotient of the voltage U.sub.1 by the current I.sub.0 that flows through the chain (the high-potential terminal 10active element 224sense resistor R.sub.sense connected in series to the active element 224the low-potential terminal 12), i.e.,

[00015]$\begin{array}{cc}{R}_0=U_1/I_0& \left(13\right)\end{array}$

The relations (8) and (13) produce the value of resistance between the high-potential terminal 10 and the low-potential terminal 12 of the ECR 222:

[00016]$R_0=U_1/I_0=R_{s\mathrm{ense}}*(1+K*R_c*G_{cg})/\left(1+R_{bias}/R_{ref}\right),$

which corresponds to the formula (9).
Therefore, it is proved, by [0132] generating an intermediate signal at the adder 206 output as in (7):

[00017]$S=I_0*R_{s\mathrm{ense}}*(1+K*R_c*G_{cg}),$ [0133] forwarding this signal to the second (inverting) input of the operational amplifier 208, [0134] transmitting the potential (see formula (1)):

[00018]$U_{1^{}}=U_1/\left(1+R_{\mathrm{bias}}/R_{\mathrm{ref}}\right)$

to the first (noninverting) input of the operational amplifier 208, and [0135] ensuring that the equality S=U.sub.1 is true due to the high gain feedback,
that the resistance R.sub.0 of the ECR 222 of the present disclosure is directly proportionate to the resistance of the sense resistor R.sub.sense and is also proportionate to the value of the control action, which corresponds to the resistance of the variable control resistor R.sub.c (e.g., a digital potentiometer).

[0136] The formula (9) means that it is possible to obtain low and ultra-low R.sub.O values at a relatively high current I.sub.0 that is provided by the active element 224. Therefore, to control the resistance of a circuit portion, a controlling action that corresponds to the resistance of the variable control resistor Rc (e.g., a digital potentiometer) is used, wherein the resistance of the ECR 222 is proportionate to the controlling action that corresponds to the value of the variable resistor Rc (e.g., a digital potentiometer).

[0137] In FIG. 3, the following elements of the controllable current generator 212 are shown: [0138] 302a second operational amplifier; [0139] 303a third operational amplifier; [0140] 311a first MOSFET transistor; [0141] 312a second MOSFET transistor; [0142] R.sub.cg1a first resistor of the controllable current generator 212; [0143] R.sub.cg2a second resistor of the controllable current generator 212; [0144] R.sub.cg3a third resistor of the controllable current generator 212;

[0145] The controllable current generator 212 of FIG. 3 functions as follows.

The signal S.sub.2 (a controlling signal for the controllable current generator 212) is transmitted to the control input 24 thereof and then forwarded to the noninverting input (+) of the second operational amplifier 302, the output thereof being connected to the gate of the first MOSFET transistor 311. The source of the first MOSFET transistor 311 is connected to the inverting input () of the second operational amplifier 302 and to the first terminal of the first resistor R.sub.cg1 of the controllable current generator 212. The second terminal 28 of the first resistor R.sub.cg1 is connected to the low-potential terminal 12 of the ECR 222 (see also FIG. 2). The current I.sub.cg1 is flowing through the drain-source chain of the first MOSFET transistor 311, causing a voltage drop at the first resistor R.sub.cg1 of the controllable current generator 212:

[00019]$\begin{array}{cc}U\mathrm{cg}1=\mathrm{Icg}1*\mathrm{Rcg}1& \left(14\right)\end{array}$

Because of a high gain feedback looping around both the second operational amplifier 302 and the first MOSFET transistor 311, the signal S.sub.2 at the noninverting input (+) of the second operational amplifier 302 and the voltage U.sub.cg1 at its inverting input () can be considered equal for practical purposes, and thus:

[00020]$\begin{array}{cc}{S}_2=U_{\mathrm{cg}1}& \left(15\right)\end{array}$

Therefore, the current flowing through the first MOSFET transistor 311 is

[00021]$\begin{array}{cc}{I}_{\mathrm{cg}1}=S_2/R_{\mathrm{cg}1},& \left(16\right)\end{array}$

and it causes a voltage drop at the second resistor R.sub.cg2 of the controllable current generator 212:

[00022]$\begin{array}{cc}{U}_{\mathrm{cg}2}=I_{\mathrm{cg}1}*R_{\mathrm{cg}2}& \left(17\right)\end{array}$

Since the first terminal of the second resistor R.sub.cg2 is connected to the terminal 22 of the controllable current generator 212, which receives the power voltage E and the second terminal of the second resistor R.sub.cg2 is connected to the non-inverting input (+) of the third operational amplifier 303, the following voltage appears there:

[00023]$\begin{array}{cc}{U}_{+303}=E-U_{\mathrm{cg}2}& \left(18\right)\end{array}$

The output of the third operational amplifier 303 is connected to the gate of the second MOSFET transistor 312, and the transistor's drain is connected to the inverting input () of the third operational amplifier 303 and to the first terminal of the third resistor R.sub.cg3, and the second terminal of the third resistor R.sub.cg3 is connected to the terminal 22 of the controllable current generator 212, which receives the power voltage E.
The output current I.sub.cg of the controllable current generator 212 is flowing through the drain-source chain of the second MOSFET transistor 312 to the terminal 26 of the controllable current generator 212, causing a voltage drop at the third resistor R.sub.cg3 of the controllable current generator 212:

[00024]$\begin{array}{cc}{U}_{\mathrm{cg}3}=I_{\mathrm{cg}}*R_{\mathrm{cg}3}& \left(19\right)\end{array}$

As a result, the inverting input () of the third operational amplifier 303 receives the following voltage from the first terminal of the third resistor R.sub.cg3:

[00025]$\begin{array}{cc}{U}_{-303}=E-U_{\mathrm{cg}3}& \left(20\right)\end{array}$

Because of a high gain feedback looping around both the third operational amplifier 303 and the second MOSFET transistor 312, the voltages at the noninverting input (+) and the inverting input () of the third operational amplifier 303 can be considered equal for practical purposes, and thus:

[00026]$\begin{array}{cc}{U}_{+303}=U_{-303}& \left(21\right)\end{array}$

Therefore, see (18) and (20):

[00027]$\begin{array}{cc}{U}_{\mathrm{cg}2}=U_{\mathrm{cg}3}& \left(22\right)\end{array}$

And, considering (17) and (19)

[00028]$\begin{array}{cc}{I}_{\mathrm{cg}1}*R_{\mathrm{cg}2}=I_{\mathrm{cg}}*R_{\mathrm{cg}3}& \left(23\right)\end{array}$

[0146] Therefore, the output current I.sub.cg of the controllable current generator 212 is

[00029]$\begin{array}{cc}{I}_{\mathrm{cg}}=I_{\mathrm{cg}1}*R_{\mathrm{cg}2}/R_{\mathrm{cg}3}& \left(24\right)\end{array}$

And since I.sub.cg1 depends on the control signal S.sub.2 (see equation (16)), the result is:

[00030]$\begin{array}{cc}{I}_{\mathrm{cg}}=S_2*R_{\mathrm{cg}2}/\left(R_{\mathrm{cg}1}*R_{\mathrm{cg}3}\right)& \left(25\right)\end{array}$

Or, since the signal S.sub.2 is identically equal to the voltage U.sub.2 that is received from the sense resistor R.sub.sense, which is a part of the ECR 222, the final result is:

[00031]$\begin{array}{cc}{I}_{\mathrm{cg}}=U_2*R_{\mathrm{cg}2}/\left(R_{\mathrm{cg}1}*R_{\mathrm{cg}3}\right)& \left(26\right)\end{array}$

And this current does not depend on resistance of the variable control resistor R.sub.c, that is external in regard to the controllable current generator 212, but depends only on resistances of the internal resistors of the controllable current generator 212 and control voltage U.sub.2 across the sense resistor R.sub.sense.
The value

[00032]$\begin{array}{cc}{G}_{\mathrm{cg}}=R_{\mathrm{cg}2}/\left(R_{\mathrm{cg}1}*R_{\mathrm{cg}3}\right)& \left(27\right)\end{array}$

characterizes the coefficient of conversion of the control voltage U.sub.2 into current, has the dimension of conductivity and is used when determining the resistance of the ECR 222 according to the present disclosure. Therefore, the controllable current generator 212, which is designed, for instance, according to FIG. 3, enables the proposed controller 220 to function in order to achieve the stated technical result.

[0147] The controllable current generator can be implemented by various methods, for example, e.g., as described in LT 1789. Micropower, Single Supply Rail-to-Rail Output Instrumentation Amplifiers Description LINEAR TECHNOLOGY CORPORATION 2002, drawing 0.5 A to 4 A Voltage Controlled Current Source (see also https://www.analog.com/ru/products/lt1789.html#product-overview).

The controllable current generator 212 also can be implemented, for example, according to article How should I design variable current source of 4-20 mA with 24 Vdc input?, see Electrical Engineering Stack Exchange, or https://electronics.stackexchange.com/questions/72192/how-should-i-design-variable-currentsource-of-4-20ma-with-24vdc-input?rq=1).
The controllable current generator 212 also may be designed on the basis of IC LT 6552, as shown in Voltage controlled current sourceground referred input and output, Jim Williams, in Analog Circuit Design, 2013 (Controlled Current Sourcean overview|ScienceDirect Topics), and numerous other options.
The voltage divider may be implemented as a resistive divider, or as divider consisting of two transistors connected in series, or in any other way that permits to forward to the noninverting input of the operational amplifier 208 a part of voltage from high-potential terminal 10 of the ECR 222.
The voltage divider also may be external in regard to controller 220 and connected to it through a separate terminal, which makes it possible not to forward voltage from high-potential terminal 10 of the ECR 222 to controller 220.
The amplifier 204, the buffer stage 210 and the adder 206 can be implemented in different ways allowing performance ability of the claimed controller.
The controller 220 can be made of standard discrete components, such as for op amps, transistors and resistors, or integrated circuits including ASICs.
For example, the amplifier 204, the buffer 210, the current generator 212 can be made using integrated circuits such as OPA189, TLV9002IDR, MCP6002-E/SN and many others. The primary parameters should preferably be: OPEN-LOOP GAIN (RL=10 k) at least 100 dB; Gain-bandwidth product at least 1 MHz, rail-to-rail input and output. Similar components can be used for operational amplifier 208. As transistors for the controllable current generator 212, NTNUS3171PZ. NX3020NAK and similar can be used, with parameters RDS (on) up to 5.5 Ohm, drain current I.sub.0 at least 100 mA. [0148] Other components of the ECR 222 (e.g., the adder 206, the DC voltage source 214) are known in the art, and can be implemented in any known way. [0149] Nominal resistor values are as follows: [0150] R.sub.bias in the range of 100 . . . 200 KOhm; [0151] R.sub.ref in the range of 50 . . . 100 KOhm. [0152] R.sub.cg1, R.sub.cg2, R.sub.cg3 are typically in the range of 200 Ohm . . . 1 KOhm.
The value of R.sub.sense depends on the nominal desired value of the ECR 222, and is typically 10mOhm and higher (e.g., up to 100 Ohm).
Various transistors, including MOSFET, e.g., STT6N3LLH6 transistor or its analogs can be used as the active element, as long as its RDS (on) is an order of magnitude less than the nominal ECR 222 value.
The proposed controller 220 for ECR 222 can be made, for example, as a chip or a chip assembly or a microplate. The ECR 222 also can be made, for example, as a chip or a chip assembly or a microplate.
The preferred embodiment of the controller 220 for an ECR 222 is in the form of an integrated circuit, which permits reducing the size substantially, and manufacturing costs. For relatively low-power ECRs (total power dissipated by the active element and the sense resistor up to about 1-2 watts), it is preferably to implement the controller, the active element and the sense resistor as a single integrated circuit. In any case, the voltage divider may be external or internal in relation to this chip.

Experimental Findings

[0153] The proposed controller 220 of FIG. 2 and FIG. 3 was prototyped in order to confirm that the objective of the invention is attainable.

Prototyping results were as follows: [0154] Power supply voltage: 5 V5% [0155] Minimum resistance of the variable control resistor R.sub.c (e.g., a digital potentiometer): 100 Ohm [0156] Maximum resistance of the variable control resistor R.sub.c (e.g., a digital potentiometer): 10,000 Ohm [0157] Minimum resistance of the ECR R.sub.0min: 383.5 Ohm [0158] Maximum resistance of the ECR R.sub.0max: 26,225.9 Ohm [0159] ECR Resistance adjustment range by 68.4 times.
The nonlinearity of dependence between the resistance of an ECR 222 and that of the resistor R.sub.c (e.g., a digital potentiometer) does not exceed 1.4%.
The dependence between the resistance R.sub.0 of the ECR 222 and that of the variable control resistor R.sub.c is shown as a straight line in FIG. 4. The resistance measurements are not distinguished by appearance from predictions/estimates.
Therefore, it should be seen from the above that the present invention successfully achieves the above technical result.
However, the present invention is not limited thereto.
It is disclosed based on what can currently be considered a feasible implementation of various embodiments of the controller.
It is to be understood, however, that the claimed invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Accordingly, the drawings and the description of the present invention are only illustrative and do not limit the scope of its implementation.
The present invention is further defined by the following claims.