Abstract
A component carrier including: i) a stack with at least one electrically insulating layer structure and at least one electrically conductive layer structure; ii) a first metal trace comprising a rough surface; and iii) a second metal trace arranged adjacent to the first metal trace, comprising a smooth surface. The component carrier is configured to guide high-frequency and or high-speed signals through the second metal trace.
Claims
1. A component carrier comprising: a stack comprising at least one electrically insulating layer structure and at least one electrically conductive layer structure; a first metal trace comprising a rough surface; and a second metal trace arranged adjacent to the first metal trace, comprising a smooth surface; wherein the component carrier is configured to guide at least one of high-frequency, HF, signals and high-speed signals through the second metal trace.
2. The component carrier according to claim 1, wherein the rough surface comprises a surface roughness of more than 500 nm; and/or wherein the smooth surface comprises a surface roughness of less than 500 nm.
3. The component carrier according to claim 1, wherein the second metal trace comprises rough surface portions and smooth surface portions in an alternating manner.
4. The component carrier according to claim 1, wherein the HF signals comprise a frequency of at least 1 GHz.
5. The component carrier according to claim 1, wherein the first metal trace and the second metal trace are embedded in a common encapsulation material.
6. The component carrier according to claim 1, wherein only the second metal trace is at least partially covered by a protection layer.
7. The component carrier according to claim 1, further comprising: a cavity in the stack, wherein the bottom and/or the sidewalls of the cavity are at least partially covered by the second metal trace.
8. The component carrier according to claim 1, further comprising: a resin layer structure arranged on top of the first metal trace, and/or a non-resin layer structure arranged on top of the second metal trace.
9. The component carrier according to claim 8, comprising at least one of the following features: further comprising: an adhesion promotor arranged between the non-resin layer structure and the second metal trace, wherein the adhesion promoter comprises polyimide, PI; a further second metal trace arranged on top of the non-resin layer structure and/or on top of the cavity, such that the non-resin layer structure or the cavity functions as a waveguide.
10. (canceled)
11. The component carrier according to claim 1, comprising at least one of the following features: wherein the second metal trace comprises the smooth surface at the top portion, while at least one sidewall portion comprises a rough surface; and/or wherein the second metal trace comprises the smooth surface at at least one sidewall, while the top portion comprise a rough surface; wherein the component carrier comprises a peripheral portion and a central portion, and wherein the surface roughness of first metal traces at the peripheral portion of the component carrier is larger than the surface roughness of first metal traces at the central portion of the component carrier; wherein at least one first metal trace is larger than the adjacent second metal trace, wherein said at least one first metal trace is configured as a non-functional electrically conductive.
12.-13. (canceled)
14. A method of manufacturing a component carrier, the method comprising: forming a stack comprising at least one electrically insulating layer structure and at least one electrically conductive layer structure; forming a first metal trace with a rough surface; forming a second metal trace, adjacent to the first metal trace, with a smooth surface; and configuring the component carrier, so that at least one of high-frequency, HF, signals and high-speed signals can be guided through the second metal trace.
15. The method according to claim 14, wherein forming the first metal trace comprises: micro-etching the first metal trace surface to yield a rough surface.
16. The method according to claim 14, wherein forming the second metal trace comprises: protecting the smooth surface of the second metal trace with a protection material in when micro-etching the first metal trace; wherein protecting further comprises: covering the first metal trace with a first dielectric material before applying the protection material.
17. (canceled)
18. The method according to claim 1, further comprising: providing a plurality of adjacent metal traces; and filling gaps between the metal traces with a second dielectric material, such that sidewalls of the metal traces are free from the second dielectric material; and filling the gaps with the protection material.
19. The method according to claim 1, wherein forming the second metal trace comprises: forming a metal trace with a rough surface in the same process as forming the first metal trace, and subsequently smoothing the rough surface to yield the second metal trace with the smooth surface.
20. The method according to claim 19, wherein smoothing further comprises: grinding the rough surface, and/or plating the rough surface.
21. The method according to claim 14, further comprising: embedding the first metal trace and the second metal trace in a common encapsulation material.
22. The method according to claim 14, further comprising: forming a resin layer structure on top of the first metal trace; and/or forming a non-resin layer structure on top of the second metal trace and/or forming a cavity on top of the second metal trace.
23. The method according to claim 22, further comprising: providing a further second metal trace on top of the non-resin layer structure and/or the cavity, to thereby provide a waveguide structure.
24. A method, comprising: providing a component carrier arranged with adjacent electrically conductive traces, wherein at least a first trace has a relatively smoother surface than a second trace; and coupling a signal with a frequency of at least 6 GHz to the adjacent electrically conductive traces.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0078] The aspects defined above and further aspects of the disclosure are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.
[0079] FIG. 1a and FIG. 1b show first metal traces and second metal traces adjacent to each other according to exemplary embodiments of the disclosure.
[0080] FIG. 2a, FIG. 2b, FIG. 2c, FIG. 2d, FIG. 2e, FIG. 2f show a first component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0081] FIG. 3a, FIG. 3b, FIG. 3c, FIG. 3d, FIG. 3e show a second component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0082] FIG. 4a, FIG. 4b, FIG. 4c, FIG. 4d, FIG. 4e, FIG. 4f show a third component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0083] FIG. 5a, FIG. 5b, FIG. 5c, FIG. 5d show a fourth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0084] FIG. 6a, FIG. 6b, FIG. 6c, FIG. 6d show a fifth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0085] FIG. 7a, FIG. 7b, FIG. 7c, FIG. 7d, FIG. 7e, FIG. 7f show a sixth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0086] FIG. 8a, FIG. 8b, FIG. 8c, FIG. 8d show a seventh component carrier manufacturing process that involves forming a wave guide according to an exemplary embodiment of the invention.
[0087] FIG. 9a, FIG. 9b, FIG. 9c, FIG. 9d show an eighth component carrier manufacturing process that involves forming a wave guide according to a further exemplary embodiment of the disclosure.
[0088] FIG. 10 shows second metal traces only partially with smooth surfaces according to an exemplary embodiment of the disclosure.
[0089] FIG. 11 shows a component carrier with an enlarged first metal trace according to an exemplary embodiment of the disclosure.
[0090] FIG. 12 shows a component carrier having first metal traces with different roughness according to an exemplary embodiment of the disclosure.
DETAILED DESCRIPTION OF ILLUSTRATED EMBODIMENTS
[0091] The illustrations in the drawings are schematically presented. In different drawings, similar or identical elements are provided with the same reference signs.
[0092] FIG. 1a shows component carrier 100 and metal traces 110, 120 manufactured according to an exemplary embodiment of the disclosure. A first metal trace 110 comprises a rough surface 111 and a second metal trace 120, arranged adjacent to the first metal trace 110, comprises a smooth surface 121.
[0093] The metal traces 110, 120 are electrically conductive structures 104 of the component carrier stack that further comprises an electrically insulating layer structure 102, which serves as a support structure for the metal traces 110, 120.
[0094] FIG. 1b shows two first metal traces 110 with rough surfaces 111.
[0095] In between, there is located a metal trace that comprises portions with smooth surfaces 121 and with rough surfaces 122, alternating with each other. The portions with rough surfaces 122 can be seen as first metal traces 110. The traces 110, 120 can comprise pads for an electrical connection, e.g. at the endpoints of the trace. In other words, especially for long traces, such anchor points with enhanced adhesion properties can be formed.
[0096] FIGS. 2a to 2f show a first component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0097] FIG. 2a: a dielectric support structure 102 with a first metal trace 110 and a second metal trace 120, adjacent to each other, is provided. Both metal traces 110, 120 comprise a smooth surface.
[0098] FIG. 2b: the second metal trace 120 is coated by a protection layer/material 130. Said protection layer 130 can comprise for example one of an elastic polymer coating, an ink, an adhesion promoter (e.g. a bond film), a peel-off film, a strip varnish, a barrier layer, a graphene layer. However, the protection material 130 can also be a (plated/sputtered) metal, e.g. chromium.
[0099] FIG. 2c: a component carrier manufacturing step is performed selectively for the first metal trace 110, while the second metal trace 120 is protected by the protection layer 130. The manufacturing step comprises surface roughening (e.g. by micro-etching) the first metal trace surface to provide the rough surface 111.
[0100] FIG. 2d: alternative 1: both metal traces 110, 120 are embedded in a common encapsulating (insulating) material 135. Hereby, the second metal trace 120 is still protected by the protection (barrier) layer 130.
[0101] FIG. 2e: alternative 2: the protection layer 130 is removed (e.g. by a (hot) pressurized fluid stream, preferably without leaving residues).
[0102] FIG. 2f: also alternative 2, both metal traces 110, 120 are embedded in a common encapsulating material 135, whereby the protection layer 130 had been removed from the second metal trace 120. Due to the protection layer(s) 130, the surface for the second metal trace 120 remains with its initial lower roughness.
[0103] FIGS. 3a to 3e show a second component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0104] FIG. 3a: a plurality of first metal trace 110 preforms and a plurality of second metal traces 120 are provided in the form of a patterned metal layer structure 105 on a common electrically insulating layer structure 102 support structure. A dielectric material 140 is provided in between the traces.
[0105] FIG. 3b: a first dielectric material 141 is applied on the first metal trace 110 preform as a cover.
[0106] FIG. 3c: a protection layer/material 130 is provided on the second metal traces 120 as a protection (e.g. by plating). In this example, the protection layer 130 comprises also a smooth surface.
[0107] FIG. 3d: the first dielectric material 141 (e.g. a PID material) and the dielectric material 140 are removed (e.g. by a photolithography process), thereby exposing the first metal trace 110 preforms. After an etching process (to separate the metal traces), there may be an under etch present (see in the Figure). This under-etch may also be seen as a structural feature in the final product. As a consequence, the protection layer 130 is not in direct (physical) contact with the insulating layer structure 102.
[0108] FIG. 3e: a surface roughening process is performed, whereby the unprotected first metal trace 110 preforms are surface roughened, thereby providing the first metal traces 110. The second metal traces 120 are instead still protected by the protection material 130.
[0109] FIGS. 4a to 4f show a third component carrier manufacturing process according to an exemplary embodiment of the invention.
[0110] FIG. 4a: a plurality of first metal trace 110 preforms and a plurality of second metal traces 120 are provided in the form of a patterned metal layer structure 105 on a common electrically insulating layer structure 102 support structure. A dielectric material 140 is provided in between the traces.
[0111] FIG. 4b: the dielectric material 140 is removed.
[0112] FIG. 4c: a second dielectric material 142 is provided between the metal traces 110, 120 in such a manner that there are gaps 144 remaining between the second dielectric material 142 and the metal traces 110, 120. In particular, the second dielectric material 142 is applied so that the first metal trace 110 preforms are completely covered.
[0113] FIG. 4d: the protection material 130 is applied on the second metal traces 120 so that the top as well as the sidewalls are covered. The latter is enabled by the presence of the gaps 144. The application of the protection material 140 can be done e.g. by selective plating.
[0114] FIG. 4e: the second dielectric material 142 is removed, thereby exposing the first metal trace 110 preforms completely, while the second metal traces 120 are still protected by the protection material 130. By a separate etching step, the seed metal layer will be removed which will create a certain degree of undercut (seed layer thickness for example 0.7 um). After an etching process (to separate the metal traces), there may be an under etch (undercut) present (see in the Figure). This under-etch may also be seen as a structural feature in the final product. As a consequence, the protection layer 130 is not in direct (physical) contact with the insulating layer structure 102.
[0115] FIG. 4f: a surface roughening process is performed, whereby the unprotected first metal trace 110 preforms are surface roughened, thereby providing the first metal traces 110. The second metal traces 120 are instead still protected by the protection material 130, so that the surfaces remain smooth.
[0116] FIGS. 5a to 5d show a fourth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0117] FIG. 5a: a first metal trace 110 and a second metal trace 120 are provided on a common electrically insulating layer structure 102 support structure.
[0118] FIG. 5b: only the second metal trace 120 is encapsulated in an encapsulating material (e.g. a mold material like a resin) 135.
[0119] FIG. 5c: a surface roughening process is performed, whereby the unprotected first metal trace 110 is surface roughened, thereby providing the rough surface 111. The second metal trace 120 is protected by the encapsulating material 135, so that the surface remains smooth 121.
[0120] FIG. 5d: the first metal trace 110 with the rough surface 111 is also embedded in the encapsulating material 135 (the same material as for FIG. 5b or another material), so that both metal traces 110, 120 are now embedded in a common encapsulant 135.
[0121] FIGS. 6a to 6d show a fifth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0122] FIG. 6a: there are formed a plurality of first metal traces 110 with respective rough surfaces 111 on a common electrically insulating layer structure 102.
[0123] FIG. 6b: laser energy 150 is applied to a part of the first metal traces 110.
[0124] FIG. 6c: after the laser ablation 150, the rough surfaces of the part of the first metal traces 110 have been changed into smooth surfaces 121, thereby turning said first metal traces 110 into second metal traces 120 with smooth surfaces 121. By using the laser ablation 150, portions of the electrically insulating layer structure 102 are removed, in particular, directly around the second metal traces 120. This manufacturing step may be reflected as a structural feature in the final product.
[0125] FIG. 6d: the first metal traces 110 and the second metal traces 120 are embedded in a common encapsulant 135.
[0126] FIGS. 7a to 7f show a sixth component carrier manufacturing process according to an exemplary embodiment of the disclosure.
[0127] FIG. 7a: there are formed two metal traces on a common electrically insulating layer structure 102.
[0128] FIG. 7b: the surfaces of both metal traces are roughened to provide the first metal traces 110 with rough surfaces 111.
[0129] FIG. 7c: only the right first metal trace 110 is encapsulated in an encapsulating material 135.
[0130] FIG. 7d: the surface of the left first metal trace 110 is smoothed (e.g. by laser ablation or additional plating or grinding), so that said first metal trace 110 is turned into a second metal trace 120 with a smooth surface 121. The right first metal trace 110 is instead protected by the encapsulant 135.
[0131] FIG. 7e: both metal traces 110, 120 are embedded in a common encapsulant 135 (which may be the same encapsulant as for FIG. 7c or a different material).
[0132] FIG. 7f shows an example, where a rough surface 111 of a first metal trace 110 is plated with metal material (e.g. copper), to thereby smoothen the surface. Afterwards, the surface is less rough, however, not as smooth as in the case of the second metal trace 120.
[0133] FIGS. 8a to 8d show a seventh component carrier manufacturing process that involves forming a wave guide according to an exemplary embodiment of the disclosure.
[0134] FIG. 8a: there are provided two component carrier (preforms) in the form of an electrically insulating layer structure 102 covered by an electrically conductive layer 105, respectively (e.g. a copper-clad-laminate). The first support structure comprises a protection layer 130 at the bottom main surface and the second support structure comprises a further protection layer 130 at the top main surface. The term main surface may in this context refer to a surface that is parallel to the directions of main extension (x, y) of the component carrier and perpendicular to the stacking direction (z). The protection layers 130 respectively protect a portion not to be processed.
[0135] FIG. 8b: portions not protected by the protection layer 130 are portions to be processed. The surface of these portions to be processed is roughened 111 selectively, e.g. by micro-etching, thereby providing first metal traces 110. Afterwards, the protection layers 130 are removed, leaving smooth surface 121 on the second metal traces 120 and/or the further second metal traces 123 behind.
[0136] FIG. 8c: a resin layer structure 166 (in particular a prepreg) is arranged between the first metal traces 110 of the first support structure and the second support structure, respectively. In an example, the second metal traces 120 are not in direct contact with the resin material 166. Further, a non-resin layer structure 165 (in particular a sinter paste) is arranged between the second metal traces 120 of the first support structure and the second support structure, respectively. While the resin layer structure 166 adheres well to the rough surfaces 111, the sinter paste is connected to the smooth surfaces 121 in a robust manner. An adhesion promoter (e.g. PI) can be arranged between the non-resin layer structure 165 and the second metal trace 120 (not shown).
[0137] FIG. 8d: the non-resin layer structure 165 is embedded between the second metal trace 120 and a further second metal trace 123. The non-resin layer structure 165 can function as a waveguide 170.
[0138] FIGS. 9a to 9d show an eighth component carrier manufacturing process that involves forming a wave guide according to an exemplary embodiment of the disclosure.
[0139] FIG. 9a: there are provided two component carrier (preforms) in the form of an electrically insulating layer structure 102 covered by an electrically conductive layer 105, respectively (e.g. a copper-clad-laminate). The first support structure comprises a protection layer 130 at the bottom main surface and the second support structure comprises a further protection layer 130 at the top main surface. The protection layers 130 respectively protect a portion not to be processed. Furthermore, a cavity 180 is formed in the lower support structure below the respective protection layer 130. The bottom and the sidewalls of the cavity 180 are covered by smooth surface second metal trace 120 material.
[0140] FIG. 9b: portions not protected by the protection layer 130 are portions to be processed. The surface of these portions to be processed is roughened 111 selectively, e.g. by micro-etching, thereby providing first metal traces 110. Afterwards, the protection layers 130 are removed, leaving smooth surface 121 on second metal traces 120 and/or further second metal traces 123 behind. Furthermore, the cavity 180 is now exposed.
[0141] FIG. 9c: a resin layer structure 166 (in particular a prepreg) is arranged between the first metal traces 110 of the first support structure and the second support structure, respectively. Further, a non-resin layer structure 165 (in particular a sinter paste) is arranged between the second metal traces 120 of the first support structure and the second support structure, respectively (there is a cut-out provided). While the resin layer structure 166 adheres well to the rough surfaces 111, the sinter paste is connected to the smooth surfaces 121 in a robust manner. Hereby, there is no non-resin layer structure 165 arranged in the cavity 180 and not extending in the cavity 180 in stack thickness direction. Additionally, the edges of the cavity 180 are free of the non-resin layer structure 165.
[0142] FIG. 9d: the non-resin layer structure 165 is preferably at least partially embedded between the second metal trace 120 and a further second metal trace 123 (cavity 190 is not filled up). Furthermore, the cavity 180 is now enlarged and located between the second metal trace 120 and the further second metal trace 123. In this example, the further cavity 190 between the second metal traces 120, 123 functions as a wave guide. In this example, there is a step between the cavity in the lower support structure and the non-resin layer structure 165. Additionally and/or alternatively, the insulating layer structure 102 and the non-resin layer structure 165 can be flush. This may have an advantage in that the function as a wave guide will be enhanced.
[0143] FIG. 10 shows second metal traces 120 that comprise only partially smooth surfaces 121 according to an exemplary embodiment of the disclosure. The second metal trace 120 at the left side comprises the smooth surface 121 at the sidewalls (portion), while, at the top portion, it comprises a rough surface 122. The second metal trace 120 at the right side in turn comprises the smooth surface 121 at the top portion, while it comprises at the sidewalls a rough surface 122. These structures may be provided by LDI (laser direct image) technology.
[0144] FIG. 11 shows a component carrier 100 with an enlarged first metal trace 110 arranged between a plurality of second metal traces 120 according to an exemplary embodiment of the disclosure. The first metal trace 110 is larger in width than the adjacent second metal traces 120. In this example, the enlarged first metal trace 110 is configured in a non-functional electrically conductive manner and serves rather for stability of the component carrier 100. Alternatively, the enlarged first metal trace 110 comprises a function of transferring heat (e.g. heat sink). In the alternative arrangement the enlarged first metal trace 110 can transmit current (e.g. is electrically functional), as well as provide a large anchor area for improving adhesion.
[0145] FIG. 12 shows a component carrier having first metal traces 110 with different roughness according to an exemplary embodiment of the disclosure. The component carrier 100 comprises two peripheral portions 1201 arranged at the edges of the component carrier 100 and a central portion 1202 in between the peripheral portions 1201. The surface roughness of first metal traces 110b at the peripheral portion 1201 of the component carrier 100 is larger than the surface roughness of first metal traces 110a at the central portion 1202 of the component carrier 100. Thereby, adhesion can be especially promoted in the peripheral region, where stability and robustness can be crucial. In turn, first metal traces 110a with a lower roughness at the center can be used as a compromise between stable design and accuracy of signal transmission.
REFERENCE SIGNS
[0146] 100 Component carrier [0147] 102 Electrically insulating layer structure, support structure [0148] 104 Electrically conductive layer structure, metal trace [0149] 105 Metal layer [0150] 110 First metal trace [0151] 111 Rough surface [0152] 120 Second metal trace [0153] 121 Smooth surface [0154] 122 Rough surface second metal trace [0155] 123 Further second metal trace [0156] 130 Protection material/layer/structure [0157] 135 Encapsulating material [0158] 140 Dielectric material [0159] 141 First dielectric material [0160] 142 Second dielectric material [0161] 144 Gaps [0162] 150 Laser energy [0163] 165 Sinter paste [0164] 166 Prepreg layer [0165] 170 Closed waveguide [0166] 180 Cavity [0167] 190 Further cavity, open waveguide [0168] 1201 Peripheral region [0169] 1202 Central region
