COMPOSITE CAVITY AND FORMING METHOD THEREOF
20170044006 ยท 2017-02-16
Inventors
Cpc classification
B81C1/00396
PERFORMING OPERATIONS; TRANSPORTING
B81B2201/0257
PERFORMING OPERATIONS; TRANSPORTING
B81C2201/0198
PERFORMING OPERATIONS; TRANSPORTING
B81C2201/0132
PERFORMING OPERATIONS; TRANSPORTING
B81B7/02
PERFORMING OPERATIONS; TRANSPORTING
B81B2203/0127
PERFORMING OPERATIONS; TRANSPORTING
B81C2201/019
PERFORMING OPERATIONS; TRANSPORTING
B81C2201/053
PERFORMING OPERATIONS; TRANSPORTING
International classification
B81B7/02
PERFORMING OPERATIONS; TRANSPORTING
Abstract
There is provided a method for forming a composite cavity and a composite cavity formed using the method. The method comprises the following steps: providing a silicon substrate (101); forming an oxide layer on the front side thereof; patterning the oxide layer to form one or more grooves (103), the position of the groove (103) corresponding to the position of small cavity (109) to be formed; providing a bonding wafer (104), which is bonded to the patterned oxide layer to form one or more closed micro-cavity structures (105) between the silicon substrate (101) and the bonding wafer (104); forming a protective film (106) over the bonding wafer (104) and forming a masking layer (107) on the back side of the silicon substrate (101); patterning the masking layer (107), the pattern of the masking layer (107) corresponding to the position of a large cavity (108) to be formed; using the masking layer (107) as a mask, etching the silicon substrate (101) from the back side until the oxide layer at the front side thereof to form the large cavity (108) in the silicon substrate (101); and using the masking layer (107) and the oxide layer as a mask, etching the bonding wafer (104) from the back side through the silicon substrate (101) until the protective film (106) thereover to form one or more small cavities (109) in the bonding wafer (104). The uniformity of thickness of the semiconductor medium layer where the small cavity (109) in the composite cavity is located is well controlled by the present invention.
Claims
1. A method for forming a composite cavity, comprising: A. providing a silicon substrate; B. forming a silicon dioxide layer on the front side of said silicon substrate; C. patterning said silicon dioxide layer to form one or more grooves, the position of said groove corresponding to the position of small cavity to be formed in step H; D. providing a bonding wafer, and bonding said bonding wafer with said patterned silicon dioxide layer to close said groove, so as to form one or more closed micro-cavity structures between said silicon substrate and said bonding wafer; E. forming a protective film over said bonding wafer, and forming a masking layer on the back side of said silicon substrate; F. patterning said masking layer, the pattern of said masking layer corresponding to the position of a large cavity to be formed in step G; G. using said masking layer as a mask, etching said silicon substrate from the back side until said silicon dioxide layer at the front side, and forming said large cavity in said silicon substrate; H. using said masking layer and said silicon dioxide layer as a mask, etching said bonding wafer from the back side through said silicon substrate until said protective film thereover so as to form one or more said small cavities in said bonding wafer, said large cavity and said small cavity constituting said composite cavity.
2. The method for forming a composite cavity according to claim 1, wherein said silicon dioxide layer is formed by thermal oxidation or chemical vapour deposition.
3. The method for forming a composite cavity according to claim 2, wherein said silicon dioxide layer is patterned by dry etching or wet etching.
4. The method for forming a composite cavity according to claim 3, wherein the material of said bonding wafer is monocrystalline silicon, polycrystalline silicon or glass.
5. The method for forming a composite cavity according to claim 4, wherein the material of said masking layer is a photoresist or a semiconductor medium.
6. A composite cavity formed using the method according to claim 1, comprising a large cavity and a small cavity, both with a downward opening, wherein said large cavity passes through and is formed in the silicon substrate; a patterned silicon dioxide layer as the bottom of said large cavity is formed on the front side of said silicon substrate; the pattern of said silicon dioxide layer corresponds to the position of said small cavity; a bonding wafer is formed over said silicon dioxide layer; said small cavity passes through and is formed in said bonding wafer and is in communication with said large cavity; and a protective film as the bottom of said small cavity is formed over said bonding wafer.
7. The composite cavity according to claim 6, wherein said silicon dioxide layer (102) is formed by thermal oxidation or chemical vapour deposition.
8. The composite cavity according to claim 7, wherein said silicon dioxide layer is patterned by dry etching or wet etching.
9. The composite cavity according to claim 8, wherein the material of said bonding wafer is monocrystalline silicon, polycrystalline silicon or glass.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The above-mentioned and other features, properties and advantages of the present invention will become more apparent from the following description of embodiments with reference to the accompany drawings, in which:
[0028]
[0029]
DETAILED DESCRIPTION
[0030] The present invention will be further described below in conjunction with particular embodiments and the accompanying drawings, and more details are explained in the following description, in order to fully understand the present invention; however, the present invention can obviously be implemented differently from what is described herein; a person skilled in the art can make similar extensions and deductions without departing from the connotation of the invention according to practical applications; and therefore the scope of protection of the present invention should not be limited to the contents of the particular embodiments herein.
An Embodiment of a Method for Forming a Composite Cavity
[0031]
[0032] The process flow of the composite cavity mainly comprises the following steps.
[0033] The first step, as shown in
[0034] The second step, as shown in
[0035] The third step, as shown in
[0036] The fourth step, as shown in
[0037]
[0038] The fifth step, as shown in
[0039] The sixth step, as shown in
[0040] The seventh step, as shown in
[0041] The eighth step, as shown in
The Embodiment of Composite Cavity
[0042] This embodiment can be formed using the above-mentioned method embodiment and uses the reference numbers of elements and part of contents of the preceding embodiment, wherein the same reference numbers are used to denote the same or similar elements, and the description of the same technical content is selectively omitted.
[0043] See
[0044] In this embodiment, the silicon dioxide layer 102 may be formed by oxidation or chemical vapour deposition; and the silicon dioxide layer 102 may be patterned by dry etching or wet etching.
[0045] The present invention combines the advantages of the pure monocrystalline solution and pure polycrystalline solution for MEMS microphones and provides a method for forming a composite cavity having its own lower capacitor plate (i.e., the semiconductor medium layer where the small cavity is located) on the basis of the two solutions. The present invention is suitable for production, has low costs, and only needs to control the stress of a single layer of lower capacitor plate in technical aspect.
[0046] The present invention can well control the uniformity of the monocrystalline silicon lower capacitor plate, which is proved to be achievable and an economic technical solution as compared with the high-cost substrate preparing method of the solution using pure monocrystalline silicon. Moreover, in the present invention, the complicated problem of stress interaction in thermal process of the double-layer polycrystal in the existing technology is simplified to the stress control of a single-layer polycrystal, and the stability from batch to batch is also well improved.
[0047] The present invention has been disclosed above in terms of the preferred embodiments which are not intended to limit the present invention, and any person skilled in the art could make possible changes and alterations without departing from the spirit and scope of the present invention. Hence, any alteration, equivalent change and modification which are made to the above-mentioned embodiments in accordance with the technical substance of the present invention and without departing from the contents of the present invention, will fall within the scope of protection defined by the claims of the present invention.