OPTOELECTRONIC DEVICE AND METHOD FOR PRODUCING AN OPTOELECTRONIC DEVICE
20170047486 ยท 2017-02-16
Inventors
Cpc classification
H10H20/857
ELECTRICITY
H10H20/812
ELECTRICITY
H10F77/413
ELECTRICITY
H10D89/60
ELECTRICITY
H10F71/00
ELECTRICITY
H10F77/1248
ELECTRICITY
International classification
H01L31/0304
ELECTRICITY
H01L31/0232
ELECTRICITY
H01L33/62
ELECTRICITY
H01L33/00
ELECTRICITY
H01L31/0203
ELECTRICITY
H01L33/30
ELECTRICITY
H01L27/02
ELECTRICITY
H01L33/06
ELECTRICITY
H01L31/18
ELECTRICITY
H01L31/0352
ELECTRICITY
Abstract
An optoelectronic component (100) comprises an optoelectronic semiconductor chip (10), a first contact area (31) and a second contact area (32), which is laterally offset with respect to the first contact area and is electrically insulated therefrom, and a housing element (40). The first contact area (31) is electrically conductively connected to the first semiconductor layer (21) and the second contact area (32) is electrically conductively connected to the second semiconductor layer (22) of the optoelectronic semiconductor chip. The first contact area (31) and the second contact area (32) project beyond the optoelectronic semiconductor chip laterally in each case. The housing element (40) is fixed to the first contact area (31) and the second contact area (32) in regions in which the first contact area (31) and the second contact area (32) project beyond the optoelectronic semiconductor chip laterally in each case. The housing element surrounds the optoelectronic semiconductor chip at least partly. A surface of the housing element that faces the optoelectronic semiconductor chip is embodied as reflective at least in partial regions. A wall of the housing element has a cutout (61).
Claims
1. Optoelectronic device comprising an optoelectronic semiconductor chip, a first contact surface and a second contact surface that is laterally offset and electrically isolated from said first contact surface, and a housing element, wherein the optoelectronic semiconductor chip has a semiconductor body that comprises a semiconductor layer sequence containing an active region that is provided for generating and/or receiving radiation and is arranged between a first semiconductor layer and a second semiconductor layer, the first contact surface is connected to the first semiconductor layer in an electrically conducting manner, and the second contact surface is connected to the second semiconductor layer in an electrically conducting manner, the first contact surface and the second contact surface each protrude laterally from the optoelectronic semiconductor chip, the housing element is attached to the first contact surface and to the second contact surface in regions in which the first contact surface and the second contact surface respectively protrude laterally from the optoelectronic semiconductor chip, the housing element encloses at least part of the optoelectronic semiconductor chip, and a surface of the housing element that faces the optoelectronic semiconductor chip is designed to be reflective at least in portions, and at least one wall of the housing element comprises an opening.
2. Device according to claim 1, wherein the opening in the wall of the housing element is designed to accommodate a separate light guide element.
3. Device according to claim 1, wherein at least part of the housing element is made of a reflective material or at least a portion of the surface of the housing element that faces the optoelectronic semiconductor chip is formed by a layer of reflective material.
4. Device according to claim 1, wherein the housing element comprises a metal or comprises a glass coated at least partially by a reflective material.
5. Device according to claim 1, wherein a circuit for protecting the optoelectronic semiconductor chip from electrostatic discharge is arranged in a wall of the housing element.
6. Device according to claim 1, wherein the opening is arranged in a side wall of the housing element or in an end-face wall of the housing element.
7. Device according to claim 1, wherein the optoelectronic device has a height of less than 500 m.
8. Device according to claim 1, wherein the housing element comprises a frame element that at least partially encloses the optoelectronic semiconductor chip laterally.
9. Device according to claim 1, wherein the frame element exhibits singulation marks on its external side walls.
10. Device according to claim 1, which device also comprises a conversion element.
11. Device according to claim 1, wherein the semiconductor body comprises at least one recess, which extends through the second semiconductor layer and the active region into the first semiconductor layer, and which is filled at least partially with electrically conducting material.
12. Device according to claim 1, which device comprises an optical element, which is designed to couple radiation generated by the semiconductor chip into a light guide element.
13. Lighting unit comprising an optoelectronic device according to claim 1, and at least one light guide element, at least part of which is arranged in the at least one opening in the optoelectronic device.
14. Backlighting unit comprising an optoelectronic device according to claim 1, and at least one light guide element, at least part of which is arranged in the at least one opening in the optoelectronic device.
15. Method for producing an optoelectronic device comprising the following method steps: a) providing a base layer and patterning said base layer so as to produce a multiplicity of first and second contact strips; b) providing a patterned additional layer, which comprises a multiplicity of openings, and attaching the patterned additional layer to the base layer; c) providing a multiplicity of optoelectronic semiconductor chips, each of which optoelectronic semiconductor chips has a semiconductor body that comprises a semiconductor layer sequence containing an active region that is provided for generating and/or receiving radiation and is arranged between a first semiconductor layer and a second semiconductor layer; d) mounting each of the optoelectronic semiconductor chips to the base layer through one each of the openings in the patterned additional layer, so that one of the first contact strips is connected to the first semiconductor layer in an electrically conducting manner, and one of the second contact strips is connected to the second semiconductor layer in an electrically conducting manner; e) forming a cover element in the region of each of the openings in the additional layer; and f) singulating into a multiplicity of optoelectronic devices, each device comprising a semiconductor chip, a portion of the additional layer as frame element, a portion of one of the first contact strips as first contact surface, a portion of one of the second contact strips as second contact surface, and a cover element.
16. Optoelectronic device comprising an optoelectronic semiconductor chip, a first contact surface and a second contact surface that is laterally offset and electrically isolated from said first contact surface, and a housing element made of metal or glass that has a reflective coating, wherein the optoelectronic semiconductor chip has a semiconductor body that comprises a semiconductor layer sequence containing an active region that is provided for generating and/or receiving radiation and is arranged between a first semiconductor layer and a second semiconductor layer, the first contact surface is connected to the first semiconductor layer in an electrically conducting manner, and the second contact surface is connected to the second semiconductor layer in an electrically conducting manner, the first contact surface and the second contact surface each protrude laterally from the optoelectronic semiconductor chip, the housing element is attached to the first contact surface and to the second contact surface in regions in which the first contact surface and the second contact surface respectively protrude laterally from the optoelectronic semiconductor chip, the housing element encloses at least part of the optoelectronic semiconductor chip, and a surface of the housing element that faces the optoelectronic semiconductor chip is designed to be reflective at least in portions, wherein the housing element comprises a frame element that at least partially encloses the optoelectronic semiconductor chip laterally, and at least one wall of the housing element comprises an opening.
Description
[0042] Further features, embodiments and advantages are given in the following description of the exemplified embodiments in conjunction with the figures, in which:
[0043]
[0044]
[0045]
[0046]
[0047]
[0048]
[0049]
[0050] In the figures, the same reference numbers are used to denote identical, similar or equivalent elements.
[0051] The figures and the relative sizes of the elements illustrated in the figures shall not be considered to be to scale. Indeed individual elements, in particular layer thicknesses, may be shown exaggeratedly large in order to improve visualization and/or understanding.
[0052]
[0053] The optoelectronic device, which is denoted as a whole by 100, comprises an optoelectronic semiconductor chip 10, which is mounted on a first contact surface 31 and on a second contact surface 32, which is laterally offset therefrom, such that on applying a voltage between the first contact surface 31 and the second contact surface 32, light is generated by the optoelectronic semiconductor chip 10. An electrically insulating elastic intermediate layer (not shown), which comprises an epoxy for instance, is optionally arranged between the first contact surface 31 and the second contact surface 32. The semiconductor chip 10 is embodied as a light-emitting diode chip. Alternatively, it can be embodied as a semiconductor laser, in particular as a laser diode chip.
[0054] The semiconductor chip 10 is a sapphire chip, which is mounted in a flip-chip configuration. In an operational use of the device, the two contact surfaces 31, 32 are mounted, for instance soldered, on a printed circuit board in an electrically conducting manner.
[0055] In greater detail, the semiconductor chip 10 comprises a semiconductor body 2 having a growth substrate 29, on which a semiconductor layer sequence is deposited. The semiconductor layer sequence comprises a first semiconductor layer 21 that faces the growth substrate 29, an active region 20 and a second semiconductor layer 22 on a face of the active region that faces away from the first semiconductor layer 21. The first semiconductor layer 21 and the second semiconductor layer 22 differ from one another in terms of conductivity type. For instance, the first semiconductor layer 21 may be designed to be n-type and the second semiconductor layer to be p-type, or vice versa. The first semiconductor layer 21 and the second semiconductor layer 22 can each comprise a plurality of sublayers.
[0056] The semiconductor layer sequence 24, in particular the active region 20, preferably contains a III-V compound semiconductor material, in the present exemplified embodiment contains gallium nitride.
[0057] III-V compound semiconductor materials are particularly suitable for generating radiation in the ultraviolet spectral range (Al.sub.xIn.sub.yGa.sub.1-x-yN) through the visible range (Al.sub.xIn.sub.yGa.sub.1-x-yN, in particular for blue to green radiation, or Al.sub.xIn.sub.yGa.sub.1-x-yP, in particular for yellow to red radiation) up to the infrared spectral range (Al.sub.xIn.sub.yGa.sub.1-x-yAs), where in each case 0x1, 0y1 and x+y1, in particular where x1, y1, x0 and/or y0. Furthermore, using III-V compound semiconductor materials, in particular those from the stated material systems, it is possible to achieve high internal quantum efficiencies in generating the radiation.
[0058] The active region 20 preferably comprises a pn-junction, a double heterostructure, a single quantum well (SQW) or, more preferably, a multi-quantum well (MQW) structure for the purpose of generating radiation. The term quantum well structure has no bearing here on the dimensionality of the quantization. Thus it includes, inter alia, not just quantum wells but also quantum wires and quantum dots and any combination of these structures.
[0059] A mirror layer 3 containing a metal or metal alloy is applied to the semiconductor layer sequence. The growth substrate 29 is made of sapphire in the present exemplified embodiment. The first contact surface 31 is connected to the first semiconductor layer 21 in an electrically conducting manner by a multiplicity of recesses 6 (of which only one is shown in
[0060] The walls of the recesses 6 are lined by an insulating material, preferably by an isolation layer. In addition, the recesses 6 are filled at least partially with electrically conducting material, thereby making the electrically conducting connection between the first contact surface 31 and the first semiconductor layer 21.
[0061] The recesses 6 are advantageously distributed over the extent of the semiconductor body 2. They are advantageously distributed uniformly in a grid, for instance like points of a lattice. Charge carriers can thus reach the first semiconductor layer 21 locally via the recesses 6 in a lateral distribution over the semiconductor body 2. The semiconductor material of the first semiconductor layer 21 advantageously has a higher conductivity in the lateral direction, i.e. parallel to the active layer 20, than the material that is used for the second semiconductor layer 22. Despite contact being made with the first semiconductor layer 21 only at points via the recesses 6, a homogeneous current distribution in the lateral direction can hence be achieved by means of current spreading in the semiconductor body 2. An injection of charge carriers over a large area in the active region 20 can thus be achieved despite the local injection of charge carriers. For nitride compound semiconductor materials, the n-type material often has a considerably higher conductivity in the lateral direction than the p-type material, for instance p-GaN. The first semiconductor layer 21 is thus preferably designed to be n-type, and the second semiconductor layer 22 is designed to be p-type. In the present exemplified embodiment, the first semiconductor layer 21 is made of n-GaN, and the second semiconductor layer 22 is made of p-GaN.
[0062] As shown in
[0063] Between the semiconductor chip 10 and the cover element 70 is arranged a conversion element 80, which directly adjoins the opening 61 and at least part of which is thereby arranged between the optoelectronic semiconductor chip and the opening.
[0064] The frame element 60 is made of a reflective metal in the exemplified embodiment shown. Thus the active layer of the semiconductor chip 10 is enclosed on every side by an element designed to be reflective (mirror layer 3, frame element 60 and cover element 70). The light generated by the sapphire chip 10 acting as a volume emitter can thus be coupled without losses into the light guide element 200 through the opening 61.
[0065] The intermediate layer 50 is made of an elastic plastics material, which is used not only for electrical insulation between the contact surfaces 31, 32 and the frame element 60, but can also absorb mechanical stresses that arise during fabrication of the device.
[0066] Alternatively, the frame element 60 can be made of glass that has a reflective coating, for instance of silver. In this case, the intermediate layer 50 can be designed to be either reflective or transparent. If the intermediate layer 50 has a transparent design, the contact surfaces 31, 32 are preferably made of a reflective metal or are themselves coated by a reflective layer, for instance of silver.
[0067]
[0068] The device 100 shown in
[0069] To give more precise details of the production method, a base layer made of metal is patterned so as to produce a multiplicity of first and second contact strips, which subsequently form in the singulated devices the first and second contact surfaces. A patterned additional layer made of metal and comprising a multiplicity of openings is then laminated onto the base layer such that the openings are each arranged vertically above the gaps between the first and second contact strips.
[0070] The optoelectronic semiconductor chips are then mounted on the base layer such that the connection shown in
[0071] Finally, singulation into a multiplicity of the optoelectronic devices shown in
[0072]
[0073]
[0074]
[0075] A cross-section of the longitudinal light guide 200 is circular in the exemplified embodiment shown, but can also be in the shape of a rectangle, triangle or ellipse.
[0076] The light guide 200, the light distribution plate 210 and the optoelectronic device 100 have a planar design and a maximum height of 300 m. The light guides 200 can be either connected directly to the light distribution plate 210 or optically coupled thereto, so that the light is distributed as uniformly as possible in the plane of the light distribution plate 210.
[0077] In an embodiment that is not shown, the longitudinal light guides 200 are integrated directly in the light distribution plate 210. In another embodiment that is not shown, the light is coupled through the optoelectronic device 100 into the light guide 200 without conversion. Conversion does not take place in the optoelectronic device 100 but takes place either in the region of the light guide 200 or even not until thereafter in the region of the light distribution plate 210, for instance by coating the light guide 200 or the light distribution plate 210 with a conversion material.
[0078] In another embodiment that is not shown, the light distribution plate 210 protrudes directly into the opening 61 of the optoelectronic device 100. The light generated in the optoelectronic device 100 is thus transmitted directly onto the light distribution plate 210. The longitudinal light guide 200 can hence be dispensed with. In this case, the light distribution plate 210 forms with the optoelectronic device 100 a self-contained back-lighting unit.
[0079] In the embodiments shown in
[0080] The embodiment shown in
[0081] The embodiment shown in
[0082] The embodiment shown in
[0083] The invention is not restricted by the description based on the exemplified embodiments. Instead, the invention includes every novel feature and every novel combination of features, which in particular includes every combination of features in the claims, even if this feature or combination is not itself explicitly mentioned in the claims or the exemplified embodiments.