Diffused junction termination structures for silicon carbide devices

Abstract

An electronic device includes a silicon carbide layer having a first conductivity type and a main junction adjacent a surface of the silicon carbide layer, and a junction termination region at the surface of the silicon carbide layer adjacent the main junction. Charge in the junction termination region decreases with lateral distance from the main junction, and a maximum charge in the junction termination region may be less than about 210.sup.14 cm.sup.2.

Claims

1. An electronic device, comprising: a silicon carbide layer having a first conductivity type and including a main junction adjacent a surface of the silicon carbide layer; and a junction termination region at the surface of the silicon carbide layer adjacent the main junction and having a second conductivity type that is opposite the first conductivity type, wherein a charge in the junction termination region decreases with lateral distance from the main junction, and wherein a maximum charge in the junction termination region is less than about 210.sup.14 cm.sup.2, wherein the charge in the junction termination region decreases smoothly with lateral distance from the main junction; wherein the junction termination region has a linearly graded doping profile that decreases in concentration laterally with distance from the main junction; and wherein a vertical depth of the junction termination region from a p-n junction between the junction termination region and an upper surface of the silicon carbide layer decreases with lateral distance from the main junction.

2. The electronic device of claim 1, wherein the junction termination region has a lateral width L.sub.JTE.

3. The electronic device of claim 1, wherein a maximum charge in the junction termination region is less than about 110.sup.14 cm.sup.2.

4. The electronic device of claim 1, wherein a maximum doping concentration in the junction termination region is about 510.sup.18 cm.sup.3.

5. The electronic device of claim 1, wherein a charge in the junction termination region near a surface of the silicon carbide layer decreases laterally in a smooth fashion from the maximum charge near the main junction down to about 510.sup.12 cm.sup.2.

6. The electronic device of claim 1, wherein the junction termination region is doped with aluminum and/or boron dopants.

7. The electronic device of claim 1, wherein the charge in the junction termination, region decreases smoothly with lateral distance from the main junction in a non-stepwise fashion without sharp changes.

8. The electronic device of claim 1, further comprising a semiconductor mesa at a surface of the silicon carbide layer, wherein, the junction termination region is adjacent the semiconductor mesa.

9. The electronic device of claim 8, wherein the semiconductor mesa has a height of about 0.2 m.

10. The electronic device of claim 1, wherein the junction termination region comprises a plurality of laterally overlapping diffused regions in the silicon carbide layer.

11. The electronic device of claim 10, wherein adjacent ones of the laterally overlapping diffused regions have diffusion depths that decrease with lateral distance from the main junction.

12. An electronic device, comprising: a silicon carbide layer having a first conductivity type and including a main junction adjacent a surface of the silicon carbide layer; a junction termination region at the surface of the silicon carbide layer adjacent the main junction, the junction termination region comprising a region of second conductivity type dopants that has a total charge of about 510.sup.12 cm.sup.2 or less in a region adjacent the primary junction, wherein the total charge in the junction termination region decreases with distance from the main junction in an approximately linear fashion, wherein the charge in the junction termination region decreases smoothly with lateral distance from the main junction; wherein the junction termination region has a linearly graded doping profile that decreases in concentration laterally with distance from the main junction and wherein a vertical depth of the junction termination region from a p-n junction between the junction termination region and an upper surface of the silicon carbide layer decreases with lateral distance from the main junction.

13. The electronic device of claim 12, wherein the charge in the junction termination region decreases smoothly with lateral distance from the main junction in a non-stepwise fashion without sharp changes.

14. The electronic device of claim 12, wherein the junction termination region comprises a plurality of laterally overlapping diffused regions in the silicon carbide layer.

15. The electronic device of claim 14, wherein adjacent ones of the laterally overlapping diffused regions have diffusion depths that decrease with lateral distance from the main junction.

Description

DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 illustrates a SiC PIN diodes with a conventional junction termination extension (JTE) termination.

(2) FIGS. 2A and 2B illustrate formation of a JTE termination according to some embodiments.

(3) FIG. 3 illustrates a silicon carbide layer including a plurality of diffused doped regions according to some embodiments.

(4) FIGS. 4A and 4B illustrate several different doping profiles of p-type dopants in 4HSiC as measured by secondary ion mass spectrometry (SIMS).

(5) FIG. 5 illustrates formation of a JTE termination according to some embodiments.

(6) FIG. 6 illustrates a PIN diode according to some embodiments.

(7) FIGS. 7A-7D illustrate exemplary mask layouts for forming JTE terminations according to some embodiments.

(8) FIG. 8 illustrates mask design principles according to some embodiments.

(9) FIG. 9 illustrates a simulated quasi-linear doping profile that can be generated using a mask pattern according to some embodiments.

DETAILED DESCRIPTION

(10) Embodiments of the present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout.

(11) It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.

(12) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms a, an and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises comprising, includes and/or including when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

(13) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

(14) It will be understood that when an element such as a layer, region or substrate is referred to as being on or extending onto another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly on or extending directly onto another element, there are no intervening elements present. It will also be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present.

(15) Relative terms such as below, above, upper, lower, horizontal, lateral, vertical, beneath, over, etc., may be used herein to describe a relationship of one element, layer or region to another element, layer or region as illustrated in the figures. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

(16) Embodiments of the invention are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. The thickness of layers and regions in the drawings may be exaggerated for clarity. Additionally, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a discrete change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.

(17) Some embodiments of the invention are described with reference to semiconductor layers and/or regions which are characterized as having a conductivity type such as n-type or p-type, which refers to the majority carrier concentration in the layer and/or region. Thus, n-type material has a majority equilibrium concentration of negatively charged electrons, while p-type material has a majority equilibrium concentration of positively charged holes. Some material may be designated with a + or (as in n+, n, p+, p, n++, n, p++, p, or the like), to indicate a relatively larger (+) or smaller () concentration of majority carriers compared to another layer or region. However, such notation does not imply the existence of a particular concentration of majority or minority carriers in a layer or region.

(18) As is described in more detail below, embodiments of the present invention may provide improved edge termination of semiconductor devices, such as P-N, Schottky, PiN or other such semiconductor devices. Particular embodiments of the present invention provide edge termination for silicon carbide (SiC) devices. For example, embodiments of the present invention may be utilized as edge termination for SiC Schottky diodes, junction barrier Schottky (JBS) diodes, PiN diodes, thyristors, transistors, or other such SiC devices.

(19) According to some embodiments, a junction termination extension that has a smoothly graded doping profile in both lateral and vertical directions can be provided in a silicon carbide device by controlled diffusion of dopants. As used herein, a smoothly graded doping profile refers to a doping profile that is graded in a non-stepwise fashion so that it is not characterized by having sharp changes in doping concentration. A smoothly graded doping profile may, for example, be graded in a linear, quasi-linear and/or log-linear fashion.

(20) The dopants may be provided adjacent a main or primary junction in a silicon carbide layer by diffusion or implantation through a plurality of openings in a mask formed on the silicon carbide layer. The openings may be formed to expose portions of the silicon carbide layer that have areas that decrease with distance from the junction. The silicon carbide layer may be annealed to cause the dopants introduced through the plurality of openings to diffuse out and form a single doped JTE region within the silicon carbide layer. Stated differently, doped regions in the silicon carbide layer corresponding to the mask openings are expanded by controlled diffusion so that they coalesce to form a single junction termination region that has a doping concentration that may be smoothly graded, and in some cases linearly or nearly linearly graded in the vertical and/or lateral directions. In particular embodiments, the JTE can extend a distance L.sub.JTE of about 200 m or more from a main junction area with a linearly graded doping profile that decreases laterally with distance from the main junction from about 510.sup.13 cm.sup.2 near the main junction down to about 510.sup.11 cm.sup.2 assuming a JTE depth of 0.5 m. Such a device may have superior junction termination characteristics compared to a conventional implanted JTE, which may require multiple masks for implantation and may not be able to obtain a linearly graded doping profile in a lateral dimension.

(21) Exemplary embodiments are illustrated in FIGS. 2A and 2B. Referring to FIGS. 2A and 2B, an n silicon carbide drift layer 12 is formed on an n+ silicon carbide substrate 14. The substrate 14 may include on- or off-axis silicon carbide of the 4H, 6H, 3C and/or 15R polytype. A graphite mask 52 including mask openings 56 and 54A to 54E is formed on a surface of the drift layer 12. The mask opening 56 corresponds to the location of a main junction of the device. For example, in a PIN device, the main junction would correspond to the PN junction through which a majority of conduction occurs in the forward operating state. It will be appreciated that in some devices, such as Schottky diodes, the main junction may include a metal-semiconductor junction instead of or in addition to a P-N junction.

(22) The mask openings 54A to 54E are located adjacent to the main junction, and are formed to expose areas of the surface of the drift layer 12 that decrease with lateral distance from the main junction. That is, the mask openings 54A to 54E that are closer to the main junction may be wider and/or spaced closer together than mask openings 54A to 54E that are farther away from the main junction, which may be smaller and/or spaced farther apart from one another.

(23) Each of the openings 54A to 54E has a first width Ld, and is spaced apart from an adjacent opening by a second width Lnd. As illustrated in FIGS. 2A and 2B, the first width Ld may decrease with lateral distance from the main junction, while the second width Lnd may increase with lateral distance from the main junction.

(24) Referring to FIG. 2A, in some embodiments, p-type dopants 50 may be introduced into the drift layer 12 by ion implantation to form doped regions 20A to 20E corresponding to the mask openings 54A to 54E, respectively. The doped regions 20A to 20E may have a doping profile in the vertical direction (perpendicular to the surface of the drift layer 12) that has a box, retrograde or buried profile.

(25) Ions may be implanted into the drift layer 12 to form doped regions 20A to 20E that have a sufficient amount of total charge to be diffused to form a desired JTE doping profile in the drift layer 12 during a subsequent thermal drive-in anneal. In some embodiments, the doped regions 20A to 20E may have a peak doping concentration prior to the drive-in anneal that is in excess of 10.sup.19 cm.sup.3. Exemplary implantation conditions that can be employed to obtain a desired amount of charge are shown in Table 1.

(26) Table 1 shows an implant schedule for obtaining a box profile of aluminum ions in 4HSiC having a peak doping concentration of about 110.sup.19 cm.sup.3.

(27) TABLE-US-00001 TABLE 1 Exemplary Ion Implantation Schedule Dose (cm.sup.2) Energy (keV) 2.0 10.sup.13 40 2.8 10.sup.13 80 4.3 10.sup.13 150

(28) As illustrated in FIG. 2B, p-type dopants may in some embodiments be introduced into the drift layer 12 by diffusion doping. Diffusion doping of silicon carbide is described, for example, in Y. Gao et al., Selective doping of 4HSiC by codiffusion of aluminum and boron, J. of Appl. Phys., col. 90, no. 11, pp. 5647-5651 (2001); S. I. Soloviev et al., Doping of 6HSiC by selective diffusion of boron, Appl. Phys. Letters, vol. 77, no. 4, pp. 4004-4006 (2000); and Y. Gao, et al., Investigation of boron diffusion in 6HSiC, Appl. Phys. Letters, vol. 83, no. 5, pp. 905-907 (2003).

(29) Diffusion doping of SiC may have some advantages compared to ion implantation. In particular, diffusion doping does not introduce radiation damage to the SiC lattice. Diffusion doping also may be suitable for forming deep, linearly graded p-n junctions in SiC. Furthermore, diffused boron is able to compensate n-type doping, forming a buried intrinsic layer. However, diffusion doping of SiC requires extremely high processing temperatures, e.g., above 1800 C., which can cause the SiC substrate being doped to physically degrade. Furthermore, it is desirable to establish equilibrium conditions of SiC source materials in the crucible to avoid or discourage either sublimation or epitaxial growth during the sublimation process.

(30) For example, in some embodiments, a silicon carbide substrate 14 including a silicon carbide drift layer 12 thereon may be exposed to a gas phase source of p-type dopants at a pressure of 500 Torr in an argon ambient at temperatures of from about 1800 C. to about 2200 C. for a time of about 5 to 30 minutes. In order to protect the surface of the drift layer 12, the mask 52 may include a graphite film on the surface of the drift layer. The diffusion process may be carried out in some embodiments using an inductively heated vertical quartz chamber with water-cooled walls.

(31) Boron and/or aluminum vapor can be generated by sublimation from solid sources. For example, boron can be sublimated from elemental boron, while aluminum can be sublimated from Al.sub.4C.sub.3. In particular embodiments, boron atoms may be doped into the drift layer 12, and the gas phase source may include 2.5% elemental boron.

(32) In order to sustain the equilibrium condition of the process, a graphite crucible with a mixture of silicon carbide powder and elemental boron (as a source of the doping atoms) may be used, with zero temperature gradient between the gas phase and the substrate. Once the equilibrium condition is established inside the crucible, the velocity of sublimation and epitaxial growth of SiC on the substrate 14 may be equal, and the p-type impurities will be diffused into the drift layer 12. Diffusion of the impurities into the drift layer 12 is believed to be aided by silicon vacancies in the SiC layer.

(33) Unintentional diffusion of boron on the back side of the substrate 14 opposite the drift layer 12 can be removed by lapping the substrate with a diamond paste. Furthermore, after diffusion, the graphite mask 52 can be removed by burning in an oxygen environment.

(34) Following formation of the doped regions 20A to 20E through ion implantation and/or diffusion of dopants, a drive-in anneal is performed to diffuse the dopants into the drift layer 12 to form a graded JTE profile 25 that is relatively smoothly graded from a high doping concentration to a low doping concentration in both the lateral (X) and vertical (Y) directions, as illustrated in FIG. 3. In some embodiments, the doped regions 20A to 20B may be annealed at a temperature greater than 1600 C., and in some embodiments greater than 1800 C. The doped regions may be annealed for 5 minutes or more, and in some embodiments for 30 minutes or more. In particular embodiments, the doped regions 20A to 20B may be annealed at a temperature of about 1800 C. for about 30 minutes. A blanket graphite cap layer 55 may be formed on the surface of the drift layer 12 prior to the anneal to protect the surface of the drift layer 12.

(35) During the drive-in anneal process, dopants in the doped regions 16 and 20A to 20E diffuse further into the drift layer 12. For example, dopants in the doped region 16 diffuse out to form doped region 216. Similarly, dopants in the doped region 20A diffuse out to form doped region 24A, dopants in the doped region 20B diffuse out to form doped region 24B, etc. However, even after the drive-in anneal, non-diffused dopant concentration peaks 22A-22E remain in a near-surface region of the drift layer 12. In particular, when the doped regions 20A to 20E are formed in a layer of silicon carbide or another semiconductor material in which dopants do not readily diffuse, dopant concentration peaks may remain even after the drive-in anneal.

(36) The diffused doped regions 24A to 24E merge together to form a continuously doped JTE region 23 that has a doping concentration that may decrease smoothly with lateral distance from the main junction as well as with vertical distance from the surface of the drift layer 12. For example, curves 25 and 26 represent curves of relatively constant p-type doping concentration in the drift layer 12. The doping concentration along curve 26 is less than the doping concentration along curve 25. A PN junction is formed along the contour where the p-type doping concentration of the JTE region 23 is equal to the n-type doping concentration of the drift layer 12.

(37) In the case of boron, the diffusion coefficient in SiC is 4 to 5 times higher in the lateral direction than in the vertical (c-axis) direction. Thus, the lateral diffusion of boron may provide a good overlap, or lateral merging, of diffused regions in the lateral direction, resulting in the formation of larger regions with smaller average doping compared to, for example, blanket diffusion of dopants. That is, in blanket diffusion of dopants (i.e., only a single JTE opening is used), the dopants may diffuse laterally by a certain distance, but the average doping may not decrease significantly as a result of this lateral diffusion. In contrast, when multiple JTE openings are used, more of the resulting JTE region is doped due to lateral diffusion of dopants, resulting in smaller average doping in the JTE region.

(38) Several different doping profiles of p-type dopants in 4HSiC as measured by secondary ion mass spectrometry (SIMS) are illustrated in FIG. 4A. In particular, FIG. 4A illustrates four different doping profiles of boron in 4HSiC. Details of the profiles are shown in Table 2.

(39) TABLE-US-00002 TABLE 2 Exemplary Doping Conditions Curve Doping Type Anneal Temperature ( C.) 82 Implantation 1800 92 Diffusion 1800 94 Diffusion 1900 96 Diffusion 2000

(40) Referring to FIG. 4A, the initial charge of boron in the silicon carbide diffusion was determined by the pressure and temperature in the quartz reactor in the case of curves 92, 94, and 96. In the case of curve 82, the initial charge was provided and precisely controlled by ion implantation, and the doped silicon carbide layer was annealed at a temperature of 1800 C. for five minutes in an atmosphere of argon to redistribute and activate the dopants.

(41) As is apparent from FIG. 4A, the dopant profile extends deeper for higher diffusion temperatures. However, the peak concentration of dopants near the surface of the silicon carbide layer remains relatively high in each case. Such a high concentration of dopants may be undesirable in a junction terminal extension, because the JTE region may not become fully depleted at the design blocking voltage. However, beyond the regions of peak concentration near the surface, the dopant concentrations in each case decrease with depth in a generally log-linear fashion.

(42) FIG. 4B illustrates several diffusion doping profiles of p-type dopants in 4HSiC as measured by SIMS. Each curve represents a doping profile for a SiC layer diffusion doped with a gas phase source including 2.5% boron at a pressure of 500 torr for 5 minutes. The diffusion temperature was varied for each sample. Curve 102 represents a diffusion at 1800 C., while curves 104 and 106 represent diffusions at 1900 C., and curve 108 represents a diffusion at 2000 C. A significant drive-in diffusion was performed in an argon atmosphere at a temperature of 1800 C. for 5 minutes to redistribute the dopants. The total charge in the silicon carbide layer represented by curve 102 is 4.77610.sup.13 cm.sup.2. The total charge in the silicon carbide layer represented by curve 104 is 6.70210.sup.14 cm.sup.2, while the total charge in the silicon carbide layer represented by curve 106 is 7.47510.sup.14 cm.sup.2. Finally, the total charge in the silicon carbide layer represented by curve 108 is 2.03010.sup.15 cm.sup.2.

(43) In order to reduce or avoid a problem of less than full depletion at the design blocking voltage, a surface portion of the drift layer 12 may be removed, for example, by selective etching. Referring to FIG. 5, an etch mask 56, which may be photoresist, is formed on the drift layer 12 over the main junction of the device, and the highly doped surface portion of the drift layer 12 is selectively etched away. In some embodiments, about 0.2 m of material may be etched from the surface of the drift layer 12. Selective etching may be performed, for example, using reactive ion etch techniques which are well known in the art.

(44) A semiconductor mesa 40 is thereby formed to define the main junction of the device that includes the highly doped region 16, while a graded JTE region 23 with a much lower peak concentration of p-type dopants is defined, because the surface region of the drift layer 12 with a high concentration of p-type dopants has been removed. The mesa 40 may have a height of about 0.2 m. The graded JTE region 23 may extend laterally from the mesa by a distance L.sub.JTE. The surface doping concentration in the JTE region 23 may be greatest near the main junction of the device, and may decrease laterally outward from the junction.

(45) In some embodiments, the JTE region 23 may have a maximum concentration of p-type dopants that permits the JTE region 23 to be fully depleted at the design blocking voltage. In particular embodiments, the JTE region 23 may have a maximum charge of p-type dopants that is about 110.sup.14 cm.sup.2 or less, depending on how much of the drift layer is removed. In further embodiments, the JTE region 23 may have a maximum charge of p-type dopants that is about 210.sup.13 cm.sup.2 or less, and in some embodiments about 110.sup.13 cm.sup.2 or less. Furthermore, the charge of p-type dopants in the JTE region 23 may decrease laterally in a smooth fashion from the maximum charge near the main junction down to about 510.sup.12 cm.sup.2 at a point distal from the main junction.

(46) In some embodiments, the surface doping charge in the JTE region 23 may decrease from about 110.sup.14 cm.sup.2 near the main junction down to about 110.sup.13 cm.sup.2 at the outer edge of the JTE region 23.

(47) In some embodiments, the surface doping concentration in the JTE region 23 may decrease from about 510.sup.17 cm.sup.3 near the main junction down to about 10.sup.16 cm.sup.3 at the outer edge of the JTE region 23. In still further embodiments, the surface doping concentration in the JTE region 23 may decrease from about 10.sup.17cm.sup.3 near the main junction down to about 10.sup.16 cm.sup.3 at the outer edge of the JTE region 23.

(48) In some embodiments, the JTE region may have a total charge near the main junction of about 210.sup.13 cm.sup.2, and in some embodiments, a total charge near the main junction of about 510.sup.12 cm.sup.2.

(49) Accordingly, a JTE region 23 that has a peak doping concentration that permits the JTE region 23 to be fully depleted at the design blocking voltage and that has a graded dopant profile that decreases in a relatively smooth fashion both laterally and vertically with distance from the main junction can be formed using only a single masking step, a single doping step and a single drive-in diffusion step.

(50) FIG. 6 illustrates a completed device including an anode contact 20 and a cathode contact 21 on the p-type region 16 and the substrate 14, respectively. The graded doping profile of the JTE region 23 in both lateral and vertical directions is indicated by shading in the device illustrated in FIG. 6.

(51) As noted above, in order to provide a JTE region 23 that has a graded doping concentration in both the lateral and vertical directions, the amount of charge in the doped regions 20A-20E can be reduced with distance from the main junction. For both ion implantation and diffusion doping, the amount of charge that is doped into the drift layer 12 can be controlled by varying the size, shape, spacing and/or distribution of the doped regions 20A-20E. The size, shape, spacing and distribution of the doped regions 20A-20E is determined by the size, shape, spacing and/or distribution of the mask openings 54A-54E shown in FIG. 2A. Masks having various patterns of mask openings 54A-54E can be used. For example, the mask patterns 52A-52D shown in FIGS. 7A-7D include mask openings 54 (light areas) that expose progressively smaller areas of an underlying drift layer with distance from a main junction.

(52) As illustrated in FIGS. 7A-7D, the mask openings 54 can be any geometric shape, such as linear, square, triangular, curvilinear, etc. In each case, the density and/or size of the mask openings can be reduced with distance from the main junction to expose smaller and smaller amounts of the drift layer 12. In this manner, the doped regions in the drift layer corresponding to the mask openings 54 will contain smaller and smaller amounts of total charge assuming that they are doped from the same implantation and/or gas phase source.

(53) Referring to FIG. 8, in some embodiments, the doping mask 52 can include generally linear mask openings 54. Each of the generally linear mask openings 54 may have a lateral width Ld, and may be spaced apart from an adjacent opening 54 by a width Lnd. In some embodiments, the doping mask 52 can be organized into a plurality of zones based on distance from the main junction area, illustrated in FIG. 8 as Zones 1 to 3. In a given zone, the lateral width Ld of the mask openings 54 may decrease with distance from the main junction and/or the lateral width Lnd between adjacent mask openings 54 may increase with distance from the main junction area.

(54) For example, in the embodiments illustrated in FIG. 8, in Zone 1, which in FIG. 8 is closest to the main junction area, the lateral width Ld of the mask openings 54 decreases with distance from the main junction, while Lnd remains constant. In the next zone, Zone 2, the lateral width Lnd between adjacent mask openings 54 increases with distance from the main junction, while the lateral width Ld of the mask openings 54 remains constant. In Zone 3, the lateral width Lnd between adjacent mask openings 54 increases with distance from the main junction by an increasing amount with each step, while the lateral width Ld of the mask openings 54 remains constant and/or decreases.

(55) In some particular embodiments, in Zone 1, the lateral width Ld of the mask openings 54 may start at 2.5 m close to the junction, and may decrease in 0.05 m steps down to 1 m with increasing distance from the main junction, while the width Lnd between adjacent mask openings 54 may remain constant at 2 m.

(56) In Zone 2, the lateral width Ld of the mask openings 54 may remain constant at 1 m, while the width Lnd between adjacent mask openings 54 may increase in 0.2 m steps with increasing distance from the main junction.

(57) In Zone 3, the lateral width Ld of the mask openings 54 may remain constant at 1 m, while the lateral width Lnd between adjacent mask openings 54 increases with distance from the main junction by an amount Lnd that increases with each step. For example, in Zone 3, Lnd may increase in steps from 3.6 m to 4.4 m (Lnd=0.8 m), then from 4.4 M to 5.4 m (Lnd=1.0 m), then from 5.4 m to 6.6 m (Lnd=1.2 m), etc. It will be appreciated that although a general pattern as described above may be employed to provide decreasing levels of charge in the JTE region with distance from the main junction, there may be some deviations in the pattern while still achieving a generally linearly graded JTE region.

(58) In particular embodiments, the mask 54 can be designed to provide a doping profile in the JTE region that decreases with distance from the junction in a linear, non-linear, or nearly linear fashion depending on the doping and/or annealing conditions. For example, a simulated doping profile that decreases in a quasi-linear fashion and that can be generated using a mask pattern as described above is illustrated in FIG. 9. The simulated doping profile shown in FIG. 9 is based on an anneal of a doped silicon carbide layer at 1800 C. for 30 minutes.

(59) It will be appreciated that a junction termination extension as described above can be used in connection with many different kinds of unipolar and/or bipolar power devices, such as metal-oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), gate turn-off thyristors (GTOs), bipolar junction transistors (BJTs), MOS controlled thyristors (MCTs), PIN diodes, Schottky diodes, junction barrier Schottky (JBS) diodes, and others. Furthermore, a junction termination extension as described above can be used in connection with power devices fabricated using other semiconductor materials. For example, a junction termination extension as described herein could be used in connection with power devices fabricated using other wide bandgap semiconductor materials, such as gallium nitride based materials, or other semiconductor materials, such as silicon, germanium, gallium arsenide, etc.

(60) In the drawings and specification, there have been disclosed typical preferred embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.