Method for reducing a number of switching cycles when controlling a multiphase converter

Abstract

A method for controlling a polyphase inverter that includes a number of half bridges connected into an intermediate voltage circuit and center taps between switching elements. By cyclically switching the switching elements, the respective center taps of the half bridges are connected to an upper intermediate circuit rail or to a lower intermediate circuit rail of the intermediate voltage circuit according to the principle of pulse width modulation. The switching elements of at least one half bridge are driven in a modified manner, at least in some time intervals, in that the switching pulses of at least two consecutive periods of the pulse width modulation are concatenated directly in time as one switching pulse. In this way, the switching frequencies of the correspondingly driven switching elements and thus the switching losses of the latter can be further reduced.

Claims

1. A method of controlling a polyphase inverter, the polyphase inverter having a plurality of half bridges switched into a DC link with an upper busbar and a lower busbar, having switching elements, and center taps between the switching elements, the method comprising: by clocked switching of the switching elements with pulse width modulation, connecting respective center taps of the half bridges to the upper busbar or to the lower busbar of the DC link; and driving the switching elements of at least one half-bridge in modified form at least during given time segments by temporally arranging the switching pulses of at least two successive periods of the pulse width modulation directly next to one another as one switching pulse; wherein a number of switching cycles is reduced when performing the step of driving the switching elements of the at least one half-bridge in the modified form in comparison to a situation where the switching elements of the at least one half-bridge is not driven in the modified form.

2. The method according to claim 1, which comprises driving the switching elements of at least one half bridge in modified form by arranging the switching pulses of at least three successive periods temporally directly next to one another as one switching pulse.

3. The method according to claim 1, which comprises driving the switching elements of different half bridges in modified form at different times.

4. The method according to claim 1, which comprises, at least in time segments, simultaneously driving the switching elements of a plurality of half bridges in modified form.

5. The method according to claim 1, which comprises performing the step of driving the switching elements of the at least one half-bridge in the modified form at least during the given time segments depending on a parameter characterizing an AC user connected to the inverter.

6. The method according to claim 1, which comprises controlling a three phase inverter.

7. The method according to claim 1, which comprises effecting the modified control and the regular control in temporal alternation.

8. The method according to claim 1, which comprises increasing a clock frequency of the pulse width modulation at least during the time segments of the modified control.

9. The method according to claim 4, which comprises driving the switching elements of the respectively other half bridges by shortening a time interval of the switching pulses corresponding to an original time interval of the switching pulses arranged next to one another in periods of a modified control.

10. The method according to claim 5, wherein the parameter is a parameter characterizing a load state and/or an operating state of the AC user.

11. The method according to claim 6, which comprises operating the three phase inverter using a modulation method selected from the group consisting of three phase clocking, two phase clocking, and single phase clocking, and thereby driving, at least in time segments, the switching elements of at least one of the respectively clocked half bridges in modified form.

12. The method according to claim 1, which comprises, at least in time segments, driving in modified form the switching elements of a given half-bridge whose center tap is presently being switched with a greatest duty factor.

13. The method according to claim 11, which comprises operating the three phase inverter using a modulation method of three phase clocking or two phase clocking, and thereby driving, at least in time segments, the switching elements of two clocked half bridges in modified form.

14. The method according to claim 12, which comprises driving the switching elements of the respectively other half bridges by shortening a time interval of the switching pulses corresponding to an original time interval of the switching pulses arranged next to one another in periods of a modified control.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

(1) The exemplary embodiments of the invention will be explained in more detail with reference to a drawing, in which:

(2) FIG. 1 shows the circuit diagram of a known three-phase inverter,

(3) FIG. 2 shows a hexagon illustration of the space vector modulation of a three-phase inverter,

(4) FIGS. 3-8 show the respective time characteristic of the pulse control factors of the half-bridges, the selected zero system and the phase differential signal for various modulation methods,

(5) FIG. 9 shows the various modulation methods for a three-phase inverter, in each case as an instantaneous illustration of a PWM period,

(6) FIG. 10 shows, for various modulation methods of a three-phase inverter, instantaneous illustrations of a PWM period with modified control method,

(7) FIG. 11 shows, for various modulation methods of a three-phase inverter, instantaneous illustrations of a PWM period with modified control, wherein switching pulses of three successive periods are arranged next to one another,

(8) FIGS. 12-14 show various time sequences of switching pulses for a three-phase inverter using the modified control method.

DESCRIPTION OF THE INVENTION

(9) FIGS. 1-2 and 3-8 are already explained in detail in connection with the description of the invention. Correspondingly, reference is made to the passages of the description in this regard.

(10) FIG. 9 shows an instantaneous illustration of a PWM period of a PWM signal for driving a three-phase inverter corresponding to FIG. 1. The period duration T.sub.p is shown. FIG. 9 shows four different modulation methods of the three-phase inverter corresponding to the illustrated variants a), b), c) and d). For each of the illustrated variants, the three phases are labeled by their phase voltages U.sub.a, U.sub.b and U.sub.c. Furthermore, the respective on times .sub.a, .sub.b, .sub.b corresponding to FIGS. 3-8 or corresponding to the above description within a period are illustrated as switching pulses of different duration. The ratio of the pulse duration to the period duration T.sub.p gives the desired duty factor and therefore the voltage set on average on the corresponding phase. A switching pulse , in accordance with the above-described definitions, corresponds to switching of the center tap of the corresponding half-bridge to the upper DC link busbar. Outside the switching pulse, has the value zero, with the result that, in these regions of the illustrated period, the center tap of the respective half-bridge is clamped to the lower DC link busbar.

(11) The variant a) shown in FIG. 9 corresponds to the modulation method of three-phase clocking for an inverter corresponding to FIG. 1. At any time and in particular at the present time illustrated, all three phases or all three half-bridges are clocked. Switching pulses occur in all phases of the PWM signals.

(12) Variants b) and c) correspond to modulation methods of two-phase clocking, as are illustrated in FIGS. 6 and 7. According to variant b), a phase (identified by U.sub.c) is clamped permanently to the lower DC link busbar. The other phases U.sub.a and U.sub.b are clocked. Variant b) therefore corresponds to the modulation method of two-phase clocking as shown in FIG. 7.

(13) In variant c), the phases U.sub.b and U.sub.c are clocked. In segments (in the present case at the present time illustrated), the phase U.sub.a or the center tap of the corresponding half-bridge is clamped to the upper DC link potential. Variant c) corresponds to the modulation method of two-phase clocking, as is shown in FIG. 6.

(14) According to variant d), two phases (U.sub.a, U.sub.c) or the center taps of the corresponding half-bridges are clamped to the upper and lower DC link busbar, respectively. Only one phase (identified by U.sub.b) is clocked. Variant d) corresponds to the modulation method of single-phase clocking, as is illustrated in FIG. 8.

(15) In addition, computation specifications are illustrated in FIG. 9 in respect of how the pulse control factors .sub.a, .sub.b, .sub.c of the respective modulation methods result from the corresponding pulse control factors of the symmetrical modulation method of three-phase clocking.

(16) FIG. 10 illustrates, in two illustrations next to one another, two successive periods of a PWM signal corresponding to FIG. 9. The phases, the on times and the period durations are labeled correspondingly.

(17) In FIG. 10, in the illustration on the left, variants a), b) and c) of various modulation methods for a three-phase inverter are illustrated for better understanding once again corresponding to FIG. 9. The further variants represent a modified control method, wherein switching pulses of successive periods are arranged next to one another to form a single switching pulse, as a result of which the switching frequency of the switching elements and correspondingly the switching losses are reduced.

(18) In variants a.sub.1), b.sub.1) and c.sub.1), the switching pulses of that phase which is driven at the greatest duty factor are arranged next to one another. Corresponding to the pushed-together distance of these longest switching pulses, the switching pulses of the respective other phases are also pushed against one another. In variant a.sub.1) and b.sub.1), in each case the switching pulses of the phases U.sub.a are pushed against one another and combine to form a single switching pulse. The switching pulses of the respective other phases are temporally arranged close to one another correspondingly. A measurement of the phase currents corresponding to the topology shown in FIG. 1 is further possible in clock with the pulse width modulation.

(19) In variant c.sub.1), the switching pulses of two adjacent periods for the phase U.sub.b are pushed against one another and combine to form a single switching pulse. The switching pulses in the phase U.sub.c come temporally closer to one another. The measurement of the phase currents is no longer possible in clock with the pulse width modulation since the distance between those regions in which at least two half-bridges are clamped onto the lower DC link busbar (a zero value occurs within the period) is increased.

(20) In variants a.sub.2), b.sub.2) and c.sub.2), in addition the switching pulses of the adjacent period of a further phase are pushed against one another. In variants a.sub.2) and b.sub.2), these switching pulses are the switching pulses of the phases U.sub.b. In variant c.sub.2), these are the switching pulses of the phase U.sub.c.

(21) Variants a.sub.3), b.sub.3) and c.sub.3) differ from variants a.sub.1), b.sub.1) and c.sub.1) in that the switching pulses remain without any temporal displacement in the phases driven without any modification.

(22) FIG. 11 illustrates the instantaneous state for three successive periods of the pulse width modulation. In variants a), b) and c), the switching pulses of the respective phase or half-bridge driven at the greatest duty factor of three successive periods are arranged next to one another and combine to form a single switching pulse. The switching pulses of the respective other phases are shifted toward one another with the same temporal offset. It is clear that, in the phase driven with modification, the switching frequency is reduced by a third.

(23) In variants a.sub.1), b.sub.1) and c.sub.1), the switching pulses of in each case one further active phase are likewise arranged next to one another and combine to form a single switching pulse. In variants a.sub.1) and b.sub.1), the switching frequencies and therefore the switching losses in the phases U.sub.b are additionally reduced by a third. In variant c.sub.1), the switching frequency and the switching losses are additionally reduced in the phase U.sub.c by a third.

(24) FIGS. 12-14 illustrate time sequences of PWM signals for driving the switching elements in the half-bridges of a three-phase inverter corresponding to FIG. 1. The switching signals for the individual half-bridges or phases are identified by a), b) and c).

(25) In FIG. 12, there is a change after region I with regular driving of the switching elements to a region II with a modified driving. In region II, the switching pulses of the half-bridge or phase a) of in each case two adjacent periods are combined to form a single correspondingly lengthened switching pulse. The switching pulses of the half-bridge or phase c) are moved closer to one another correspondingly. The half-bridge or phase b) is not clocked.

(26) In FIG. 13, regions I of regular PWM clocking alternate with regions II of modified PWM clocking. In each case the half-bridge or phase a) is driven in modified form. The switching pulses of the other phases b) and c) move closer to one another correspondingly.

(27) In FIG. 14, again regions I of regular PWM clocking alternate with regions II of modified PWM clocking. In each case two periods with unshifted switching pulses are present between two combined switching pulses.