POWER AMPLIFIER HAVING STACK STRUCTURE

Abstract

A power amplifier having a stack structure comprises a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.

Claims

1. A power amplifier having a stack structure, comprising: a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.

2. The power amplifier of 1, the driver stage or the power stage is implemented in a differential amplification structure or a single-ended amplification structure.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0022] FIG. 1 is a circuit diagram of a multistage power amplifier of the related art.

[0023] FIG. 2 is a circuit diagram of a power amplifier having a stack structure according to an embodiment of the present invention.

[0024] FIG. 3 is a circuit diagram added with a driver stage in the power amplifier having a stack structure illustrated in FIG. 2.

[0025] FIG. 4 is a circuit diagram added with a driver stage in a cascade type in the power amplifier having a stack structure illustrated in FIG. 2.

[0026] FIG. 5 is a circuit diagram with the positions of a first driver stage and a second driver stage changed in the power amplifier having a stack structure illustrated in FIG. 2.

[0027] FIG. 6 is a circuit diagram illustrating a differential amplifier composed of the first driver stage and the second driver stage of the power amplifier having a stack structure illustrated in FIG. 2.

[0028] FIG. 7 is a circuit diagram of a power amplifier having a stack structure according to another embodiment of the present invention.

DETAILED DESCRIPTION

[0029] Hereinafter, embodiments of the present invention are described with reference to the accompanying drawings. The terms used herein are terms selected in consideration of the functions in the embodiments and their meanings may depend on the intention of users and workers or precedents. Therefore, the meanings of the terms used in the following embodiments follow the definitions, if defined specifically herein, or should be construed as the meanings that those skilled in the art know, if not defined specifically.

[0030] FIG. 2 is a circuit diagram of a power amplifier having a stack structure according to an embodiment of the present invention.

[0031] Referring to FIG. 2, a power amplifier 200 having a stack structure according to an embodiment of the present invention includes a first driver stage 210, a second driver stage 220, and a power stage 230.

[0032] The first driver stage 210 receives and amplifies an input signal and receives a power voltage from and a power supply (not illustrated). In detail, the first driver stage 210 receives and amplifies an input signal from an input terminal 211 and receives a power voltage from an external power supply through a power input terminal 212. Further, the first driver stage 210 has a ground terminal 213 connected with a power input terminal 222 of the second driver stage 220 and an output terminal 214 connected with an input terminal 221 of the second driver stage 220. In this configuration, the first driver stage 210 may have the amplification characteristic of any one of classes A, AB, B, C, D, E, F, and S.

[0033] The second driver stage 220 has an input terminal 221 connected with the output terminal 214 of the first driver stage 210 and receives and amplifies an output signal from the first driver stage 210 and has a power input terminal 222 connected with the ground terminal 213 of the first driver stage 210 and receiving a virtual ground voltage. Further, the ground terminal 223 of the second driver stage 220 is grounded and the output terminal 224 is connected with an input terminal 231 of the power stage 230. In this configuration, the second driver stage 220 may have the amplification characteristic of any one of classes A, AB, B, C, D, E, F, and S.

[0034] The virtual ground voltage means the power voltage that is applied to the second driver stage 220, in detail, means that the first driver stage 210 and the second driver stage 220 are connected in respect of voltage, so a power voltage is distributed to the stages 210 and 220, but actually power voltages are separately applied to the stages 210 and 220. Accordingly, the ground terminal 213 of the first driver stage 210 is not grounded actually, but connected with the power input terminal 222 of the second driver stage 220, so it has a virtual grounding effect.

[0035] The power stage 230 has an input terminal 231 connected with the output terminal 224 of the second driver stage 220 and receives and amplifies an output signal from the second driver stage 220, a power input terminal 232 through which a power voltage is applied from a power supply, a ground terminal 233 that is grounded, and an output terminal 234 through which the amplified signal of the second driver stage 220 is outputted as an output signal of the power stage 230. In this configuration, the power stage 230 may have the amplification characteristic of any one of classes A, AB, B, C, D, E, F, and S.

[0036] Comparing the power amplifier 200 having a stack structure illustrated in FIG. 2 with the multistage amplifier 100 illustrated in FIG. 1, there is a difference in that the ground terminal 213 of the first driver stage 210 is not grounded, but is connected to the power input terminal 222 of the second driver stage 220 and a virtual grounding power is applied. Further, there is a difference in that a power voltage is applied to the first driver stage 210 and the power stage 230 from the same power supply.

[0037] For example, when a power voltage of 3.3 V is applied to the first driver stage 210, there is an effect as if a power voltage of 1.65 V is separately applied to the first driver stage 210 and the second driver stage 220. In this case, since the same voltage as the first driver stage 210 is applied to the power stage 230, a voltage of 3.3 V is applied to the power stage 230. Accordingly, it is possible to apply a power voltage to the first driver stage 210, the second driver stage 220, and the power stage 230, using one power voltage. Therefore, as compared with the configuration illustrated in FIG. 1, it is possible to reduce the number of regulators for supplying different voltages to the first driver stage 210, the second driver stage 220, and the power stage 230, respectively.

[0038] Further, the driver stage or the power stage may be implemented in a differential amplification structure or a single-ended amplification structure. For example, all the first driver stage 210, the second driver stage 220, and the power stage 230 may be implemented in a differential amplification structure or a single-ended amplification structure. Further, the first driver stage 210 and the second driver stage 220 may be implemented in differential amplification structures and the power stage 230 may be implemented in a single-ended amplification structure, or the first driver stage 210 and the second driver stage 220 may be implemented in single-ended amplification structures and the power stage 230 may be implemented a differential amplification structure.

[0039] FIG. 3 is a circuit diagram added with a driver stage in the power amplifier having a stack structure illustrated in FIG. 2.

[0040] Referring to FIG. 3, a power amplifier 300 having a stack structure includes a first driver stage 310, a second driver stage 320, a third driver stage 330, and a power stage 340.

[0041] The first driver stage 310 has an input terminal 311 through which an input signal is inputted, a power input terminal 312 to which a power voltage is applied, a ground terminal 313 that is connected with a power input terminal 322 of the second driver stage 320, and an output terminal 314 that is connected with an input terminal 321 of the second driver stage 320.

[0042] The second driver stage 320 has an input terminal 321 connected with the output terminal 314 of the first driver stage 310, a power input terminal 322 connected with the ground terminal 313 of the first driver stage 310, a ground terminal 323 connected with a power input terminal 332 of the third driver stage 330, and an output terminal 324 connected with an input terminal 331 of the third driver stage 330.

[0043] The third driver stage 330 has an input terminal 331 connected with the output terminal 324 of the second driver stage 320, a power input terminal 332 connected with the ground terminal 323 of the second driver stage 320, a ground terminal 333 that is grounded, and an output terminal 334 connected with an input terminal 341 of the power stage 340.

[0044] The power stage 340 has an input terminal 341 that is connected with the output terminal 334 of the third driver stage 330, a power input terminal 342 to which the power voltage from the same power supply as the power input terminal 312 of the first driver stage 310 is applied, a ground terminal 343 that is grounded, and an output terminal 344 through which an input signal from the third driver stage 330 is amplified and outputted.

[0045] For example, when a power voltage of 4.5 V is applied to the power input terminal 312 of the first driver stage 310, actually a voltage of 1.5 V is applied to the first driver stage 310, the second driver stage 320, and the third driver stage 330, that is, the power voltage from a power supply is divided into three. Further, the power voltage of 4.5 V is applied to the power stage 340. Accordingly, the entire power amplifier 300 can be activated by only one power voltage of 4.5 V, so there is a need for only one regulator for supplying a power voltage.

[0046] Further, the third driver stage 330 can be repeatedly and sequentially connected at least once to the first or second driver stages 310 and 320. That is, in the same way of connecting the third driver stage 330, subordinate driver stages such as a fourth driver stage (not illustrated) and a fifth driver stage (not illustrated) can be additionally connected. In this case, the output terminal of the lowermost driver stage is connected with the input terminal 341 of the power stage 340 and the number of additional driver stages may depend on the user.

[0047] FIG. 4 is a circuit diagram added with a driver stage in a cascade type in the power amplifier having a stack structure illustrated in FIG. 2.

[0048] Referring to FIG. 4, a power amplifier 400 having a stack structure includes a first driver stage 410, a second driver stage 420, a third driver stage 430, a fourth driver stage 440, and a power stage 450.

[0049] The first driver stage 410 has an input terminal 411 through which an input signal is inputted, a power input terminal 412 to which a power voltage is applied, a ground terminal 413 that is connected with a power input terminal 422 of the second driver stage 420, and an output terminal 414 that is connected with an input terminal 431 of the third driver stage 430.

[0050] The second driver stage 420 has an input terminal 421 connected with an output terminal 444 of the fourth driver stage 440, a power input terminal 422 connected with the ground terminal 413 of the first driver stage 410, a ground terminal 423 that is grounded, and an output terminal 424 connected with an input terminal 451 of the power stage 450.

[0051] The third driver stage 430 has an input terminal 431 connected with the input terminal 411 of the first driver stage 410, a power input terminal 432 to which a power voltage is applied, a ground terminal 433 connected with a power input terminal 442 of the fourth driver stage 440, and an output terminal 434 connected with an input terminal 441 of the fourth driver stage 440.

[0052] The fourth driver stage 440 has an input terminal 441 connected with an output terminal 434 of the third driver stage 430, a power input terminal 442 connected with the ground terminal 413 of the first driver stage 410, the ground terminal 433 of the third driver stage 430, and the power input terminal 422 of the second driver stage 420, a ground terminal 443 that is grounded, and an output terminal 444 connected with an input terminal 421 of the second driver stage 420.

[0053] The power stage 450 has an input terminal 451 connected with the output terminal 424 of the second driver stage 420, a power input terminal 452 to which a power voltage of a power supply is applied, a ground terminal 453 that is grounded, and an output terminal 454 amplifying and outputting an output signal from the second driver stage 420.

[0054] In this configuration, the first driver stage 410 and the third driver stage 430 form one set by being connected in a cascade type and the second driver stage 420 and the fourth driver stage 440 form one set by being connected in a cascade type, so a power voltage from a power supply is distributed in parallel. For example, when a power voltage of 3.6 V is applied to the first driver stage 410, the third driver stage 430, and the power stage 450, actually, a power voltage of 1.8 V is applied to the first driver stage 410 and the third driver stage 430, a power voltage of 1.8 V is applied to the second driver stage 420 and the fourth driver stage 440, and a power voltage of 3.6 V is applied to the power stage 450.

[0055] Further, at least one of the third driver stage 430 and the fourth driver stage 440 can be repeatedly and sequentially connected at least once to the first driver stage 410 and the second driver stage 420 in a cascade type. The number of the added third driver stage 430 and fourth driver stage 440 may depend on the user.

[0056] FIG. 5 is a circuit diagram with the positions of a first driver stage and a second driver stage changed in the power amplifier having a stack structure illustrated in FIG. 2.

[0057] Referring to FIG. 5, a first driver stage 510 has an input terminal 511 to which an input signal is inputted, a power input terminal 512 that is connected with a ground terminal 523 of a second driver stage 520 and receives a virtual voltage, a ground terminal 513 that is grounded, and an output terminal 514 that is connected with an input terminal 521 of the second driver stage 520 and outputs an amplified input signal.

[0058] A second driver stage 520 has an input terminal 521 that is connected with the output terminal 514 of the first driver stage 510 and receives an amplified input signal, a power input terminal 522 to which a power voltage is applied, a ground terminal 523 that is connected with the power input terminal 512 of the first driver stage 510 and receives a virtual voltage, and an output terminal 524 that outputs an amplified signal to an external circuit (not illustrated).

[0059] As described above, comparing the first driver stage 510 and the second driver stage 520 illustrated in FIG. 5 with the first driver stage 210 and the second driver stage 220 illustrated in FIG. 2, there is a difference in that the first driver stage 510 positioned lower than the second driver stage 520 and a power voltage is applied to the power input terminal 522 of the second driver stage 520.

[0060] FIG. 6 is a circuit diagram illustrating a differential amplifier composed of the first driver stage and the second driver stage of the power amplifier having a stack structure illustrated in FIG. 2.

[0061] Referring to FIG. 6, a first driver stage 610 of a power amplifier having a differential structure includes a first transistor T.sub.1, a second transistor T.sub.2, a third transistor T.sub.3, and a fourth transistor T.sub.4. In this configuration, the first transistor T.sub.1, the second transistor T.sub.2, the third transistor T.sub.3, and the fourth transistor T.sub.4 may have the characteristic of any one of CMOS, BJT, HBT, FET, and HEMT. In the specification, the first transistor T.sub.1 and the third transistor T.sub.3 were set in a P-type mosfet, and the second transistor T.sub.2 and the fourth transistor T.sub.4 were set in an N-type mosfet, but the present invention is not limited thereto and the first transistor T.sub.1 and the third transistor T.sub.3 may be set in an N-type mosfet, and the second transistor T.sub.2 and the fourth transistor T.sub.4 may be in a P-type mosfet.

[0062] The first transistor T.sub.1 has a source to which a power voltage is applied from a power supply, a gate to which a first input signal is inputted, and a drain that is connected with a drain of the second transistor. The second transistor T.sub.2 has a polarity opposite to that of the first transistor T.sub.1 and has a drain that is connected with the drain of the first transistor T.sub.1, a gate to which a first input signal is inputted and which is connected with the gate of the first transistor T.sub.1.

[0063] The third transistor T.sub.3 has a polarity the same as that of the first transistor T.sub.1 and has a source to which a power voltage is applied from a power supply, a gate to which a second input signal different from the first input signal is inputted, and a drain that is connected with a drain of the fourth transistor T.sub.4 The fourth transistor T.sub.4 has a polarity opposite to that of the third transistor T.sub.3 and has a drain that is connected with the drain of the third transistor T.sub.3, a gate to which a second input signal is inputted and which is connected with the gate of the third transistor T.sub.3.

[0064] Further, the first driver stage 610 may further include a first resistor R.sub.1 and a second resistor R.sub.2. The first resistor R.sub.1 has one end connected with the gate of the first transistor T.sub.1 and the gate of the second transistor T.sub.2 and the other end connected with the drain of the first transistor T.sub.1 and the drain of the second transistor T.sub.2. The second resistor R.sub.2 has one end connected with the gate of the third transistor T.sub.3 and the gate of the fourth transistor T.sub.4 and the other end connected with the drain of the third transistor T.sub.3 and the drain of the fourth transistor T.sub.4. The resistors R.sub.1 and R.sub.2 are added to keep an input bias and an output bias the same.

[0065] Meanwhile, the second driver stage 620 includes a fifth transistor T.sub.5, a sixth transistor T.sub.6, a seventh transistor T.sub.7, and an eighth transistor T.sub.8. In this configuration, the fifth transistor T.sub.5, the sixth transistor T.sub.6, the seventh transistor T.sub.7, and the eighth transistor T.sub.8 may have the characteristic of any one of CMOS, BJT, HBT, FET, and HEMT. In the specification, the fifth transistor T.sub.5 and the seventh transistor T.sub.7 were set in a P-type mosfet, and the sixth transistor T.sub.6 and the eighth transistor T.sub.8 were set in an N-type mosfet, but the present invention is not limited thereto and the fifth transistor T.sub.5 and the seventh transistor T.sub.7 may be set in an N-type mosfet, and the sixth transistor T.sub.6 and the eighth transistor T.sub.8 may be in a P-type mosfet.

[0066] A source of the fifth transistor T.sub.5 is connected with a source of the second transistor T.sub.2 and a source of the fourth transistor T.sub.4 and receives a virtual voltage. Further, a gate is connected with a drain of the first transistor T.sub.1 and a drain of the second transistor T.sub.2, in which a first capacitor C.sub.1 may be connected and block a direct current component. The sixth transistor T.sub.6 has a polarity opposite to that of the fifth transistor T.sub.5 and has a drain connected with the drain of the fifth transistor T.sub.5 and a gate connected with the gate of the fifth transistor T.sub.5.

[0067] The seventh transistor T.sub.7 has the same polarity as the fifth transistor T.sub.5 and has a source connected with the source of the second transistor T.sub.2 and the source of the fourth transistor T.sub.4 and receiving a virtual voltage. Further, the gate is connected with the drain of the third transistor T.sub.3 and the drain of the fourth transistor T.sub.4, in which a second capacitor C.sub.2 may be connected and block a direct current component. The eighth transistor T.sub.8 has a polarity opposite to that of the seventh transistor T.sub.7 and has a drain connected with the drain of the seventh transistor T.sub.7 and a gate connected with the gate of the seventh transistor T.sub.7.

[0068] Further, the second driver stage 620 may further include a third resistor R.sub.3 and a fourth resistor R.sub.4. The third resistor R.sub.3 has one end connected with the gate of the fifth transistor T.sub.5 and the gate of the sixth transistor T.sub.6 and the other end connected with the drain of the fifth transistor T.sub.5 and the drain of the sixth transistor T.sub.6. The fourth resistor R.sub.4 has one end connected with the gate of the seventh transistor T.sub.7 and the gate of the eighth transistor T.sub.8 and the other end connected with the drain of the seventh transistor T.sub.7 and the drain of the eighth transistor T.sub.8. The resistors R.sub.3 and R.sub.4 are added to keep an input bias and an output bias the same.

[0069] Meanwhile, a first output signal and a second output signal of the first driver stage 610, which correspond to a first input signal and a second input signal, are supplied to the input terminal of a power stage (not illustrated). The power stage is connected with the node, where the drains of the fifth transistor T.sub.5 and the sixth transistor T.sub.6 are connected, and can receive a first output signal. Further, the power stage is connected with the node, where the drains of the seventh transistor T.sub.7 and the eighth transistor T.sub.8 are connected, and can receive a second output signal.

[0070] For example, a power voltage of 3.3 V is applied to the power input terminals of the first transistor T.sub.1 and the third transistor T.sub.3, a power voltage of about 1.7 V is applied to the first driver stage 610 and the second driver stage 620. Accordingly, a first output signal and a second output signal are outputted, together with a power voltage of about 0.8 V, to the power stage. In this case, the power stage requires a power voltage of 0.7 V or more to normally operate its transistor and the first output signal and the second output signal have a power voltage of 0.8 V as input, so the power stage can be activated without an additional power voltage.

[0071] FIG. 7 is a circuit diagram of a power amplifier having a stack structure according to another embodiment of the present invention.

[0072] Referring to FIG. 7, a power amplifier 700 having a stack structure according to an embodiment of the present invention includes a first driver stage 710, a second driver stage 720, and a power stage 730.

[0073] The first driver stage 710 has an input terminal 711 through which an input signal is inputted, a power input terminal 712 to which a power voltage is applied, a ground terminal 713 that is connected with a power input terminal 732 of the power stage 730, and an output terminal 714 that is connected with an input terminal 721 of the second driver stage 720.

[0074] The second driver stage 720 has an input terminal 721 connected with the output terminal 714 of the first driver stage 710, a power input terminal 722 connected with the power input terminal 712 of the first driver stage 710 and receiving a power voltage, a ground terminal 723 connected with a power input terminal 732 of the power stage 730, and an output terminal 724 connected with an input terminal 731 of the power stage 730. That is, the first driver stage 710 and the second driver stage 720 are connected in a cascade type.

[0075] The power stage 730 has an input terminal 731 connected with the output terminal 724 of the second driver stage 720, a power input terminal 732 connected with the ground terminal 713 of the first driver stage 710 and the ground terminal 723 of the second driver stage 720, and a ground terminal 733 that is grounded, and an output terminal 734 for outputting an amplified signal of the power stage 730.

[0076] Comparing the power amplifier 700 illustrated in FIG. 7 with the power amplifier 200 illustrated in FIG. 2, there is a difference in that the first driver stage 210 and the second driver stage 220 are connected in a stack structure in the power amplifier 200 illustrated in FIG. 2, but the first driver stage 710 and the second driver stage 720 are connected in a cascade type in the power amplifier 700 illustrated in FIG. 7, and the driver stage, which includes the first driver stage 710 and the second driver stage 720, and the power stage 730 are connected in a stack structure.

[0077] Further, the driver stage or the power stage may be implemented in a differential amplification structure or a single-ended amplification structure. For example, all the first driver stage 710, the second driver stage 720, and the power stage 730 may be implemented in a differential amplification structure or a single-ended amplification structure. Further, the first driver stage 710 and the second driver stage 720 may be implemented in differential amplification structures and the power stage 730 may be implemented in a single-ended amplification structure, or the first driver stage 710 and the second driver stage 720 may be implemented in single-ended amplification structures and the power stage 730 may be implemented a differential amplification structure.

[0078] As described above, according to embodiments of the present invention, since a plurality of driver stages included in a multistage amplifier are connected in a stack structure, it is possible to reduce the number of regulators for supplying a power voltage and decrease the design area of an integrated circuit.

[0079] Although the present invention has been described on the basis of the preferred embodiments described with reference to the drawings, it is not limited thereto. Therefore, the present invention should be construed on the basis of claims intended for including modifications that can be achieved apparently from the embodiments.