Switched amplifier for a variable supply voltage

Abstract

The amplifier according to the present invention serves to amplify an input signal to an output signal and includes a signal path and a negative feedback connection. The signal path includes a modulator which is suitable for receiving the input signal and for generating a switching signal in response to the received input signal. The signal path further includes a switched output stage, which is connected to a supply voltage, wherein the switched output stage contains a switch that is switched according to the switching signal generated by the modulator, wherein the switched output stage generates an output signal the amplitude of which depends on the supply voltage.

Claims

1. An amplifier for amplifying an input signal to an output signal, wherein the amplifier comprises: a signal path comprising: a modulator suitable for receiving the input signal and for generating a switching signal in response to the received input signal; a switched output stage connected with a supply voltage, wherein the switched output stage comprises a switch which is switched according to the switching signal generated by the modulator, and the switched output stage generates an output signal, the amplitude of which is dependent on the supply voltage; and a modulator negative feedback connection which is suitable for feeding back the switching signal to an input of the modulator in order to be combined with the signal at the input of the modulator; and a compensator, which receives the supply voltage of the switched output stage or a signal derived therefrom; and a negative feedback connection that is in communication with the signal path such that the signal path and the negative feedback connection form a loop with a loop gain, wherein the negative feedback connection is suitable for feeding back the output signal generated by the switched output stage to an input of the amplifier, wherein the fed-back output signal is combined with the input signal; and wherein the compensator is suitable for compensating, at least partially, for changes in the loop gain resulting from a variation in the supply voltage, wherein the compensator is suitable for amplifying or reducing the signal in the signal path of the loop in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage, and wherein the compensator is suitable for amplifying or reducing the signal on the modulator negative feedback connection in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage.

2. The amplifier according to claim 1, further comprising means for varying the supply voltage in dependence of the input signal.

3. The amplifier according to claim 1, wherein the compensator is suitable for multiplying the supply voltage of the switched output stage or a signal derived therefrom with the signal on the modulator negative feedback connection.

4. The amplifier according to claim 3, wherein the compensator comprises a multiplexer and wherein the supply voltage of the switched output stage or a signal derived therefrom are multiplied by the multiplexer with the switching signal so as to form a signal, which at least approximately has the value or inverted value of the supply voltage or at least approximately has the value or inverted value of a signal derived from the supply voltage.

5. The amplifier according to claim 4, wherein the modulator comprises a sigma-delta modulator, wherein the sigma-delta modulator preferably comprises a loop filter with two or more integrators.

6. The amplifier according to claim 5, wherein the loop filter can assume states which are influenced by at least one state variable for which the loop filter comprises a limit value, wherein the compensator is suitable for correspondingly adapting the limit value in response to the variation in the supply voltage.

7. The amplifier according to claim 5, wherein the sigma-delta modulator is implemented on a hardware-programmable component, in particular on a FPGA.

8. The amplifier according to claim 7, additionally comprising a digital loop filter arranged in the signal path upstream of the sigma-delta modulator, wherein the digital loop filter receives and amplifies a signal that is based on the output signal and is generated by combining the input signal with the fed-back output signal, which has been fed-back by the negative feedback connection, wherein the digital loop filter is implemented on the hardware-programmable component, in particular on the FPGA.

9. The amplifier according to claim 7, wherein the negative feedback connection further comprises: an analog-loop filter, and an analog-digital converter of the second order the input of which is connected with an output of the analog loop filter.

10. The amplifier according to claim 9, further comprising: a digital-analog negative feedback connection which is suitable for feeding back the output signal of the analog-digital converter in order to be combined with the fed-back the output signal of the switched output stage, and a digital-analog converter which is suitable for converting a signal based on an output signal of the analog-digital converter into an analog signal.

11. The amplifier according to claim 10, further comprising a digital filter the input of which is connected with the output of the analog-digital converter, wherein the digital-analog negative feedback connection is suitable for feeding back an output signal of the digital filter in order to be combined with the fed-back output signal of the switched output stage.

12. The amplifier according to claim 1, further comprising a filter the input of which is connected with the output of the switched output stage, wherein the negative feedback connection is suitable for feeding back the output signal of the switched output stage upstream or downstream of the filter.

13. The amplifier according to claim 7, additionally comprising an analog-digital converter which is suitable for converting the supply voltage into a digital signal and to forward this to the compensator.

14. The amplifier according to claim 1, which is arranged for operation with a supply voltage, which is connected externally.

15. The amplifier according to claim 1, wherein the switched output stage is formed by an H-bridge and/or wherein the switch is formed by power MOSFET transistors.

16. The amplifier according to claim 9, additionally comprising a clock source for digital signal processing and/or for digital signal generating, wherein the analog-digital converter is arranged for operation at a sampling frequency comprising 100 kHz, preferably 1 MHz, especially preferably 10 MHz.

17. An amplifier for amplifying an input signal to an output signal, wherein the amplifier comprises: a signal path comprising: a modulator suitable for receiving the input signal and for generating a switching signal in response to the received input signal; a switched output stage connected with a supply voltage, wherein the switched output stage comprises a switch which is switched according to the switching signal generated by the modulator, and the switched output stage generates an output signal, the amplitude of which is dependent on the supply voltage; and a compensator, which receives the supply voltage of the switched output stage or a signal derived therefrom, and a negative feedback connection that is in communication with the signal path such that the signal path and the negative feedback connection form a loop with a loop gain, wherein the negative feedback connection is suitable for feeding back the output signal generated by the switched output stage to an input of the amplifier, wherein the fed-back output signal is combined with the input signal; and wherein the compensator is suitable for compensating, at least partially, for changes in the loop gain resulting from a variation in the supply voltage, wherein the compensator is suitable for amplifying or reducing the signal in the signal path of the loop in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage, and wherein the compensator is suitable for dividing the signal on the signal path by the supply voltage of the switched output stage or with a signal derived therefrom.

18. A method for amplifying an input signal to an output signal with the aid of an amplifier comprising a signal path and a negative feedback connection, which form a loop with a loop gain, wherein the method comprises: receiving the input signal; generating a switching signal with the aid of a modulator; generating an output signal with the aid of a switched output stage connected with a supply voltage, wherein the switched output stage includes a switch which is switched according to the switching signal generated by the modulator, wherein the amplitude of the output signal depends on the supply voltage; feeding back the output signal of the switched output stage with the aid of the negative feedback connection; combining the fed-back output signal with the input signal; feeding back the switching signal to an input of the modulator via a modulator negative feedback connection in order to be combined with the signal at the input of the modulator; compensating, at least partially, for changes in the loop gain resulting from a variation in the supply voltage by using a compensator, wherein the compensator receives the supply voltage of the switched output stage or a signal derived therefrom. wherein the compensating comprises: amplifying or reducing the signal in the signal path of the loop in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage by amplifying or reducing the signal on the modulator negative feedback connection in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage.

19. A method for amplifying an input signal to an output signal with the aid of an amplifier comprising a signal path and a negative feedback connection, which form a loop with a loop gain, wherein the method comprises: receiving the input signal; generating a switching signal with the aid of a modulator; generating an output signal with the aid of a switched output stage connected with a supply voltage, wherein the switched output stage includes a switch which is switched according to the switching signal generated by the modulator, wherein the amplitude of the output signal depends on the supply voltage; feeding back the output signal of the switched output stage with the aid of the negative feedback connection; combining the fed-back output signal with the input signal; compensating, at least partially, for changes in the loop gain resulting from a variation in the supply voltage by using a compensator, wherein the compensator receives the supply voltage of the switched output stage or a signal derived therefrom, wherein the compensating comprises: amplifying or reducing the signal in the signal path of the loop in dependence of the supply voltage in such a way as to counteract a change in loop gain based on the variation in the supply voltage by dividing the signal on the signal path by the supply voltage of the switched output stage or with a signal derived therefrom.

Description

SHORT DESCRIPTION OF THE FIGURES

(1) Further advantages and features of the present invention are revealed in the description below, in which the present invention is explained in detail by way of preferred exemplary embodiments with reference to the attached figures, in which

(2) FIG. 1 shows a block circuit diagram of the amplifier according to the present invention with a digital loop filter and a digital sigma-delta-modulator,

(3) FIG. 2 shows a block circuit diagram of the internal sigma-delta-modulator, and

(4) FIG. 3 shows a block circuit diagram of a digital integrator with adapted saturation.

DESCRIPTION OF THE PREFERRED EMBODIMENT

(5) FIG. 1 shows an exemplary embodiment of the amplifier 8 according to the present invention. This includes a signal path 10 in which are consecutively arranged in forward or downstream direction: a digital loop filter 12, a digital sigma-delta-modulator 14, a switched output stage 16 and a filter 18. The switched output stage 16 is formed by an H-bridge. Furthermore, a negative feedback connection 20 is depicted, which at its input is connected with the signal path 10 between the switched output stage 16 and the filter 18 or alternatively with the signal path 10 behind the filter 18. Further, an analog loop filter 22, a first analog-digital converter 24 and a digital filter 25 are consecutively arranged in signal direction in the negative feedback connection 20. A digital-analog negative feedback connection 26 is connected, at its input, with the output of the digital filter 25 and, at its output, with the input of the analog loop filter 22. The digital-analog negative feedback connection 26 also includes a digital-analog converter 28. The amplifier 8 is operated with a supply voltage 30, which may be variable, and which may be connected with the switched output stage 16 and, via a second analog-digital converter 32, with the digital sigma-delta-modulator 14. A digital input forms the input of the signal path 10, on which, after the switched output stage 16, the output signal 36 is provided. The digital loop filter 12, the sigma-delta-modulator 14 and the digital filter 25 are implemented on the hardware-programmable component 38 which includes a FPGA and which is connected with a clock source 40. The negative feedback connection 20 and the signal path 10 together form a loop 42.

(6) The analog output signal 36 of the switched output stage 16 or alternatively the output signal is fed back downstream of the filter 18 via the negative feedback connection 20 in order to he combined with the input signal. The combination is typically carried out in that the fed-back signal, which is phase-shifted by 180 to the input signal, is added to the input signal. This corresponds to a signal subtraction. Noise effects which arise on the signal path 10 within the loop 42 are eliminated or at least suppressed with the aid of the negative feedback. An example for such a noise effect is a non-linear behaviour in the switched output stage 16, which leads to sound distortions.

(7) Before the fed-back signal is combined with the input signal, it is amplified with the aid of the analog loop filter 22 and subsequently digitised with the aid of the first analog-digital converter 24. Furthermore, high-frequency signal portions in the digitised signal are reduced with the aid of the digital filter 25, after the first analog-digital converter 24. The first analog-digital converter 24 is preferably a sigma-delta-modulator of the second order, which is preferably operated at a clock frequency >10 MHz.

(8) The input signal combined with the fed-back output signal is amplified by the digital loop filter 12 for the required frequency range, and for higher frequencies above this frequency range, is forwarded unamplified or attenuated to the digital sigma-delta-modulator 14.

(9) The output signal of the digital filter 25 is fed back with the aid of the digital-analog negative feedback connection 26 in order to be combined with the fed-back output signal 36 of the switched output stage 16. Prior to combining the digital output signal of the digital filter 25, this is converted into an analog signal with the aid of the digital-analog converter 28. In the same way as the first analog-digital converter 24 the digital-analog converter 28 is also operated at a clock frequency of >10 MHz. Due to the use of a clock frequency of >10 MHz no errors or only very few errors arise during conversion between digital and analog signals so that no aliasing filtering or only a very simple aliasing filtering is necessary, which is normally used to diminish effects which arise due to an insufficient clock frequency during conversion between digital and analog signals (so-called alias effects).

(10) In response to the output signal of the digital loop filter 12, the sigma-delta-modulator 14 generates a switching signal which is a digital signal able to assume the values 0 and 1, for example.

(11) The switching signal is received by the switched output stage 16 which generates the output signal 36 in response to the switching signal. The switched output stage 16 contains a switch which is switched in dependence of the switching signal and assumes one of two discrete switching states. The switch of the switched output stage 16 may, for example, take the form of power MOSFET transistors. When controlling the switching means the signal value 0 of the switching signal corresponds to a closed switching state, and the signal value 1 of the switching signal corresponds to an open switching state or vice versa, depending on the respective switching means under consideration. Thus, the switch of the switched output stage 16 is switched in response to the switching signal and individual pulses are generated in the output signal in response to the switching operations. The amplitude and the sign of the pulses in the output signal 36 depend on the value of the applied supply voltage 30 and the value of the switching signal. For example, a pulse or pulse contribution is generated in the output signal 36 for the value 1 of the switching signal, which corresponds to the supply voltage 30. A correspondingly inverted pulse or pulse contribution is then generated in the output signal 36 for the value 0 of the switching signal. Thus the output signal 36 also corresponding to the two signal values of the switching signalincludes two discrete values, the amount of which depends on the supply voltage 30 applied to the switched output stage 16.

(12) Amplification of the input signal by the amplifiers 8 to the output signal 36 is effected such that the mean amplitude of the output signal 36 essentially corresponds to the mean amplitude of the input signal, amplified by a certain factor. If the output signal 36, over a time section of a certain length, contains only positive pulses or only negative pulses, then the mean amplitude of the output signal 36 over this time section assumes its maximum or minimum value for the applied supply voltage 30, respectively. This is called a 100% positive or a 100% negative output coupling, respectively. If the output signal 36, over a time section of a certain length, contains approx. the same number of positive and negative pulses, then the mean amplitude or the output signal 36 over this time section assumes a value of zero. In this case, the output coupling amounts to 0%. The mean amplitude of the output signal 36 is thus determined by the degree of output coupling and the applied supply voltage 30. The degree of output coupling is determined by that switching signal which is generated with the aid of the digital sigma-delta-modulator 14 in answer to the input signal.

(13) It can be recognised that for weak input signals there will be a comparatively low output coupling in order to generate the corresponding comparatively low mean amplitude of the output signal 36. This means, however, that in this case the supply voltage 30 of the switched output stage 16 is higher than really necessary. At the same time high supply voltages 36 for weak input signals represent a problem with regard to energy efficiency because the switching losses of the switched output stage 16 increase/decrease to the square of the supply voltage 30.

(14) Energy efficiency can be improved if the supply voltage 30for an unchanged overall gaincan be adapted to the input signal so that for weaker input signals unnecessarily high supply voltages 30 can be avoided.

(15) The construction shown favours such a functionality because the overall gain due to the negative feedback connection 20 is essentially independent of the supply voltage 30. Admittedly, the change in the supply voltage 30 which will be explained in detail further below leads to a change in loop gain which in turn leads to an instability in the negative feedback. The present invention therefore proposes to compensate in a suitable manner for changes in the loop gain resulting from the variation in supply voltage 30 as it is possible in terms of the invention and thereby ensuring the stability of the negative feedback. This will now be explained in detail.

(16) The overall gain A.sub.G, with which the input signal is amplified to the output signal, results from the forward gain A.sub.V and the loop gain A.sub.S based on the following formula:

(17) $A_G=\frac{A_V}{1+A_S}$

(18) The loop gain A.sub.S is that gain, with which a signal is amplified in a single round trip through the loop 42, and the forward gain A.sub.V is that gain with which the input signal would be amplified without negative feedback to the output signal 36. For the audio range from 0 to 10 kHz the amplifier according to the invention preferably comprises a loop gain of 30 dB, preferably 40 dB and especially preferably 50 dB.

(19) Due to the negative feedback, the overall gain A.sub.G which without negative feedback would correspond to the forward gain A.sub.V is reduced by the factor (1+A.sub.S).sup.1 whereby the amplification behaviour is linearized and stabilized at the expense of the overall gain A.sub.G.

(20) Since the switched output stage 16 is situated in the signal path 10 inside the loop 42, both the loop gain A.sub.S and the forward gain A.sub.V are proportional to the applied supply voltage. I.e.
A.sub.S=K.sub.U.Math.A.sub.SU and
A.sub.V=K.sub.UA.sub.VU,
wherein K.sub.U is the proportionality factor dependent on the supply voltage 30, and wherein A.sub.SU or A.sub.VU is the percentage of the loop or forward gain, which does not vary with the supply voltage 30.

(21) Since both the forward gain A.sub.V and the loop gain A.sub.S for the input signal to be amplified are essentially greater than One (A.sub.V, A.sub.S) >>1, the overall gain A.sub.G approximately corresponds to the quotient g from the forward gain A.sub.V and the loop gain A.sub.S, which quotient is independent of the applied supply voltage 30:

(22) $A_G=\frac{A_V}{1+A_S}=\frac{K_U.Math.A_{\mathrm{VU}}}{1+K_U.Math.A_{\mathrm{SU}}}g$

(23) Therefore, also in case of a variation in the supply voltage 30 due to the negative feedback connection 20, the overall gain A.sub.G, with which the input signal is amplified to the output signal 36, remains essentially unchanged. For a reduced supply voltage 30, the loop gain A.sub.S and the forward gain A.sub.V are also reduced so that the overall gain A.sub.G is essentially maintained. The degree of output coupling is automatically raised accordingly.

(24) For an energy-efficient operation, the supply voltage 30 can be adapted for weak input signals thereby maintaining the degree of output coupling.

(25) With known switched amplifiers with negative feedback the loop gain A.sub.S would change for a variation in supply voltage 30. However, for certain signal frequencies this would lead to a phase shift of the fed-back output signal and thus to instability of the amplifier.

(26) In order to counteract this instability, the amplifier 8 according to the present invention includes a compensator that receives the supply voltage 30 applied to the switched output stage 16 or a signal derived therefrom and which is suitable for compensating at least partially for changes in the loop gain, which results from a variation in the supply voltage 30.

(27) In a preferred embodiment of the amplifier 8, according to the present invention, the at least partial compensation for a change in the loop gain A.sub.S is effected in the sigma-delta-modulator 14. This is shown in FIG. 2.

(28) FIG. 2 shows the sigma-delta-modulator 14, through which the signal path 10 passes. The signal path 10 within the sigma-delta-modulator 14 has a first integrator 44, a second integrator 46 and a quantizer 48 consecutively arranged in it. Furthermore, the sigma-delta-modulator 14 includes a modulator negative feedback connection 50 which in the present description is considered as part of the signal path and on which a multiplexer 52 is arranged. Furthermore, FIG. 2 shows the second analog-digital converter 32 which receives the supply voltage 30 and which is connected with the first and the second integrator 44 and 46 and additionally with the multiplexer 52.

(29) With the aid of the modulator negative feedback connection 50, the switching signal is fed back from the output of the sigma-delta-modulator 14 and then multiplied with a digital signal derived from the supply voltage 30, which is generated with the aid of the second analog-digital converter 32. Signal multiplication with the aid of the multiplexer 52 is effected such that the multiplexer 52 is switched with the aid of the switching signal, including, for example, the values 0 or 1, and which thus in response to the switching signal provides the value or the inverted value of the digital signal which is derived from the supply voltage 30. The signal thus provided by the multiplexer 52 is fed back via the modulator negative feedback connection 50 and combined with the output signal of the digital loop filter 12. The signal multiplication with the signal derived from the supply voltage 30 in the modulator negative feedback connection 50 effectively corresponds to a signal division in forward direction of the signal path 10. The signal direction of the modulator negative feedback connection 50 corresponds to the reverse direction of the signal path 10. Due to this division, the change in loop gain proportional to the supply voltage 30 which results at the switched output stage 16 for a variation in the supply voltage 30 is at least partially compensated for. Thus, a costly signal division is replaced by a signal multiplication, which is much simpler to execute and which in addition, due to a binary or ternary switching signal, merely consists of multiplexing with the aid of the multiplexer 52.

(30) In order to ensure that the sigma-delta-modulator 14 remains stable, the state variables of the first and second integrators 44 and 46 are adapted. This will now be explained by way of FIG. 3.

(31) FIG. 3 shows the block circuit diagram of a digital integrator which for example could be used as first and second integrators 44 and 46, and which are implemented on the hardware-programmable component 38, in particular on the FPGA. FIG. 3 shows the supply voltage 30 connected with the second analog-digital converter 32 and the digital integrator including a delay element 54, an integrator saturation 56, an adder 57 and an integrator feedback 58. An integration coefficient 60 is present at the input of the digital integrator. The integrator saturation 56 is determined by a saturation value 62.

(32) The integrator increases its output value which is fed back to the adder 57 via the integrator feedback 58, with each clock cycle by the integrator input value multiplied with the integration coefficient 60. The integrator saturation 56 ensures that the output value of the integrator does not exceed the saturation value 62. To ensure the stability of the sigma-delta-modulator 14, it is necessary for the state variables of the first and second integrators 44 and 46 to include a defined saturation behaviour independent of the supply voltage 30. Since the signal fed back on the modulator negative feedback connection 50 changes in dependence of the supply voltage 30, the integrator input value also changes in dependence of the supply voltage 30 and thus saturation occurs in dependence of the supply voltage 30. In order to ensure that the saturation behaviour of the first and second integrators 44 and 46 remains defined also for a variation in the supply voltage 30, the saturation values 62 of the first and second integrators 44 and 46 are adapted in accordance with the variation in the supply voltage 30. Thus, the stability of the sigma-delta-modulator 14 is ensured also for a variation in the supply voltage 30.

(33) The amplifier described in FIG. 1, and in particular in FIGS. 2 and 3, represents a particularly advantageous embodiment of the present invention, because signal adaption is carried out via signal multiplication with the switching signal, which includes a word width of only one bit, so that hardware expenditure is minimal and can be realised with the aid of a simple multiplexer 52. Furthermore, the resolution of the second analog-digital converter 32 which provides a digital signal from the supply voltage 30, need not be particularly high because noise in the modulator negative feedback 50 are suppressed at this point by the negative feedback connection 20,

(34) Instead of a FPGA the amplifier according to the present invention may alternatively be implemented with the aid of an ASIC, wherein the switching components assigned to the FPGA in the above description are then digitally realised in the ASIC.

(35) The amplifier according to the invention is however not limited to the above described exemplary embodiment. A further possibility of adapting the loop gain A.sub.S consists in a signal multiplication in the negative feedback connection 20. However this would change the overall gain A.sub.G, so that an additional corresponding signal adaptation is necessary in the signal path 10 outside the loop 42, which only affects the forward gain A.sub.V, but not the loop gain A.sub.S. Thus using two adaptations at different points in the amplifier both the loop gain A.sub.S and the overall gain A.sub.G can be kept constant, at least approximately, for a variation in the supply voltage 30 applied to the switched output stage 16.

(36) Another possibility is a signal division in forward direction of the signal path 10 within the loop 42. The word width of the signal to be divided is however comparatively high so that the necessary hardware expenditure compared to the preferred embodiment is high.

(37) Although a preferred embodiment has been disclosed and described in the drawings and in the above description, this should be regarded merely as an example and not as restricting the invention. It is pointed out that only the preferred embodiment has been illustrated in detail and described, and that changes and modifications which at present and in the future lie within the scope of the invention should be protected. The features shown may be of importance in random combinations.

LIST OF REFERENCE SYMBOLS

(38) 8 amplifier

(39) 10 signal path

(40) 12 digital loop filter

(41) 14 digital sigma-delta-modulator

(42) 16 switched output stage

(43) 18 filter

(44) 20 negative feedback connection

(45) 22 analog loop filter

(46) 24 first analog-digital converter

(47) 25 digital filter

(48) 26 digital-analog negative feedback connection

(49) 28 digital-analog converter

(50) 30 variable supply voltage

(51) 32 second analog-digital converter

(52) 34 digital input

(53) 36 output signal

(54) 38 hardware-programmable component

(55) 40 clock source

(56) 42 loop

(57) 44 first integrator

(58) 46 second integrator

(59) 48 quantizer

(60) 50 modulator negative feedback connection

(61) 52 multiplexer

(62) 54 delay element

(63) 56 integrator saturation

(64) 57 adder

(65) 58 integrator feedback

(66) 60 integration coefficient

(67) 62 saturation value