VARIABLE CAPACITANCE DIODE, METHOD FOR PRODUCING A VARIABLE CAPACITANCE DIODE, AND STORAGE DEVICE AND DETECTOR COMPRISING SUCH A VARIABLE CAPACITANCE DIODE

20170025552 ยท 2017-01-26

    Inventors

    Cpc classification

    International classification

    Abstract

    A capacitance diode or variable capacitance diode includes first and second electrodes and a layer configuration disposed in contact-making fashion between the two electrodes. The layer configuration has, one after the other in a direction from the first electrode towards the second electrode, a layer formed of a ferroelectric material and an electrically insulating layer formed of a dielectric material having electrically charged defects. A method for producing a capacitance diode or a variable capacitance diode, a storage device and a detector including a capacitance diode or a variable capacitance diode are also provided.

    Claims

    1-15. (canceled)

    16. A capacitance diode, comprising: a first electrode and a second electrode; and a layer configuration disposed in contact-making fashion between said first electrode and said second electrode; said layer configuration having, in succession in a direction from said first electrode to said second electrode, a layer made of a ferroelectric material and an electrically insulating layer made of a dielectric material, said layer made of said dielectric material having electrically charged defects.

    17. The capacitance diode according to claim 16, wherein said layer configuration has, in succession in said direction from said first electrode to said second electrode, said layer made of said ferroelectric material, said layer made of said dielectric material and a layer made of a doped semiconductor material.

    18. The capacitance diode according to claim 16, wherein said layer made of said dielectric material has a thickness of at least 5 nm.

    19. The capacitance diode according to claim 16, wherein: said layer made of said ferroelectric material has a polarization surface charge density at an interface thereof in a polarized state, corresponding to a state after applying a coercivity field strength of said ferroelectric material over said layer made of said ferroelectric material; said layer made of said dielectric material has a volume charge density of electrically charged defects; and said layer made of said dielectric material has a thickness causing a product of said thickness and said volume charge density of said layer made of said dielectric material, in terms of magnitude, to at most equal said polarization surface charge density of said layer made of said ferroelectric material.

    20. A storage device for storing information, the storage device comprising at least one capacitance diode according to claim 16 as a storage element.

    21. The storage device according to claim 20, wherein: the storage device is configured to apply at least one first write voltage and one second write voltage between said first electrode and said second electrode; said first write voltage and said second write voltage have a magnitude being at least so large that a coercivity field strength of said ferroelectric material is exceeded in said layer made of said ferroelectric material; and said first write voltage has at least one of a different magnitude or a different polarity from said second write voltage permitting said at least one capacitance diode to be put into a first storage state with a first capacitance characteristic by applying said first write voltage and to be put into a second storage state with a second capacitance characteristic by applying said second write voltage.

    22. The storage device according to claim 21, wherein the storage device is configured to detect a storage state of said at least one capacitance diode by detecting a capacitance of said at least one capacitance diode.

    23. The storage device according to claim 22, wherein: said at least one capacitance diode has a capacitance-voltage characteristic with a minimum at a first minimum DC voltage in a first storage state and a minimum at a second minimum DC voltage in a second storage state; and the storage device is configured to detect a capacitance of said at least one capacitance diode at said first or second minimum DC voltage.

    24. A detector for detecting radiation, the detector comprising at least one capacitance diode according to claim 16 as a detector element.

    25. The detector according to claim 24, wherein the radiation is particle radiation or electromagnetic radiation.

    26. The detector according to claim 24, wherein the detector is configured to detect a capacitance of said at least one capacitance diode and to characterize the radiation on a basis of the detected capacitance.

    27. The detector according to claim 24, wherein: the detector is configured to apply a switching voltage between said first electrode and said second electrode; and said switching voltage has a magnitude being at least so large that: a coercivity field strength of said ferroelectric material is exceeded in said layer made of said ferroelectric material, such that: said at least one capacitance diode can be put into a predetermined storage state with a defined capacitance characteristic by applying said switching voltage.

    28. The detector according to claim 27, wherein: said at least one capacitance diode has a capacitance-voltage characteristic with a minimum in said predetermined storage state; and the detector is embodied to characterize the radiation on a basis of a position of said minimum.

    29. A method for producing a capacitance diode, the method comprising the following steps: providing an electrically insulating layer made of a dielectric material, the insulating layer made of the dielectric material having electrically charged defects; applying a layer made of a ferroelectric material in an amorphous phase onto the insulating layer made of the dielectric material; and recrystallizing the layer made of the ferroelectric material by using an optical energy influx.

    30. The method according to claim 29, which further comprises carrying out the step of applying the layer made of the ferroelectric material at room temperature.

    Description

    [0059] Below, the invention is elucidated on the basis of exemplary embodiments, with reference being made to the attached figures, with equivalent or similar features being provided with the same reference sign; here, schematically:

    [0060] FIGS. 1a, 1b: show the setup and state of a multilayer system with nonvolatile and irradiation-sensitive capacitance when applying a voltage V1, the magnitude of which does not suffice to exceed the coercivity field strength;

    [0061] FIGS. 2a, 2b: show the setup and state of the multilayer system after applying a voltage +V2, the magnitude of which suffices to exceed the coercivity field strength;

    [0062] FIGS. 3a, 3b: show the setup and state of the multilayer system after applying a voltage V2, the magnitude of which suffices to exceed the coercivity field strength;

    [0063] FIGS. 4a, 4b1, 4b2, 4c: show the setup and state of the multilayer system after applying a voltage +V2, +V2.sub.j, V2, V2.sub.j, and the respectively associated capacitance-voltage characteristic;

    [0064] FIGS. 5a, 5b1, 5b2, 5c: show the stability of the capacitance of the multilayer system at the voltage points with the capacitance minima M1 and M2;

    [0065] FIGS. 6a, 6b, 6c: show the setup and state of the multilayer system when applying a voltage +V2 and V2 in the case of irradiation by electromagnetic waves and the associated capacitance-voltage characteristics;

    [0066] FIGS. 7a, 7b1, 7b2, 7c: show the stability of the capacitance of the multilayer system at the voltage points with the capacitance minima M1 and M2 in the case of irradiation by a monochromatic electromagnetic wave;

    [0067] FIGS. 8a, 8b, 8c: show the setup and state of the multilayer system when applying a voltage +V2 and V2 in the case of irradiation by particles, and possible structuring of an electrode, transparent to particles, at the front side of the multilayer system;

    [0068] FIGS. 9a, 9b, 9c: show a multilayer system with a crossbar array structure and a possibility for structuring the employed contacts and the ferroelectric material;

    [0069] FIGS. 10a, 10b, 10c: show a further multilayer system with a crossbar array structure and the possibility of structuring the employed contacts and the ferroelectric material and the insulator;

    [0070] FIGS. 11a, 11b, 11 c: show a further multilayer system with a crossbar array structure and the possibility of structuring the employed contacts and the ferroelectric material; and

    [0071] FIGS. 12a, 12b, 12c: show a further multilayer system with a crossbar array structure and a possibility of structuring the employed contacts and the ferroelectric material and the insulator.

    [0072] FIGS. 1a and 1b show the basic design of a multilayer system or a variable capacitance diode 1 in the form of the multilayer system in accordance with one embodiment. The variable capacitance diode 1 has a layer arrangement with a layer 1F made of a ferroelectric material (here e.g. BiFeO.sub.3), an electrically insulating layer 19 made of a dielectric material (here e.g. SiN) and a layer 15 made of a doped semiconductor material (here e.g. p-Si). The dielectric layer 19 has charged impurities IC (here e.g. positively charged impurities in the form of foreign atoms, which were introduced into the SiN layer during the application of the BiFeO.sub.3 layer).

    [0073] Moreover, the variable capacitance diode 1 has a first electrode 4 and a second electrode 5, wherein the first electrode 4 is applied in contact-making fashion at the ferroelectric layer 1F and the second electrode 5 is applied in contact-making fashion at the doped semiconductor layer 15 such that variable capacitance diode 1 has, in succession in the direction from the first electrode 4 to the second electrode 5, the ferroelectric layer 1F, the dielectric layer or insulating layer 19 and the doped semiconductor layer 15.

    [0074] The overall capacitance of the multilayer system is composed of the nonvolatile capacitance C.sub.I of the insulating layer 19 and the nonvolatile and irradiation-dependent capacitance C.sub.S, C.sub.S11 of the depletion region of the doped semiconductor 15 (where C.sub.S denotes the capacitance of the depletion region without incident radiation 11 and C.sub.S11 denotes the capacitance of the depletion region in the case of incident radiation 11). In the figures, the capacitances C.sub.I, C.sub.S, C.sub.S11 are visualized as an equivalent circuit diagram.

    [0075] When applying a voltage V1 to the front contact 4 and the associated counter contact 5, there predominantly is a change in the capacitance C.sub.S, C.sub.S11 of the depletion region of the doped semiconductor 15. The multilayer system can be applied to a substrate 3.

    [0076] Ferroelectric substances are always also piezoelectric. Without an externally applied voltage V1, an electric polarization forms spontaneously (not spontaneously) in the ferroelectric (piezoelectric) material 1F, but said electric polarization varies locally. In the region 2F, the ferroelectric layer 1F is contacted by the front contact 4. With an externally applied voltage V1, an electric polarization forms spontaneously (not spontaneously) in the region 2F of the ferroelectric (piezoelectric) material 1F (elucidated in the figures by the arrows, depicted using dashed lines, in the region 2F of the ferroelectric layer 1F). On account of the electric polarization in the region 2F of the ferroelectric material 1F, electric field lines 7F form in the multilayer system in the region of the ferroelectric (piezoelectric) material 2F, electric field lines 71 form in the region of the insulator 19 and electric field lines 7S form in the region of the doped semiconductor 15.

    [0077] When the electric field which is caused by the drop in the applied voltage V1 across the region 2F of the ferroelectric layer is less than the coercivity field strength of the ferroelectric material, the ferroelectric material 1F is not electrically polarized in a homogeneous fashion in the region 2F either and the electric field lines 7F are not directed. In this case, the electric field 7F in the ferroelectric region 2F has no influence on the distribution of the charges IC in the insulator 19. The distribution of the charges IC in the insulator 19 is stabilized in the case of sufficiently large electric polarization charges of the ferroelectric material 1F, but the charge centroid of the charges IC in the insulator 19 is displaced neither in the direction of the interface GFI between the ferroelectric layer 1F and the insulating layer 19 nor in the direction of the interface GIS between the insulating layer 19 and the doped semiconductor material 15.

    [0078] FIG. 1a elucidates the case without irradiation; FIG. 1b elucidates the case where the variable capacitance diode 1 is irradiated by electromagnetic waves 11W. When irradiating the multilayer system with electromagnetic waves 11W with an energy that is greater than the electronic bandgap of the doped semiconductor 15, the capacitance of the doped semiconductor 15 changes from C.sub.S to C.sub.S11.

    [0079] FIG. 2a shows the multilayer system when applying a positive voltage +V2 to the front contact 4, wherein (by an appropriate adjustment of the magnitude of the voltage) the electric field which is caused by the drop of the applied voltage +V2 across the region 2F of the ferroelectric layer 1F is greater than the coercivity field strength of the ferroelectric material such that the ferroelectric material 1F is electrically polarized in a homogeneoius fashion in the region 2F and the electric field lines 7F all point in the same direction. In this case, the electric field 7F in the region 2F of the ferroelectric material 1F influences the distribution of the charges IC in the insulator 19. As an example, in the present case in accordance with FIG. 2a, the positive charges IC are displaced in the direction of the interface GIS between the insulating layer 19 and the doped semiconductor material 15 by applying the voltage +V2 with the positive terminal at the first electrode 4 and the negative terminal at the second electrode 5, accompanied by a corresponding displacement of the associated charge centroid. The displacement of the charge centroid of the charged impurities in the dielectric layer 19 is elucidated in the figures by the arrow depicted to the left next to the dielectric layer 19. The positioning of the charged impurities IC in the insulator 19 is stabilized in the case of a sufficiently large electric polarization charge of the ferroelectric material 1F. The positioning of the charged impurities IC in the insulator 19 remains stabilized for as long as an externally applied voltage V1 does not change the electric polarization in the region 2F of the ferroelectric material 1F.

    [0080] FIG. 2b elucidates that the charge centroid of the charged impurities IC is displaced in the direction of the interface GIS after applying a voltage +V2, even when irradiating the multilayer system with electromagnetic waves 11W with an energy which is greater than the electronic bandgap of the doped semiconductor 15, and that the capacitance of the doped semiconductor 15 changes from C.sub.S to C.sub.S11.

    [0081] FIG. 3a shows the multilayer system when applying a negative voltage V2 to the front contact 4, wherein the electric field which is caused by the drop of the applied voltage V2 across the region 2F is greater than the coercivity field strength of the ferroelectric material such that the ferroelectric material 1F is electrically polarized in a homogeneous fashion in the region 2F and the electric field lines 7F all point in the same direction. In this case, the electric field 7F in the region 2F of the ferroelectric material 1F influences the positioning of the charged impurities IC in the insulator 19. As an example, in the present case in accordance with FIG. 3a, the positive charges IC are displaced in the direction of the interface GFI between the ferroelectric layer 1F and the insulating layer 19 by applying the voltage V2 with the negative terminal at the first electrode 4 and the positive terminal at the second electrode 5. The distribution of the charges IC in the insulator 19 is stabilized in the case of sufficiently large electric polarization charges of the ferroelectric material 1F. The distribution of the charges IC in the insulator 19 remains stabilized for as long as an externally applied voltage V1 does not change the electric polarization in the region 2F of the ferroelectric material 1F.

    [0082] FIG. 3b elucidates that the capacitance of the doped semiconductor 15 changes from C.sub.S to C.sub.S11 after applying a voltage V2, even when irradiating the multilayer system, which has charges IC displaced in the direction of the interface GFI, with electromagnetic waves 11W with an energy which is greater than the electronic bandgap of the doped semiconductor 15.

    [0083] FIG. 4b1 shows two distinguishable capacitance-voltage (CV) characteristics of the multilayer system without irradiation in a manner dependent on the start point of the externally applied voltage V. In order to detect the capacitance C at a voltage V, the DC voltage V is applied to the electrodes of the multilayer system and superimposed by an AC voltage V.sub.ac; the capacitance is established in a manner known per se from the response of the system.

    [0084] If a negative voltage V2 is initially applied between the front side contact 4 and the rear side contact 5 (FIG. 3a and FIG. 4a), e.g. positive charges IC are displaced in the direction of the interface GFI between the insulating layer 19 and the region 1F and/or region 2F and the flatband voltage is less than in the case of uniformly distributed charges IC in the insulator 19. The corresponding CV curve has a minimum M1=(U.sub.1,min; C.sub.1,min).

    [0085] If a positive voltage +V2 is initially applied between the front side contact 4 and the rear side contact 5 (FIG. 2a and FIG. 4c), e.g. positive charges IC are displaced in the direction of the interface GIS between the insulating layer 19 and the doped semiconductor material 15 and the flatband voltage is greater than in the case of uniformly distributed charges IC in the insulator 19. The corresponding CV curve has a minimum M2=(U.sub.2,min; C.sub.2,min).

    [0086] The difference in the flatband voltages for the two possible extremal distributions of the charges IC in the insulator 19 is greater, the greater the electric polarization charge of the ferroelectric material, the greater the concentration of the charges IC in the insulator 19 and the thicker the insulator 19 are. In the present case, the thickness of the insulating layer 19 is 50 nm as an example, as result of which a reliable electrical insulation and a reliably detectable geometric displacement of the charge centroid of the charged impurities IC are ensured. Moreover, the thicknesses of the ferroelectric layer 1F and of the dielectric layer 19 are selected in such a way that the product of the volume charge density of the charged impurities IC and the thickness of the dielectric layer 19, in terms of magnitude, at most equals the polarization surface charge density of the ferroelectric layer 1F in the polarized state, as a result of which a pronounced variation of the charge centroid of the charged impurities IC in the dielectric layer 19 depending on the polarization state of the ferroelectric layer 1F is made possible.

    [0087] FIG. 4b2 shows the CV characteristics of the variable capacitance diode 1 for a plurality of different switching voltages V2.sub.j (with j=1, 2, 3, 4)which have the same polarity but different voltage magnitudestogether with a CV characteristic for a switching voltage +V2 with an opposite polarity in relation to the switching voltages V2.sub.j. From the figure, it is possible to identify that the CV characteristics for the switching voltages V2.sub.j have minima M1.sub.j which are clearly distinguishable from one another, whereas the CV characteristic for the switching voltage +V2 has a minimum M2.

    [0088] FIGS. 5a to 5c show how the two possible extremal distributions of the charges IC in the insulator 19 are set by a single application of a voltage pulse with an amplitude V2 (FIG. 5a) or +V2 (FIG. 5c), in which the coercivity field strength in the ferroelectric layer 1F is exceeded. Below, such a voltage pulse is referred to as switching or write voltage U.sub.write. FIG. 5b1 shows that the capacitance of the multilayer system is not changed when applying a DC voltage with a small value U.sub.1,min or U.sub.2,min, at which the CV curve has the minimum M1 or the minimum M2.

    [0089] By way of example, if the write voltage pulse V2 is applied, the CV curve of the multilayer system has the minimum M1 and the capacitance read with a read-out voltage U.sub.read=U.sub.1,min of the minimum M1 is less than the capacitance read out with a read-out voltage U.sub.read=U.sub.2,min of the minimum M2. By contrast, if the write voltage pulse +V2 is applied, the CV curve of the multilayer system has a minimum M2 and the capacitance read with a read-out voltage U.sub.read=U.sub.2,min of the minimum M2 is less than the capacitance read out with a read-out voltage U.sub.read=U.sub.1,min of the minimum M1. FIG. 5b2 shows that the two possible extremal distributions of the charges IC in the insulator 19 are set in nonvolatile fashion and not changed by applying the read-out voltage on a timescale greater than 300 minutes.

    [0090] Therefore, the variable capacitance diode 1 can be put into a stable first switching state by applying the first switching voltage V2 and it can be put into a stable second switching state by applying the second switching voltage +V2, wherein these two switching states have different capacitance characteristics. The switching voltages are also referred to as write voltages.

    [0091] Accordingly, the variable capacitance diode 1 can act e.g. as a storage element for storing binary information, wherein the first switching state and the second switching state act as first storage state and second storage state and wherein a read-out of the storage state can take place by detecting the capacitance of the variable capacitance diode at the voltage U.sub.1,min or U.sub.2,min.

    [0092] FIGS. 6a to 6c elucidate the capacitance-voltage (CV) characteristics of the multilayer system in the first switching state and in the second switching state when irradiated by electromagnetic waves 11W in a manner dependent on the start point of the externally applied voltage V for different wavelengths of the incident radiation. If a negative voltage V2 is initially applied between the front side contact 4 and the rear side contact 5 (FIG. 6a), e.g. positive charges IC are displaced in the direction toward the interface GFI between the ferroelectric layer 1F and the insulating layer 19 and the flatband voltage is less than in the case of uniformly distributed charges IC in the insulator 19. The corresponding CV curve has a minimum M1 and the position of the minimum depends on the wavelength of the employed light (FIG. 6b).

    [0093] If a positive voltage +V2 is initially applied between the front side contact 4 and the rear side contact 5 (FIG. 6c), e.g. positive charges IC are displaced in the direction toward the interface GIS between the insulating layer 19 and the doped semiconductor material 15 and the flatband voltage is greater than in the case of uniformly distributed charges IC in the insulator 19. The corresponding CV curve has a minimum M2 and the position of the minimum depends on the wavelength of the employed light (FIG. 6b).

    [0094] By way of example, when using BiFeO.sub.3 as ferroelectric material, SiN as insulator with positive charges (in the form of charged impurities) and p-conducting silicon as a semiconductor material, the minimum M1 and the minimum M2 are displaced to smaller voltage values with increasing wavelength A in the case of irradiation with monochromatic light with the same intensity and different wavelengths A (FIG. 6b). In another example, when using BiFeO.sub.3 as ferroelectric material, SiN as insulator with positive charges and p-conducting silicon as a semiconductor material, both the minimum M1 and the minimum M2 lie at unchanging voltage values U.sub.1,min and U.sub.2,min in the case of irradiation with monochromatic light with different intensities and the same wavelength A, but the capacitance value C.sub.1,min and C.sub.2,min is shifted to higher values with increasing intensity (not shown here). The capacitance value of the minimum M1 and at the minimum M2 can be set in a value range between the smallest capacitance value (no irradiation) and the largest possible capacitance value (saturated irradiation) by varying the light intensity.

    [0095] By way of example, the top electrode 4 and/or the counter electrode 5 can be designed to be transparent for the radiation to be detected for improved detection of the radiation.

    [0096] FIGS. 7a to 7c show how the two possible extremal distributions of the charges IC in the insulator 19 are set by a single application of a voltage pulse with the amplitude V2 (FIG. 7a) or with the amplitude +V2 (FIG. 7c), even in the case of irradiation with monochromatic light (here, with a wavelength =300 nm) and constant light intensity. This voltage pulse is once again referred to as write voltage U.sub.write. FIG. 7b1 shows that the capacitance of the multilayer system is not changed when applying a DC voltage with the small value U.sub.1,min or U.sub.2,min, at which the CV curve has the minimum M1 or the minimum M2 in the case of irradiation with =300 nm. By way of example, if the write voltage pulse V2 is applied, the CV curve of the multilayer system has the minimum M1 and the capacitance read with a read-out voltage U.sub.read=U.sub.1,min of the minimum M1 is less than the capacitance read out with a read-out voltage U.sub.read=U.sub.2,min of the minimum M2. By way of example, if the write voltage pulse +V2 is applied, the CV curve of the multilayer system has the minimum M2 and the capacitance read with a read-out voltage U.sub.read=U.sub.2,min of the minimum M2 is less than the capacitance read out with a read-out voltage U.sub.read=U.sub.1,min of the minimum M1. FIG. 7b2 shows that the two possible extremal distributions of the charges IC in the insulator 19 are set in nonvolatile fashion and not changed by applying the read-out voltage on a timescale greater than 300 minutes, even in the case of irradiation with =300 nm.

    [0097] FIGS. 8a to 8c show a multilayer system with a top contact 4 permeable to particles (FIG. 8b). The two possible extremal distributions of the charges IC in the insulator 19 are once again set by a single application of a write pulse U.sub.write with the amplitude V2 (FIG. 8a) or the amplitude +V2 (FIG. 8c). Each change of the charges ICe.g. in the number, the charge state and/or the distributionin the insulator 19 in the case of irradiation with particles 11T influences the two distinguishable capacitance-voltage curves of the multilayer system of the variable capacitance diode 1.

    [0098] Charged particles can be accelerated or decelerated in the electric field 7F of the ferroelectric material 2F. Moreover, the position of the charge centroid of the impurities IC in the insulator can be influenced in a controlled manner by introducing additional charged particles in the insulator. By way of example, rare earth ions can be introduced into the insulator by ion implantation into the insulator prior to the application of the ferroelectric layer 1F. If the particles to be detected change the charge state of the rare earth ions, then there is also a change in the extremal distribution of the charges IC in the insulator 19.

    [0099] Accordingly, the variable capacitance diode 1 can act e.g. as a detector element for detecting radiation incident thereon, wherein the detector element can be placed into a defined state by application of the first switching voltage V2 or the second switching voltage +V2 and wherein the radiation incident on the variable capacitance diode is characterizable by detecting and evaluating the capacitance characteristic present (e.g. the position of the minimum of the CV characteristic).

    [0100] Controlling the charges IC in the insulator of the multilayer system is successful locally if both the top contact 4 and the bottom contact 5 have a structured embodiment. FIGS. 9 to 12 each show crossbar arrays with structured conductive surface contacts 4 and associated, opposing counter contacts 5 which are rotated by 90. The advantage of this arrangement according to the invention of the definition of the crossbar array is that the non-volatile, irradiation-sensitive capacitance can be read locally at each crossing point at the same time.

    [0101] The depicted arrangement in each case comprises a semiconductor 15, an insulator 19 and a ferroelectric layer 1F. The ferroelectric layer 1F can be produced by thin-film growth, e.g. by means of magnetron sputtering or by means of pulsed laser plasma deposition at growth temperatures of between 350 C. and 1000 C. However, it is advantageous to produce the ferroelectric layer 1F in the amorphous phase at room temperature by means of magnetron sputtering or by means of pulsed laser plasma deposition and to subsequently recrystallize it on the timescale of milliseconds by means of FLA (flash lamp annealing). As a result, the heat influx into the doped semiconductor and into the substrate 3 is significantly reduced. A rear side electrode 5 is applied to the semiconductor and a front side electrode 4 is applied to the ferroelectric layer. The insulator 19 contains a significant number of charged impurities IC. The thickness of the insulator is at least 1 nm. The thickness of the insulator preferably lies in the range between 50 nm and 500 nm. The ferroelectric layer 1F can be electrically polarized by applying a voltage between the front side electrode 4 and the rear side electrode 5 in such a way that positive (negative) polarization charges are formed at the interface between ferroelectric layer and semiconductor and negative (positive) polarization charges are formed between ferroelectric layer and insulator. The polarization charges in the ferroelectric layer cause a drift of the charged impurities IC. The charge centroid of the drifted impurities is stable. The charge centroid is different for the two polarization states of the ferroelectric layer. The capacitance-voltage curve (C-V) of the whole arrangement is similar to the C-V curve of a metal-insulator-semiconductor structure and depends on the position of the charge centroid in the insulator. The charge state of the impurities in the interface between ferroelectric and dielectric layers GFI and in the interface between the dielectric and semiconducting layers GIS is stable in the variable capacitance diode. In the voltage range described as a flatband voltage of a metal-insulator-semiconductor structure, the difference between the two capacitance-voltage curves is particularly large. The values of the two C-V curves approach one another in the voltage region of the accumulation and inversion.

    [0102] In accordance with the example above, the multilayer system of the variable capacitance diode has a material sequence of electrode, BiFeO.sub.3 as ferroelectric, SiN as dielectric, p-Si as doped semiconductor, electrode. However, provision can also be made of e.g. using YMnO.sub.3 as ferroelectric instead of using BiFeO.sub.3 as ferroelectric. The electrodes can consist of e.g. aluminum or gold; in particular, provision can be made for the first electrode to consist of aluminum and for the second electrode to consist of gold.

    [0103] The arrangements elucidated in the figures can be used as capacitance for storing binary information. The write voltage polarizes the ferroelectric layer and stabilizes one of the two charge centroids in the insulator. The information is read by measuring the capacitance by applying a read-out voltage from the region of the flatband range. The storage state, i.e. the polarization state of the ferroelectric layer and hence also the position of the stabilized charge centroid, is not changed by measuring the capacitance at the read-out voltage.

    [0104] The arrangements elucidated in the figures can moreover be used in the case of irradiation with electromagnetic waves and/or particles as detector for detection of same, for example when using at least one electrode 4, 5 transparent to electromagnetic waves and/or particles. In the case of monochromatic illumination, the voltage values U.sub.1,min and U.sub.2,min of the C-V curves, at which the minima of the two C-V curves respectively occur, change when the wavelength of the electromagnetic wave changes. An increase in the light intensity in the case of an unchanging wavelength increases the value of the capacitance C.sub.1,min and C.sub.2,min at the voltage values U.sub.1,min and U.sub.2,min of the C-V curves, at which the minima of the two C-V curves respectively occur, without changing the voltage value of the respective minimum. Particles incident on the arrangement can change the polarization state of the ferroelectric layer, the concentration and distribution of the impurities in the insulating layer, and the doping of the semiconductor. It is advantageous if the polarization state of the ferroelectric layer is changed by irradiation with particles. The polarization of the ferroelectric layer can be restored after the particle detection by a repeated write pulse.

    [0105] What is advantageous in the case of an arrangement as an individual pixel is that, for example, the change in the photocapacitance corresponds to the spectral response and, in the case of constant luminous intensity and in comparison with the standard CCD, only depends on the wavelength of the electromagnetic wave and not on the signal integration time (accumulation of photo-generated charges in the standard CCD and measurement of the photocapacitance of the illuminated arrangement).

    [0106] What is advantageous in the case of the arrangement in a pixel array is that, for example, the readout of the photocapacitance of each pixel can take place simultaneously in the case of a test frequency of up to several MHz. As result, it is possible to record up to 1-10 million images per minute (whereas the line-by-line readout of the photo-generated charges in standard CCDs limits the frequency with which the information can be read). On account of the isolatability of each individual pixel from the neighboring pixel, the lateral resolution of the arrangement in the case of the parallel readout of the photocapacitance is greater than the lateral resolution of a standard CCD (in particular since pixels of a line of the pixel array need not be electrically connected). The photocapacitance of a pixel returns to the initial value after switching off the illumination by electromagnetic waves, i.e. it returns to the value of the photocapacitance of the pixel in the dark case (whereas a reset operation needs to be carried out in the case of standard CCDs in order to prevent an overflow of accumulated photo-generated charges).

    LIST OF USED REFERENCE SIGNS

    [0107] 1 Variable capacitance diode [0108] 1F Layer of ferroelectric material [0109] 2F Portion of the ferroelectric layer covered by the first electrode [0110] 3 Substrate [0111] 4 First electrode/front contact [0112] 5 Second electrode/counter contact [0113] 7F Electric field lines in the ferroelectric layer [0114] 7I Electric field lines in the dielectric layer [0115] 7S Electric field lines in the semiconducting layer [0116] 11 Radiation [0117] 11W Radiation of electromagnetic waves [0118] 11T Radiation of particles [0119] 15 Layer made of doped semiconductor material [0120] 19 Layer made of dielectric material [0121] IC Charged impurities in the dielectric layer [0122] C.sub.I Capacitance of the dielectric layer [0123] C.sub.S Capacitance of the depletion region of the semiconductor layer without radiation [0124] C.sub.S11 Capacitance of the depletion region of the semiconductor layer with radiation [0125] GFI Interface between ferroelectric and dielectric layers [0126] GIS Interface between dielectric and semiconducting layers [0127] V2, V2.sub.j External voltage applied to the two electrodes of the variable capacitance diode with the negative terminal at the front contact and with a magnitude at which the coercivity field strength of the ferroelectric material is exceeded [0128] +V2, +V2.sub.j External voltage applied to the two electrodes of the variable capacitance diode with the positive terminal at the front contact and with a magnitude at which the coercivity field strength of the ferroelectric material is exceeded [0129] M1, M1.sub.j Minimum of the capacitance voltage characteristic of the variable capacitance diode after applying a voltage V2, V2.sub.j to the electrodes of the variable capacitance diode [0130] M2, M2.sub.j Minimum of the capacitance voltage characteristic of the variable capacitance diode after applying the voltage +V2, +V2.sub.j to the electrodes of the variable capacitance diode [0131] U.sub.1,min, U.sub.1j,min DC read-out voltage for reading the capacitance at the minimum M1, M1.sub.j of the capacitance characteristic [0132] U.sub.2,min, U.sub.2j,min DC read-out voltage for reading the capacitance at the minimum M1, M1.sub.j of the capacitance characteristic