POWER SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A POWER SEMICONDUCTOR COMPONENT

Abstract

A power semiconductor component is specified, having a power semiconductor device arranged within a housing, wherein a heat sink is exposed on a first surface of the housing; a wiring substrate which receives the housing with the power semiconductor device and which has a first main surface and a second main surface. A heat dissipation region with increased thermal conductivity is arranged on the second main surface. The housing is arranged on the wiring substrate in such a way that the heat sink is connected to the heat dissipation region via a solder layer. A number of spacers which are arranged between the heat sink and the heat dissipation region are embedded in the solder layer. Furthermore, a method for producing a power semiconductor component is specified.

Claims

1. A power semiconductor component, comprising: a power semiconductor device arranged within a housing, wherein a heat sink is exposed on a first surface of the housing; and a wiring substrate which receives the housing with the power semiconductor device and which has a first main surface and a second main surface, wherein a heat dissipation region with increased thermal conductivity is arranged on the second main surface; wherein the housing is arranged on the wiring substrate in such a way that the heat sink is connected to the heat dissipation region via a solder layer, wherein a number of spacers which are arranged between the heat sink and the heat dissipation region are embedded in the solder layer, and wherein the spacers are formed from a material that has good electrical and thermal conductivity.

2. The power semiconductor component as claimed in claim 1, wherein the power semiconductor device arranged in the housing is designed to be through-hole-mountable.

3. The power semiconductor component as claimed in claim 1, wherein the wiring substrate has a number of vias through which the solder material is introduced between the heat sink and the heat dissipation region of the wiring substrate.

4. The power semiconductor component as claimed in claim 1, wherein the power semiconductor device arranged in the housing is designed to be surface-mountable.

5. The power semiconductor component as claimed in claim 1, wherein the housing with the power semiconductor device is electrically connected to the heat dissipation region by means of the spacers and by means of a solder layer.

6. The power semiconductor component as claimed in claim 1, wherein the heat sink has an area a on the first surface and the heat dissipation region has an area A on the second main surface, where a <A applies.

7. A method for producing a power semiconductor component as claimed in claim 1, comprising the following: providing a power semiconductor device arranged within a housing, wherein a heat sink is exposed on a first surface of the housing; providing a wiring substrate having a first main surface and a second main surface, wherein a heat dissipation region with increased thermal conductivity is arranged on the second main surface; applying a number of spacers to the wiring substrate in a mounting region of the heat dissipation region, and placing the housing with the power semiconductor device onto the spacers in the mounting region; subsequently introducing solder material into an intermediate space between the heat sink and the heat dissipation region.

8. The method as claimed in claim 7, wherein solder material is introduced by means of vias arranged in the wiring substrate.

9. The method as claimed in claim 7, wherein solder material is introduced by introducing pieces of solder wire.

10. The method as claimed in claim 7, wherein adhesive spots of an SMD adhesive are used as spacers.

11. The power semiconductor component as claimed in claim 2, wherein the wiring substrate has a number of vias through which the solder material is introduced between the heat sink and the heat dissipation region of the wiring substrate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Embodiments of the invention will be described by way of example below with reference to schematic drawings.

[0029] FIG. 1 schematically shows a power semiconductor component according to one embodiment of the invention in cross section, and

[0030] FIG. 2 schematically shows the power semiconductor component as per FIG. 1 in a plan view.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] The power semiconductor component 1 as per FIG. 1 has a power semiconductor device 2, of which only a plastic housing 4 is shown in FIG. 1, and also connection pins 24 protruding from the plastic housing 4 and a heat sink 6 exposed on a first surface 5 of the housing 4. The power semiconductor device 2 additionally has at least one power semiconductor chip, for example a MOSFET, which is thermally and possibly also electrically connected to the heat sink 6. The power semiconductor device 2 is electrically contact-connected via the connection pins 24 and possibly via the heat sink 6.

[0032] The embodiment shown is a through-hole-mountable power semiconductor device 2. Alternatively, however, it could also be a surface-mountable power semiconductor device.

[0033] The power semiconductor component 1 also has a wiring substrate 10 which, in the embodiment shown, is designed as a PCB substrate and has a first main surface 12 and a second main surface 14 situated opposite the latter. The wiring substrate 10 comprises substantially a matrix made of plastic, in which contact connection areas 18 for the connection pins 24, conductor tracks (not illustrated) and a heat dissipation region 16 made of copper are embedded. The heat dissipation region 16 is exposed on a second main surface 14 of the wiring substrate 10 and is provided for receiving the power semiconductor device 2 and for establishing thermal (and possibly also electrical) contact with the heat sink 6.

[0034] The wiring substrate 10 has a number of vias 25, 26. In this case, vias 25 in the region of contact connection areas 18 are provided as electrical vias through which the connection pins 24 are led. Vias 26 in the region of the heat dissipation region 16 are embodied as thermal vias and are used, among other things, to dissipate heat.

[0035] A solder layer 20 for the electrical and mechanical connection of the power semiconductor device 2 and the wiring substrate 10 is applied both to the heat dissipation region 16 and to the contact connection areas 8. The power semiconductor device 2, in particular the heat sink 6, is connected to the heat dissipation region 16 in an electrically and thermally conductive manner via the solder layer 20. The connection pins 24 are connected to the contact connection areas 18 in an electrically and thermally conductive manner via the solder layer 20.

[0036] The solder layer 20 has a high thickness d. It is therefore not printed, as is otherwise usually customary, onto the wiring substrate 10. Rather, the housing 4 with the power semiconductor device 2 is first placed onto the heat dissipation region 16, and fixed there, by means of spacers 28 which are SMD adhesive spots in the embodiment shown. The housing 4 or the heat sink 6 exposed on its first surface 5 is then soldered to the heat dissipation region 16 by means of through-hole technology. In this case, solder material for the solder layer 20 is introduced from the first main surface 12 through the vias 26 into the intermediate space between the heat sink 6 and the wiring substrate 10. At the same time, the solder layer 20 can also be applied to the contact connection areas 18 through the vias 25. However, since this does not have to have a particularly great thickness, it can also be printed on using a standard process.

[0037] Here, the quantity of solder and the pressure with which the solder is brought into the intermediate space are controlled in such a way that the solder layer 20 fills substantially the entire intermediate space between the heat sink 6 and the wiring substrate 10. The vias 26 can also be filled with solder material or they can be kept free or filled with another material which preferably has good thermal conductivity.

[0038] FIG. 2 shows the power semiconductor component 1 in a plan view. It can be seen in this view that the heat dissipation region 16 has a significantly larger areal extent than the housing 4 or the heat sink 6, which is not visible in FIG. 2. In the embodiment shown, the area A of the heat dissipation region 16 is more than twice as large as the area a of the heat sink 6 that is exposed on the first surface 5 of the housing 4.

[0039] As can be seen in FIG. 2, the heat dissipation region 16 thus protrudes laterally to a significant extent beyond the housing 4. In the embodiment shown in FIG. 2, said heat dissipation region protrudes beyond the housing 4 on all sides.

[0040] The copper material of the heat dissipation region 16 and also the solder material of the solder layer 20 form an increased thermal mass, which can both buffer temporary temperature increases due to power peaks and, owing to its large spatial extent, can achieve a good heat spread.