KIRIGAMI ENABLED METHOD FOR FABRICATION OF LARGE-FORMAT ELECTRONIC DEVICE ARRAYS

Abstract

A kirigami enabled manufacturing method and systems are provided. The method includes providing a plurality of substrate units for mounting electronic devices in an initial state; providing at least one connector connecting adjacent substrate units of the plurality of substrate units in the initial state, wherein the at least one connector includes one or more foldable areas defined by a plurality of creases and n stretchable layers stacking on one another; folding the one or more foldable areas of the connector along the plurality of creases by 180°; and flipping and expanding the n stretchable layers of the connector into one layer of a planar predetermined pattern connecting the plurality of substrate units. The enabled manufacturing method and systems expand a small area of thin film material to a large area network by the folding and expanding processes.

Claims

1. A kirigami enabled manufacturing method comprising: providing a plurality of substrate units for mounting electronic devices in an initial state; providing at least one connector connecting adjacent substrate units of the plurality of substrate units in the initial state, wherein the at least one connector comprises one or more foldable areas defined by a plurality of creases and n stretchable layers stacking on one another; folding the one or more foldable areas of the connector along the plurality of creases by 180°; and flipping and expanding the n stretchable layers of the connector into one layer of a planar predetermined pattern connecting the plurality of substrate units.

2. The manufacturing method of claim 1, wherein n is an odd integer number greater than or equal to 3.

3. The manufacturing method of claim 1, when the at least one connector includes a plurality of connectors, further comprising orthogonally expanding adjacent connectors to form a pattern of k*k matrix of substrate units, wherein k is an integer number greater or equal to 2.

4. The manufacturing method of claim 3, wherein when lengths of the plurality of connectors in the initial status are same, the pattern of k*k matrix of substrate units formed after expanding has a shape of a rectangle.

5. The manufacturing method of claim 3, wherein when lengths of the plurality of connectors in the initial status are not same, the pattern of k*k matrix of substrate units formed after expanding has a three-dimensional (3D) structure.

6. The manufacturing method of claim 1, wherein the plurality of substrate units are made of flexible circuit substrates.

7. A manufacturing system, comprising: a plurality of substrate holders each coupled to a unit of a foldable substrate pattern; a plurality of slide rails arranged in both a row direction and a column direction; a supporting structure; and a motor; wherein each substrate holder is connected to a first corresponding slide rail in the row direction and a second corresponding slide rail in the column direction, and the slide rails are driven by the motor.

8. The manufacturing system of claim 7, wherein the plurality of slide rails are configured to synchronize movements of the unit of the foldable substrate pattern in the row direction or in the column direction to flip and expand the foldable substrate pattern into a planar substrate pattern of a larger format.

9. A kirigami enabled manufacturing system comprising: a substrate having a plurality of substrate units for mounting electronic devices, and at least one connector connecting adjacent substrate units of the plurality of substrate units, wherein the at least one connector comprises one or more foldable areas defined by a plurality of creases and n stretchable layers stacking on one another; a releasing tape; a base mold; a pushing mold; and a pushing film.

10. The manufacturing system of claim 9, wherein the releasing tape has top and bottom surfaces with adhesives to attach the substrate onto the base mold.

11. The manufacturing system of claim 9, wherein areas on the releasing tape corresponding to the foldable area of the substrate are hollowed out.

12. The manufacturing system of claim 9, wherein the base mold comprises a metal or another rigid material to support the substrate.

13. The manufacturing system of claim 9, wherein areas of the base mold corresponding to the foldable areas of the substrate are hollowed out.

14. The manufacturing system of claim 9, wherein the pushing mold is made of a rigid material.

15. The manufacturing system of claim 9, wherein the pushing mold is configured to install the pushing film at a position configured to corresponding to the foldable areas of the substrate.

16. The manufacturing system of claim 9, wherein the pushing film is made of plastic or another elastic material.

17. A kirigami enabled manufacturing method comprising: providing a substrate having a plurality of substrate units for mounting electronic devices, and at least one connector connecting adjacent substrate units of the plurality of substrate units, wherein the at least one connector comprises one or more foldable areas and n stretchable layers stacking on one another; attaching a releasing tape to a base mold; transferring the substrate to the base mold; applying adhesive to areas overlapping after folding; pushing up the foldable areas; folding the foldable areas with a rolling device; pressing on the foldable areas and waiting for the adhesive to cure; rotating the base mold and the substrate by 90 degrees and repeatedly performing the folding procedures to the substrate for other folding directions; and releasing the folded substrate from the base mold.

18. A manufacturing method comprising: performing steps of the kirigami enabled manufacturing method of claim 17; attaching electronic devices arrays to the substrate; and covering the electronic devices arrays and the substrate with a conformal material to protect the electronic devices arrays and circuits of the substrate.

19. The manufacturing method of claim 18, wherein the attaching electronic devices arrays to the substrate is performed by welding or bonding.

20. The manufacturing method of claim 18, wherein the conformal material is one of a plastic film, silica gel, and fabric.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG. 1 is a schematic representation of a single connector pattern, according to an embodiment of the subject invention.

[0013] FIG. 2 is a schematic representation of a folding and expanding process of the single connector pattern, according to an embodiment of the subject invention.

[0014] FIG. 3 is a schematic representation of an isometric view of the folding and expanding process, according to an embodiment of the subject invention.

[0015] FIG. 4 is a schematic representation of a first embodiment folding and expanding process of a 2*2 electronic device array, according to an embodiment of the subject invention.

[0016] FIG. 5 is a schematic representation of a second embodiment of a 2*2 electronic device array with larger expansion rate and higher area utilization rate, according to an embodiment of the subject invention.

[0017] FIG. 6 is a schematic representation of 4*4 array using high efficiency design, according to an embodiment of the subject invention.

[0018] FIG. 7 is a schematic representation of a flexible circuit substrate designed for a 3D hemispherical curved pattern at its initial status, according to an embodiment of the subject invention.

[0019] FIG. 8 is a schematic representation of the 3D folded and expanded hemispherical curved pattern, according to an embodiment of the subject invention.

[0020] FIG. 9 is a schematic representation of the molds and tools for folding a 3*3 electronic device array, according to an embodiment of the subject invention.

[0021] FIG. 10 is a schematic representation of an expanding system for an electronic device 3*3 array, according to an embodiment of the subject invention.

DETAILED DISCLOSURE OF THE INVENTION

[0022] The embodiments of subject invention pertain to a kirigami enabled method and systems for fabricating large-format electronic device arrays.

[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well as the singular forms, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof.

[0024] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one having ordinary skill in the art to which this invention pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0025] When the term “about” is used herein, in conjunction with a numerical value, it is understood that the value can be in a range of 90% of the value to 110% of the value, i.e. the value can be +/−10% of the stated value. For example, “about 1 kg” means from 0.90 kg to 1.1 kg.

[0026] In describing the invention, it will be understood that a number of techniques and steps are disclosed. Each of these has individual benefits and each can also be used in conjunction with one or more, or in some cases all, of the other disclosed techniques. Accordingly, for the sake of clarity, this description will refrain from repeating every possible combination of the individual steps in an unnecessary fashion. Nevertheless, the specification and claims should be read with the understanding that such combinations are entirely within the scope of the invention and the claims.

[0027] In the embodiments of the subject invention, dense circuits and devices are first fabricated on a small area of the substrate and then by folding and expanding steps, the small area substrate is expanded into large-area electronic device arrays, realizing flat or curved configurations with various sizes and device densities.

[0028] In one embodiment of the subject invention, the kirigami enabled manufacturing method includes following steps: substrate fabricating, device installation (which can also be performed after the step of folding and expanding), folding and expanding, and packaging (which according to specific scenarios of applications can be omitted). Each step will be explained with greater details below.

[0029] Substrate fabricating: flexible circuit substrates based on kirigami enabled design patterns can be fabricated by flexible printed circuit (FPC) processing technology or other suitable thin-film fabrication processes.

[0030] Device installation: the electronic devices are mounted on the flexible circuit substrates by methods including, but not limited to, welding and bonding.

[0031] Folding and expanding: the flexible circuit substrates are folded and expanded with aid of customized molds and tools to obtain large-format electronic device arrays.

[0032] Packaging: the flexible circuit substrates are cover with conformal materials such as plastic film, silica gel, or fabric to protect the circuit and devices of the flexible circuit substrates.

[0033] Following are examples that illustrate procedures for practicing the invention. These examples should not be construed as limiting.

Kirigami Enabled Fabrication Method

Substrate Fabrication

[0034] A flexible circuit substrate having circuits is first fabricated, and electronic devices are then mounted on the flexible circuit substrate. The flexible circuit substrate comprises substrate units (“islands”) for mounting the electronic devices and connectors for carrying connecting wires. Adjacent islands are connected by the connector at which both the folding and expanding deformations of the substrate are performed. Each connector comprises one or more foldable areas defined by a plurality of creases and a plurality of stretchable layers stacking on one another. It is noted that the number of layers of the connector has to be an odd number.

[0035] Referring to FIG. 1, the simplest substrate pattern unit 100 of the kirigami enabled patterns includes two substrate units (“islands”) 110 connected by a connector 120. The substrate pattern unit 100 is defined by three key parameters: l.sub.0 is a length of connector in an initial status, w is a width of the connector, and a is a side length of the island.

[0036] In certain embodiment, the flexible circuit substrate may be made of a thin-film material such as polyimide (PI), polyethylene terephthalate (PET), Parylene-C, or paper.

[0037] In one embodiment, each island has a shape of a square.

[0038] In other embodiments, the island has a shape of a rectangle or any other suitable shapes.

Substrate Elongation

[0039] Referring to FIG. 2 and FIG. 3, the elongation process is divided into two steps. The first step is folding the one or more folding areas by 180° and the second step is stretching the plurality of stretchable layers of the flexible circuit substrate into one layer of a flat predetermined pattern connecting the plurality of substrate units.

[0040] By varying the length and width of the connector, different the elongation rate can be achieved. For instance, the connector in FIG. 2 has three stretchable layers. For a longer elongation, the connector may have five layers, seven layers or other number of layers. It is noted that the number of layers of the connector has to be an odd number.

2D Expansion of Substrate

[0041] In one embodiment of the subject invention, the one-dimensional (1D) elongation process can be easily turned into a two-dimensional (2D) expansion process by expanding the connectors orthogonally. FIG. 4 shows orthogonally expanding the pattern of FIG. 3 into a 2*2 matrix of electronic device arrays.

[0042] It is observed that in the 2D expansion process of FIG. 4, there is an area in the middle of the pattern not expandable and thus wasted.

[0043] In one embodiment, as shown in FIG. 5, a flexible substrate pattern is provided to reduce the wasted area.

[0044] In an array with a larger number of islands, the advantage of the design is much greater. On one hand, the wasted area is reduced. On the other hand, the expansion rate of the flexible circuit substrate is increased. FIG. 6 shows 4*4 electronic device arrays based on a highly efficient flexible substrate pattern.

3D Structure of Substrate

[0045] As described above, each island is connected to its neighboring islands through connectors and each connector can be independently designed. The length of the connector determines the length of the rows and columns of the electronic device arrays, and the length of the rows and columns determines the shape of the entire electronic device arrays. If all rows have the same length and all columns have the same length, the electronic device arrays are formed to have a shape of a rectangle. On the other hand, if the lengths of the row are not the same or the lengths of the columns are not the same, a three-dimensional (3D) structure of the flexible circuit substrate can be constructed.

[0046] In one embodiment, a flexible circuit substrate designed for a 3D hemispherical curved pattern at its initial status (before being folded and expanded) is illustrated in FIG. 7. The gaps shown in FIG. 7 are configured to control the lengths of the connectors. The lengths of the gaps are configured to allow the connectors to have different lengths after the flexible circuit substrate is expanded. In turn, the lengths of the connectors between the islands control the shape of the expanded 3D hemispherical curved pattern.

[0047] Next, the 2D thin-film flexible circuit substrate of FIG. 7 is converted, by the folding and expanding processes, into the 3D hemispherical curved pattern having a network of curve surfaces as demonstrated in FIG. 8.

Folding Tools

[0048] The flexible circuit substrate can be folded through customized molds and tools. As illustrated in FIG. 9, following molds and tools are provided for folding.

[0049] The releasing tape 710 having adhesives on both sides of the tape is provided to fix the flexible circuit substrate 700 onto the base mold 720. The areas on the tape that correspond to the folding area of the flexible circuit substrate 700 are hollowed out.

[0050] The base mold 720 is made by metal or other rigid materials to support the flexible circuit substrate 700. In the same manner, the areas of the base mold 720 corresponding to the folding area of the flexible circuit substrate 700 are hollowed out.

[0051] The pushing mold 730 is made of rigid materials and the pushing film 740 is made of plastic or other elastic materials. The pushing mold 730 is used to install the pushing film 740 and the position of the pushing film 740 is included in the folding area of the flexible circuit substrate 700.

[0052] With the aid of the folding tools, following steps of the folding processes are performed: [0053] picking up the freestanding flexible circuit substrate by a blue tape, [0054] attaching the releasing tape to the base mold, [0055] transferring the flexible circuit substrate from blue tape to the base mold, [0056] applying glue to the area that has overlap after the folding, [0057] pushing up the folding area, [0058] folding the folding area with a roller, [0059] pressing on the folded area and waiting for the glue to fully cure, [0060] rotating the base mold and the flexible circuit substrate by 90 degrees and repeating the folding procedures three times since there are 4 directions need to be folded, and [0061] releasing the flexible circuit substrate from the mold by hot air or UV light.

Expanding Tools

[0062] The step of expanding is to synchronize the movements of the islands on each row and each column of the electronic device arrays. This task can be performed by a multiple slide rails system as shown in FIG. 10. Each island of the flexible circuit substrate is connected to a holder, and each holder is connected to a corresponding slide rail in the row and column at the same time, and each slide rail is driven by a motor. Accordingly, the synchronization of the movements of each row and each column can be achieved and the flexible circuit substrate can be uniformly expanded.

Electronic Devices Installation

[0063] Electronic devices can be installed on the flexible circuit substrate before or after the processes of folding and expanding, depending on the applications. The electronic devices can be installed on the flexible circuit substrate by welding, bonding, or any other suitable methods. The connecting pad can be directly made on the islands of the flexible circuit substrate.

Packaging

[0064] After performing the steps of folding, expanding, and installation of the electronic devices, the electronic device arrays can be covered by conformal materials to protect the circuit and the electronic devices. Since the electronic device arrays have a good flexibility but a poor stretchability, PET, PI or any other suitable plastic films may be used for packaging the electronic device arrays.

[0065] In the embodiments of the subject invention, electronic device arrays of a large format are fabricated based on kirigami pattern design to increase the production efficiency and reduce the production cost, thereby achieving low-cost fabrication and enabling fabrication of large format sensing or display arrays having various sensors or luminous elements.

[0066] The embodiments of the subject invention offer two advantages. First, the materials needed for making an array of the same area are greatly reduced, thereby improving the material utilization rate and significantly reducing the mass production costs. Second, large-area arrays can be fabricated by expanding a small area of thin film material by a smaller machine, improving production capacities of the fabrication machines of electronic device arrays.

[0067] All patents, patent applications, provisional applications, and publications referred to or cited herein are incorporated by reference in their entirety, including all figures and tables, to the extent they are not inconsistent with the explicit teachings of this specification.

[0068] It should be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in light thereof will be suggested to persons skilled in the art and are to be included within the spirit and purview of this application and the scope of the appended claims. In addition, any elements or limitations of any invention or embodiment thereof disclosed herein can be combined with any and/or all other elements or limitations (individually or in any combination) or any other invention or embodiment thereof disclosed herein, and all such combinations are contemplated with the scope of the invention without limitation thereto.