PHOTODETECTORS BASED ON INTERBAND TRANSITION IN QUANTUM WELLS
20170012076 ยท 2017-01-12
Inventors
- Hong Chen (Beijing, CN)
- Lu Wang (Beijing, CN)
- Haiqiang Jia (Beijing, CN)
- Ziguang Ma (Beijing, CN)
- Yang Jiang (Beijing, CN)
- Wenxin Wang (Beijing, CN)
Cpc classification
H10F39/1847
ELECTRICITY
International classification
H01L31/0352
ELECTRICITY
H01L31/109
ELECTRICITY
Abstract
The present application relates to a photodetector based on interband transition in quantum wells. The photodetector may include a first semiconductor layer having a first conduction type; a second semiconductor layer having a second conduction type different from the first conduction type; and a photon absorption layer arranged between the first semiconductor layer and the second semiconductor layer, the photon absorption layer including at least one quantum well layer and barrier layers arranged on both sides of each quantum well layer. The present application utilizes the modulating effect of a semiconductor PN junction on a photoelectric conversion process associated with quantum wells to significantly increase a current output of the photodetector based on the quantum well material.
Claims
1. A photodetector, comprising: a first semiconductor layer having a first conduction type; a second semiconductor layer having a second conduction type different from the first conduction type; and a photon absorption layer arranged between the first semiconductor layer and the second semiconductor layer, the photon absorption layer including at least one quantum well layer and barrier layers arranged on both sides of each quantum well layer.
2. The photodetector of claim 1, wherein the first semiconductor layer, the second semiconductor layer, and the barrier layer include GaAs or AlGaAs, and the quantum well layer includes a material selected from a group including strained InGaAs quantum well, InAs quantum dot, and InAs/InGaAs quantum dots in quantum well.
3. The photodetector of claim 1, wherein the first semiconductor layer, the second semiconductor layer, and the barrier layer include InP or InAlAs, and the quantum well layer includes a material selected from a group including strained InGaAs quantum well, InAs quantum dot, InAs/InGaAs quantum dots in quantum well, strained InSb quantum well, InAsSb quantum well, InAs/GaSb superlattice, InAs/GaInSb superlattice, and InAs/InAsSb superlattice.
4. The photodetector of claim 1, wherein the first semiconductor layer, the second semiconductor layer, and the barrier layer include GaSb, and the quantum well layer includes a material selected from a group including strained InSb quantum well, InAs quantum well, InAsSb quantum well, InAs/GaSb superlattice, InAs/GaInSb superlattice, and InAs/InAsSb superlattice.
5. The photodetector of claim 1, wherein the first semiconductor layer, the second semiconductor layer, and the barrier layer include Si, and the quantum well layer includes a material selected from a group including Ge quantum well and GeSi quantum well.
6. The photodetector of claim 1, wherein the first conduction type is one of a P-type and an N-type and the second conduction type is the other of the P-type and the N-type.
7. The photodetector of claim 1, wherein the quantum well layer and the barrier layers are intrinsic or lightly doped semiconductor layers.
8. The photodetector of claim 1, wherein the photon absorption layer includes n quantum well layers, n being a positive integer between 1 and 200, each quantum well layer has a thickness between 1 and 60 nm, and each barrier layer has a thickness between 1 and 100 nm.
9. The photodetector of claim 1, further comprising: a multiplication layer arranged between the photon absorption layer and the first or second semiconductor layer.
10. The photodetector of claim 9, further comprising: a graded layer arranged between the multiplication layer and the photon absorption layer.
11. The photodetector of claim 10, further comprising: a charge layer arranged between the multiplication layer and the graded layer.
12. The photodetector of claim 1, wherein the quantum well layer experiences interband transition between a valence band and a conduction band thereof when absorbing light, thereby generating photo-generated carriers.
13. An optical communication system, comprising: an optical receiver for receiving an optical signal and converting the received optical signal into an electrical signal, the optical receiver including a photodetector comprising: a first semiconductor layer having a first conduction type; a second semiconductor layer having a second conduction type different from the first conduction type; and a photon absorption layer arranged between the first semiconductor layer and the second semiconductor layer, the photon absorption layer including at least one quantum well layer and barrier layers arranged on both sides of each quantum well layer.
14. The optical communication system of claim 13, wherein the quantum well layer includes a material selected from a group including strained InGaAs quantum well, InAs quantum well, InAs/InGaAs quantum dots in well, Ge quantum well, GeSi quantum well, InAs/GaSb superlattice, InAs/GaInSb superlattice, and InAs/InAsSb superlattice.
15. The optical communication system of claim 13, wherein the quantum well layer and the barrier layers are intrinsic or lightly doped semiconductor layers.
16. The optical communication system of claim 13, wherein the photodetector further comprises: a multiplication layer arranged between the photon absorption layer and the first or second semiconductor layer; a graded layer arranged between the multiplication layer and the photon absorption layer; and a charge layer arranged between the multiplication layer and the graded layer.
17. An imaging device comprising a plurality of pixels, each pixel including a photodiode comprising: a first semiconductor layer having a first conduction type; a second semiconductor layer having a second conduction type different from the first conduction type; and a photon absorption layer arranged between the first semiconductor layer and the second semiconductor layer, the photon absorption layer including at least one quantum well layer and barrier layers arranged on both sides of each quantum well layer.
18. The imaging device of claim 17, wherein the quantum well layer includes a material selected from a group including strained InGaAs quantum well, InAs quantum well, InAs/InGaAs quantum dots in well, Ge quantum well, GeSi quantum well, InAsSb quantum well, InAs/GaSb superlattice, InAs/GaInSb superlattice, InAs/InAsSb superlattice, and strained InSb quantum well.
19. The imaging device of claim 17, wherein the photodiode further comprises: a multiplication layer arranged between the photon absorption layer and the first or second semiconductor layer; a graded layer arranged between the multiplication layer and the photon absorption layer; and a charge layer arranged between the multiplication layer and the graded layer.
20. The imaging device of claim 17, wherein the quantum well layer experiences interband transition between a valence band and a conduction band thereof when absorbing light, thereby generating photo-generated carriers.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0034] So that the present application can be understood in greater detail, a more particular description may be had by reference to features of various implementations, some of which are illustrated in appended drawings. The appended drawings, however, merely illustrate some pertinent features of the present application and are therefore not to be considered limiting, for the description may admit to other effective features.
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[0044] In accordance with common practice, the various features illustrated in the appended drawings may not be drawn to scale. Accordingly, dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some of the attached drawings may not depict all of components of a given device, apparatus, or system. Finally, like reference numerals may be used to denote like features throughout the specification and figures.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
[0045] Hereinafter, exemplary embodiments of the present application will be described with reference to the appended drawings. It should be understood that the exemplary embodiments are just used to show the principle of the present application, not to limit he present application to the exact form described. Instead, more or less details may be used to realize the present application. In the appended drawings, the similar elements are designated with the same reference numbers, and redundant description thereof may be omitted.
[0046]
[0047] As shown in the
[0048] The first semiconductor layer 110 may be an N-type or P-type semiconductor layer epitaxially grown on the substrate 102. In the present application, respective semiconductor layers can be prepared by using various conventional thin film epitaxial growth or deposition methods, including but not limited to Hydride Vapor Phase Epitaxy (HVPE), Metal-Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Molecular Beam Epitaxy (MBE), and the like. In some embodiments, the first semiconductor layer 110 may be formed of semiconductor materials such as GaAs, InP, GaSb, or the like. The first semiconductor layer 110 may have a thickness in a range from 100 nm to 10 m.
[0049] The substrate 102 may be a semi-insulating substrate. As shown in
[0050] The photon absorption layer 120 may be provided on the first semiconductor layer 110 using an epitaxial growth technology. Although not shown in
[0051] Each barrier layer 122 may have a thickness between 1 and 100 nm, preferably between 2 and 50 nm, and more preferably between 3 and 30 nm. Each quantum well layer 124 may have a thickness between 1 and 60 nm, preferably between 2 and 40 nm, and more preferably between 3 and 20 nm. The photon absorption layer 120 may include a quantum well structure with n cycles. That is, the photon absorption layer 120 may include n quantum well layers 124 each being sandwiched by two barrier layers 122. There are n quantum well layers 124 and n+1 barrier layers 122 in total, where n is a positive integer between 1 and 200, preferably between 5 and 100, and more preferably between 10 and 50. Furthermore, the photon absorption layer 120 may have an overall thickness between 50 nm and 20 m, preferably between 100 nm and 15 m, and more preferably between 150 nm and 10 m.
[0052] The second semiconductor layer 130 may epitaxially grow on the photon absorption layer 120. In a preferred embodiment, the second semiconductor layer 130 may have the same material as but the opposite conduction type to the first semiconductor layer 110. For example, if the first semiconductor layer 110 is an N-type or P-type GaAs layer, InP layer or GaSb layer, the second semiconductor layer 130 may be a P-type or N-type GaAs layer, InP layer or GaSb layer, respectively. The second semiconductor layer 130 may have a thickness of from 100 nm to 10 m.
[0053] In addition, metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively. The metal electrode 132 on the second semiconductor layer 130 may have a window pattern formed therein to transmit incident light to the absorption layer 120 therebelow. An anti-reflecting film 134, which may be formed of, for example, SiN or SiO.sub.2, may be formed on the second semiconductor layer 130 within the window so as to increase the amount of light impinging onto the photon absorption layer 120.
[0054] Some specific examples of the photodetector 100 according to the embodiment shown in
Example 1
[0055] An N-type GaAs first semiconductor layer 110 including dopant Si at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on a GaAs semi-insulating substrate 102 directly by using the Metal-Organic Chemical Vapor Deposition (MOCVD) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic GaAs barrier layers 122 and strained InGaAs quantum well layers 124 and terminate with the intrinsic GaAs barrier layers 122 on both sides thereof. The intrinsic GaAs barrier layers 122 each may have a thickness of 30 nm, the strained InGaAs quantum well layers 124 each may have a thickness of 20 nm, and the number of the strained InGaAs quantum well layers 124 may be 30.
[0056] Next, a P-type GaAs semiconductor layer 130 including dopant Mg at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Example 2
[0057] A P-type AlGaAs first semiconductor layer 110 including dopant Mg at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on a GaAs conductive substrate 102 by using the Metal-Organic Chemical Vapor Deposition (MOCVD) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic AlGaAs barrier layers 122 and InAS quantum dot layers 124 and terminate with the intrinsic AlGaAs barrier layers 122 on both sides thereof. The intrinsic AlGaAs barrier layers 122 each may have a thickness of 30 nm, the InAS quantum dot layers 124 each may have a thickness of 20 nm, and the number of the InAS quantum dot layers 124 may be 20. Next, an N-type AlGaAs semiconductor layer 130 including dopant Si at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Example 3
[0058] An N-type AlGaAs first semiconductor layer 110 including dopant Si at a concentration of 510.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 400 nm on a GaAs semi-insulating substrate 102 directly by using the Metal-Organic Chemical Vapor Deposition (MOCVD) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic AlGaAs barrier layers 122 and InAS/InGaAs quantum dots in well layers 124 and terminate with the intrinsic AlGaAs barrier layers 122 on both sides thereof. The intrinsic AlGaAs barrier layers 122 each may have a thickness of 30 nm, the quantum dot layers 124 each may have a thickness of 30 nm, and the number of the quantum dot layers 124 may be 20. Next, a P-type AlGaAs semiconductor layer 130 including dopant Zn at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Example 4
[0059] An N-type InP first semiconductor layer 110 including dopant Si at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on an InP conductive substrate 102 by using the Molecular Beam Epitaxy (MBE) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic InP barrier layers 122 and strained InGaAs quantum well layers 124 and terminate with the intrinsic InP barrier layers 122 on both sides thereof. The intrinsic InP barrier layers 122 each may have a thickness of 30 nm, the strained InGaAs quantum well layers 124 each may have a thickness of 20 nm, and the number of the strained InGaAs quantum well layers 124 may be 20. Next, a P-type InP semiconductor layer 130 including dopant Mg at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Example 5
[0060] An N-type InAlAs first semiconductor layer 110 including dopant Si at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on an InP semi-insulating substrate 102 by using the Molecular Beam Epitaxy (MBE) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic InAlAs barrier layers 122 and InAs quantum dot layers 124 and terminate with the intrinsic InAlAs barrier layers 122 on both sides thereof. The intrinsic InAlAs barrier layers 122 each may have a thickness of 30 nm, the InAs quantum dot layers 124 each may have a thickness of 20 nm, and the number of the InAs quantum dot layers 124 may be 20. Next, a P-type InAlAs semiconductor layer 130 including dopant Mg at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Examples 6-8
[0061] The structures of examples 6-8 may be basically the same as the example 4 or 5, except that the quantum well layers 124 utilizes InAs/InGaAs quantum dots in well layers, InSb quantum well layers, and InAsSb quantum well layers respectively. Therefore, the repetitive description thereof is omitted herein.
Example 9
[0062] An N-type GaSb first semiconductor layer 110 including dopant Te at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 500 nm on a GaSb semi-insulating substrate 102 directly by using the Molecular Beam Epitaxy (MBE) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic GaSb barrier layers 122 and strained InSb quantum well layers 124 and terminate with the intrinsic GaSb barrier layers 122 on both sides thereof. The intrinsic GaSb barrier layers 122 each may have a thickness of 30 nm, the strained InSb quantum well layers 124 each may have a thickness of 20 nm, and the number of the strained InSb quantum well layers 124 may be 30. Next, a P-type GaSb semiconductor layer 130 including dopant Be at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Examples 10-11
[0063] The structures of examples 10-11 may be basically the same as the example 9, except that the quantum well layer 124 utilizes InAs quantum well layers and InAsSb quantum well layers respectively.
Example 12
[0064] An N-type Si first semiconductor layer 110 including dopant P at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on a Si semi-insulating substrate 102 by using the Molecular Beam Epitaxy (MBE) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic Si barrier layers 122 and Ge quantum well layers 124 and terminate with the intrinsic Si barrier layers 122 on both sides thereof. The intrinsic Si barrier layers 122 each may have a thickness of 30 nm, the Ge quantum well layers 124 each may have a thickness of 20 nm, and the number of the Ge quantum well layers 124 may be 20. Next, a P-type Si semiconductor layer 130 including dopant B at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
Example 13
[0065] An N-type Si first semiconductor layer 110 including dopant P at a concentration of 110.sup.18 cm.sup.3 may be epitaxially grown to a thickness of 300 nm on a Si semi-insulating substrate 102 by using the Molecular Beam Epitaxy (MBE) method. Then, a photon absorption layer 120 may be epitaxially grown on the first semiconductor layer 110. The photon absorption layer 120 may include alternate intrinsic Si barrier layers 122 and GeSi quantum well layers 124 and terminate with the intrinsic Si barrier layers 122 on both sides thereof. The intrinsic Si barrier layers 122 each may have a thickness of 30 nm, the GeSi quantum well layers 124 each may have a thickness of 20 nm, and the number of the GeSi quantum well layers 124 may be 20. Next, a P-type Si semiconductor layer 130 including dopant B at a concentration of 510.sup.17 cm.sup.3 may be epitaxially grown to a thickness of 200 nm on the photon absorption layer 120. Then, the stacked layers may be patterned by way of photolithograph and etching processes, and metal electrodes 112 and 132 may be formed on the first semiconductor layer 110 and the second semiconductor layer 130 respectively.
[0066] Only some example manufacturing methods have been described above briefly. Specific manufacturing processes for such semiconductor layers and quantum well layers are already known to those skilled in the art, and thus, the detailed description thereof is omitted herein in order to avoid obscuring the present application unnecessarily.
[0067]
[0068]
[0069] A photodetector 200 in accordance with another embodiment of the present application will be described below with reference to
[0070] As shown in
[0071] When the photo-generated carriers generated in the photon absorption layer 120, such as electrons and holes, move towards the N region (for example, the first semiconductor layer 110) and the P region (for example, the second semiconductor layer 130) respectively, carries such as electrons pass through the multiplication layer 220. The multiplication layer 220 may be an intrinsic (without intentional doping) semiconductor layer that has a different conduction type from the semiconductor layer it contacts (here, the first semiconductor layer 110), and it forms a high electric field region. In the multiplication layer 220, electrons are accelerated to an average velocity high enough so that the energy carried by them exceeds threshold impact energy, so as to trigger a lattice impact ionization effect which generates secondary electron-hole pairs. The newly-generated electron-hole pairs are also accelerated in the multiplication layer 220 so that the impact ionization continues to occur. This enables the photodetector to have an internal gain which may be used to amplify the original photo-generated carriers.
[0072] The graded layer 210 may be arranged between the absorption layer 120 and the multiplication layer 220. When the absorption layer 120 and the multiplication layer 220 have a relatively large band gap difference, charge carriers moving towards the multiplication layer 220 may be blocked and thus their velocity may be decreased significantly, so that multiplication efficiency of the multiplication layer 220 and response time of the photodetector are adversely affected. In order to address this problem, the graded layer 210 may be arranged between the absorption layer 120 and the multiplication layer 220. The graded layer 210 may have a band gap which is between that of the absorption layer 120 and that of the multiplication layer 220. Moreover, the graded layer 210 may have its composition gradually changed so as to match its energy band with the absorption layer 120 at one side and with the multiplication layer 220 at the other side. As such, the photodetector 200 may have advantages of high speed, high quantum efficiency, and good gain performance at the same time, so as to realize a more practical value.
[0073] Although in the embodiment shown in
[0074]
[0075] Although not shown, it may be understood that a charge layer may also be arranged between the graded layer 210 and the multiplication layer 220 in the photodetector 200 shown in
[0076] In the embodiments described above, the electrodes 112 and 132 are both formed on the same side of the substrate. In some other embodiments, the electrodes 112 and 132 may also be formed on two opposite sides of the substrate respectively. As shown in
[0077] The photodetectors of the present application may be used in various photoelectric devices and circuits. For example, the photodetectors with strained InGaAs quantum wells, InAs quantum wells, InAs/InGaAs quantum dots in wells, Ge quantum wells, or GeSi quantum wells may be used in 1.1 to 1.55 m optical communication, infrared imaging, or the like, and the photodetectors with InAs/GaSb superlattices, InAs/GaInSb superlattices, InAs/InAsSb superlattices, InAsSb quantum wells, or strained InSb quantum wells may be used in 3 to 5 m infrared thermal imaging, or the like.
[0078] Each pixel 620 may include a photodiode 622, which may be any one of the photodetectors described above. When the photodiode 622 senses infrared light, it generates signal charges. A transfer transistor 624 receives a transfer control signal TRS from the row controller 610 and turns on, so that the signal charges generated by the photodiode 622 may be transferred to a floating diffusion zone FD. An amplifier transistor 628 may amplify the signal charges in the floating diffusion zone FD, output an amplified signal to the bit line 630 via a selecting transistor 629. When the selecting transistor 629 receives a selection control signal SEL from the row controller 610, it turns on so that the output signal from the amplifier transistor 628 may be provided to the bit line 630. In another embodiment, the selecting transistor 629 may be omitted. The pixel 620 may also include a reset transistor 626. When the reset transistor 626 receives a reset control signal RST from the row controller 610, it turns on so that the electric potential of the floating diffusion zone FD is set to a predetermined electric potential, for example, to the ground potential.
[0079]
[0080] Although the present application has been described above with reference to the exemplary embodiments, the present application is not limited thereto. It will be apparent to those skilled in the art that various alternations and modifications in forms and details can be made without departing from the scope and spirit of the present application. The scope of the present application is only defined by the appended claims or the equivalents thereof.