CIRCUIT ARRANGEMENT

Abstract

A circuit arrangement configured to execute DC link processing with simultaneous reduction of the harmonic components in the input current, i.e., for usability or applicability in different power supply networks, particularly both in single-phase and three-phase networks with the same circuit topology or in the event of the failure of a phase.

Claims

1. A circuit arrangement comprising a 3-phase PFC stage with three connection terminals to connect three phases (L1, L2, L3) for 3-phase operation, the circuit arrangement being configured to operate in single-phase operation by a switching arrangement composed of two independently controllable switches (S1, S2) bridged by diodes (D1, D2) connected between a DC link of a 3-phase rectifier circuit and a rectifier-diode bridge with rectifier diodes, wherein the three phases (L1, L2, L3) are brought together via respective line paths (LP1, LP2, LP3) at a neutral point, wherein a bidirectional switch (S3, S4, S5) is provided in each line path (LP1, LP2, LP3) for the purpose of activating and deactivating the respective phases (L1, L2, L3) at the neutral point, wherein the respective switches (S3, S4, S5) are opened or closed in the phases in a controlled manner for single-phase PFC operation in order to adjust the current over two active phases sinusoidally and in phase with a grid.

2. The circuit arrangement as set forth in claim 1, wherein during single-phase PFC operation, only two of the three phases are attached or connected.

3. The circuit arrangement as set forth in claim 1, wherein the DC link, in addition to a main DC link capacitor (C1), also has a capacitor (C2) that can be additionally connected via a switch (S).

4. The circuit arrangement as set forth in claim 1, wherein an inductor (L.sub.b2) is connected between the neutral point of the phases (L1, L2, L3) and a center tap between the switches (S1, S2).

5. The circuit arrangement as set forth in claim 1, wherein an inductor (L.sub.b1) is connected between the switch (S1) of the circuit arrangement and the rectifier diodes of the rectifier-diode bridge.

6. The circuit arrangement as set forth in claim 1, wherein the switch (S1) is a diode (D1) with a conducting direction away from the switch (S2) and the switch (S2) is a diode (D2) with a conducting direction away from the switch (S1).

7. A method for operating a circuit arrangement as set forth in claim 1 in single-phase PFC operation, wherein, when a positive mains half-wave is applied to the phase (L1), the switch (S3) in the corresponding line path (LP1) is closed and then, as a result of the switching-on of the switch (S2) of the switch arrangement, an increasing current is generated from the connection of the phase (L1) via the switch (S3) via the corresponding rectifier diode to the connection of the phase (L2) and then, as a result of the switching-off of the switch (S2), this current is conducted via the diode (D1) in the switch (S1) or via the (reverse) switched switch into the DC link and, via the ground thereof, back to the corresponding rectifier diode of the rectifier-diode bridge to the connection of the phase (L2).

8. The method as set forth in claim 7 for operating the circuit arrangement in single-phase PFC operation, wherein, when a negative mains half-wave is applied to the phase (L2), the switch (S4) in the corresponding line path (LP2) is closed and then, as a result of the switching-on of the switch (S2) of the switch arrangement, an increasing current is generated from the connection of the phase (L2) via the switch (S4) via the corresponding rectifier diode to the connection of the phase (L1) and then, as a result of the switching-off of the switch (S2), this current is conducted via the diode (D1) in the switch (S1) or via the (reverse) switched switch into the DC link and, via the ground thereof, back to the corresponding rectifier diode of the rectifier-diode bridge to the connection of the phase (L1).

9. The method as set forth in claim 7, wherein, before the switching of the switch or switches (S3, S4, S5), the current at the connection of the phase (L2) is first adjusted to a predefined value, which can also be zero.

10. The method as set forth in claim 7, wherein the switch or switches (S3, S4, S5) are clocked at the mains frequency.

11. The method as set forth in claim 7, wherein the switches (S1, S2) are clocked at a substantially higher frequency than the mains frequency, these being clocked particularly with pulse-width modulation at a frequency in the range between 20 kHz and 150 kHz.

12. The circuit arrangement as set forth in claim 2, wherein the phases (L1, L2) are attached or connected.

13. The circuit arrangement as set forth in claim 1, characterized in that the switch (S1) is a diode (D1) with a conducting direction away from the switch (S2) and the switch (S2) is a diode (D2) with a conducting direction away from the switch (S1), a center tap being disposed there between which is connected to the neutral point.

14. The circuit arrangement as set forth in claim 3, wherein an inductor (L.sub.b2) is connected between the neutral point of the phases (L1, L2, L3) and a center tap between the switches (S1, S2).

15. The circuit arrangement as set forth in claim 3, wherein an inductor (L.sub.b1) is connected between the switch (S1) of the circuit arrangement and the rectifier diodes of the rectifier-diode bridge.

16. The circuit arrangement as set forth in claim 14, wherein an inductor (L.sub.b1) is connected between the switch (S1) of the circuit arrangement and the rectifier diodes of the rectifier-diode bridge.

17. The circuit arrangement as set forth in claim 16, wherein the switch (S1) is a diode (D1) with a conducting direction away from the switch (S2) and the switch (S2) is a diode (D2) with a conducting direction away from the switch (S1), a center tap (M) being preferably disposed there between which is connected to the neutral point.

18. The method as set forth in claim 8, wherein, before the switching of the switch or switches (S3, S4, S5), the current at the connection of the phase (L2) is first adjusted to a predefined value, which can also be zero.

19. The method as set forth in claim 18, wherein the switch or switches (S3, S4, S5) are clocked at the mains frequency.

20. The method as set forth in claim 19, wherein the switches (S1, S2) are clocked at a substantially higher frequency than the mains frequency, these being clocked particularly with pulse-width modulation at a frequency in the range between 20 kHz and 150 kHz.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order that the disclosure may be well understood, there will now be described various forms thereof, given by way of example, reference being made to the accompanying drawing, in which:

[0020] FIG. 1 shows a circuit topology of a 3-phase PFC stage according to the teachings of the present disclosure for realizing a single-phase operation;

[0021] FIG. 2 shows a first option for the implementation of the bidirectional switches in the line paths of the phases to the neutral point; and

[0022] FIG. 3 shows an alternative option for the implementation of the bidirectional switches in the line paths of the phases to the neutral point.

[0023] The drawings are provided herewith for purely illustrative purposes and are not intended to limit the scope of the present invention.

DETAILED DESCRIPTION

[0024] The following description is merely exemplary in nature and is in no way intended to limit the present disclosure or its application or uses. It should be understood that throughout the description, corresponding reference numerals indicate like or similar parts and structural and/or functional features.

[0025] Within this specification, embodiments have been described in a way which enables a clear and concise specification to be written, but it is intended and will be appreciated that embodiments may be variously combined or separated without parting from the invention. For example, it will be appreciated that all preferred features described herein are applicable to all aspects of the invention described herein.

[0026] According to one aspect of the present disclosure, one basic idea thereof, is a concept with a 3-phase PFC topology to which three mains phases L1, L2, L3 can be connected for 3-phase operation, each to be operated in single-phase operation, having a 3-phase rectifier circuit that is supplemented with switches for activating and deactivating one or more of the phases L1, L2, L3 and two additional independently controllable switches, with the respective switches being opened or closed in the phases in a controlled manner for single-phase PFC operation in order to adjust the current via two active phases sinusoidally and in phase with the grid.

[0027] One relevant aspect or core idea of the present disclosure is that a circuit arrangement, for example the Minnesota rectifier, is made possible according to the concept of the invention in combination with operation in the event of a phase failure

[0028] Another relevant aspect of the present disclosure is that switching between single-phase and three-phase operation is also activated in the event of power failures or phase failures, and the circuit can therefore be used for this purpose.

[0029] According to another aspect of the present disclosure, a circuit arrangement is provided for this purpose having a 3-phase PFC stage with three connection terminals to the connection of the phases L1, L2, L3 for 3-phase operation, the circuit arrangement being designed in the specified manner to also be operated in single-phase operation by virtue of the fact that a switching arrangement composed of two independently controllable, diode-bridged switches “S1, S2” is connected between a DC link of a 3-phase rectifier circuit and a rectifier-diode bridge (comprising the rectifier diodes). The phases L1, L2, L3 are furthermore brought together via respective line paths at a neutral point, and a bidirectional switch being provided in each line path for the purpose of activating and deactivating each of the respective phases at the neutral point. The respective switches are opened or closed in the phases in a controlled manner for single-phase PFC operation in order to adjust the current over two respective active phases sinusoidally and in phase with the grid.

[0030] According to another aspect of the present disclosure, a provision is made that only two of the three phases, preferably phases L1, L2, are attached or connected in single-phase PFC operation. Furthermore, a provision may be advantageously made that the DC link, in addition to the main DC link capacitor, also has a capacitor that can be switched on via a switch. Due to the advantageous use of small DC link capacitors in 3-phase operation, it can be advantageous to add a second DC link capacitor when expanding to single-phase operation in order to increase the possible output power of the circuit while simultaneously limiting the voltage ripple in the DC link.

[0031] According to another aspect of the present disclosure, a provision is made that an inductor is connected between the neutral point of the phases and a center tap is connected between the switches of said switch arrangement. It is also advantageous if an inductor is likewise connected between the one switch in the circuit arrangement and the rectifier diodes in the rectifier-diode bridge.

[0032] According to yet another aspect of the present disclosure, one switch of the switch arrangement has a diode with a conducting direction away from the second switch of the switch arrangement, and the second switch has a diode with a conducting direction away from the first switch, and a center tap is preferably located there between which is connected to the neutral point of the three phases L1, L2, L3.

[0033] Still another aspect of the present disclosure relates not only to the circuit as such, but also to the method for operating a 3-phase circuit arrangement as described above in single-phase PFC operation, in which a positive mains half-wave is applied to the phase L1, the corresponding switch in the associated line path is closed. Then, as a result of the switching-on of the second switch, an increasing current is generated from the connection of the phase via the switch via the corresponding rectifier diode to the connection of the phase. As a result of the switching-off of this second switch, this current is conducted via the diode in the first switch (of the switch arrangement) or via the (reverse-)switched switch into the DC link and, via the ground thereof, back to the corresponding rectifier diode of the rectifier-diode bridge to the connection of the second (additional connected) phase.

[0034] This may also be done in a similar manner for the negative mains half-wave. When a negative mains half-wave is applied to the second (or additional connected) phase, the switch in the corresponding line path of this phase is closed. Then, as a result of the switching-on of the second switch of the switch arrangement, an increasing current is generated from the connection of the second connected phase L2 via the switch in the line path via the corresponding rectifier diode to the connection of the first phase L1. As a result of the switching-off of the second switch, this current is conducted via the diode D1 in the first switch (of the circuit arrangement) or via the (reverse-)switched switch into the DC link and, via the ground thereof, back to the corresponding rectifier diode of the rectifier-diode bridge to the connection of the first phase L1.

[0035] Furthermore, a provision is advantageously made that, before the switching of the switch or switches in the line paths to the neutral point of the phases, the current at the connection of the second phase L2 is first adjusted to a predefined value, which can also be zero.

[0036] In another advantageous aspect of the present disclosure, a provision is made that the switch or switches (in the line paths) are clocked at the mains frequency, while the two switches (of the circuit arrangement) are preferably clocked at a substantially higher frequency than the mains frequency, alternatively, these are clocked with pulse-width modulation at a frequency in the range between 20 kHz and 150 kHz.

[0037] In order to enable the circuit according to the teachings of the present disclosure to also work in three-phase operation, it is desirable to use a consumer in three-phase operation with constant power, either with the power being constant in single-phase operation or the consumer being instantiated by a resistance.

[0038] Further important characteristics and advantages of the invention are now described with associated description of the figures, with reference to the drawings. It is understood that the above-mentioned characteristics, and those to be described hereinafter, are not only applicable in the respective combination indicated, but also in other combinations, or in isolation, without departing from the scope of the present invention.

[0039] FIG. 1 shows a circuit arrangement 1 according to the concept of the present disclosure. The circuit arrangement 1 has a 3-phase PFC stage with three connection terminals for the connection of the phases L1, L2, L3 for a 3-phase operation. For single-phase operation, the power consumption from the mains is such that the mains voltage is only connected to the connection terminals L1 and L2 (as shown in FIG. 1) and the third phase L3 is idle or disconnected from the grid.

[0040] The circuit arrangement 1 has a DC link 20 and a rectifier diode bridge 10 with six rectifier diodes. Furthermore, a switch arrangement 30 is connected in parallel with the DC link 20. This switch arrangement 30 consists of two switches S1, S2 and the diodes D1, D2 parallel thereto, which are arranged in series with opposite conducting direction. The two switches S1, S2 can be implemented using known technologies, but it is important here that they be present either intrinsically, in the housing of the semiconductor, or externally as a diode D1 or D2 in the reverse direction. The two switches S1, S2 are independently controllable switches and are clocked with pulse-width modulation at a substantially higher frequency than the mains frequency for the purpose of adjusting the current.

[0041] As can also be seen in FIG. 1, the phases L1, L2, L3 are brought together at a neutral point 11 via respective line paths LP1, LP2, LP3, and a bidirectional switch S3, S4, S5 is arranged in each of the three line paths LP1, LP2, LP3. These are clocked at mains frequency specifically in order to activate and deactivate the phases L1 and L2 at the neutral point 11.

[0042] In addition to the main DC link capacitor C1, the DC link 20 also has a capacitor C2 that can be connected via a switch S and is connected in parallel with the capacitor C1. The depicted inductors L.sub.b1, L.sub.b2 are also provided.

[0043] FIGS. 2 and 3 show options for the implementation of the bidirectional switches S3, S4, S5 in the line paths of the phases L1, L2, L3 to the neutral point 11. The switches S3, S4, S5 are embodied as bidirectional switches. This can be achieved both as an insulated-gate bipolar transistor (IGBT) and as a metal—oxide—semiconductor field-effect transistor (MOSFET).

[0044] In the case of a positive mains half-wave, the switch S3 is closed via this mains half-wave and, after the switch S2 is switched on, an increasing current is generated as follows: from the phase terminal of L1 via S3, L.sub.b2 via the switch S2, and the rectifier diode to the phase terminal L2. When switch S2 is switched off, this current commutates via the diode into the switch S1 or via the reverse switch into the DC link (current flow: L1-S3-L.sub.b2-S1-C1-rectifier diode- L2).

[0045] In the case of a negative mains half-wave, the behavior is identical to that with a positive mains voltage, only with the opposite sign with regard to the mains current.

[0046] Upon switching on the switch S2: current flow L2-S4-L.sub.b2-S2-rectifier diode-L1 and, upon switching off the switch S2: current flow L2-S4-L.sub.b2-S1-C1-rectifier diode-L1.

[0047] The foregoing description of various forms of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Numerous modifications or variations are possible in light of the above teachings. The forms discussed were chosen and described to provide the best illustration of the principles of the invention and its practical application to thereby enable one of ordinary skill in the art to utilize the invention in various forms and with various modifications as are suited to the particular use contemplated. Thus, the invention is not limited in its execution to the abovementioned preferred exemplary embodiments. Rather, a number of variants are conceivable that make use of the illustrated solution even in the form of fundamentally different embodiments. All such modifications and variations are within the scope of the invention as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly, legally, and equitably entitled.