PRODUCTION METHOD FOR SINGLE CRYSTAL SEMICONDUCTOR FILM, PRODUCTION METHOD FOR MULTILAYER FILM OF SINGLE CRYSTAL SEMICONDUCTOR FILM, AND SEMICONDUCTOR ELEMENT

Abstract

Since a high temperature process is required when adding impurities to a semiconductor crystal film by means of ion implantation or by means of thermal diffusion, it has been difficult to form a steep impurity profile. A production method for a single crystal semiconductor film by means of crystal growth using a magnetron sputtering device to which one or more group 14 semiconductor targets are attached, the method being characterized in that at least one of the targets is doped with impurities, the film-forming temperature is 300 C. or higher, the growth rate is 10 nm or less per minute, the sputtering gas is an inert gas, and the one or more targets are sputtered simultaneously.

Claims

1. A production method for a single crystal silicon semiconductor film by means of crystal growth using a magnetron sputtering device to which one or more targets containing a silicon crystal target doped with boron with a surface plane orientation of within (100) 6 degrees are attached, wherein a sputtering gas is an inert gas, and the one or more targets containing the silicon crystal target doped with baron are sputtered simultaneously.

2. (canceled)

3. The production method for a single crystal silicon semiconductor film according to claim 1, wherein the inert gas is argon.

4. (canceled)

5. The production method for a single crystal silicon semiconductor film according to claim 1, wherein the surface plane orientation of the silicon crystal target doped with boron is within (100) 1 degrees.

6. The production method for a single crystal semiconductor film according to claim 1, wherein a growth temperature is 560 C. or higher.

7. (canceled)

8. A production method for a single crystal silicon semiconductor film by means of crystal growth using a magnetron sputtering device to which one or more targets containing a phosphorus-doped silicon semiconductor targets are attached wherein a growth temperature is 320 or higher and lower than 500 C., and a growth rate is 7 nm or less per minute, a sputtering gas is an inert gas, and the one or more targets containing the phosphorus-doped silicon semiconductor target are sputtered simultaneously.

9. A production method for a silicon-germanium mixed crystal semiconductor film by means of crystal growth using a magnetron sputtering device to which one or more targets containing a phosphorus-doped silicon and/or germanium semiconductor target are attached, wherein a growth rate is 3.5 nm or less per minute.

10. (canceled)

11. (canceled)

12. A production method for a multilayer film of a semiconductor oxide and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 1 out of a vacuum chamber, a surface thereof is oxidized.

13. A production method for a multilayer film of a semiconductor nitride and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 1 out of a vacuum chamber, a surface thereof is nitrided.

14. A production method for a multilayer film of metal and a semiconductor film, wherein a metal film is formed without taking the semiconductor film formed by the production method according to claim 1 out of a vacuum chamber.

15. A semiconductor element produced using the production method according to claim 1.

16. A production method for a multilayer film of a semiconductor oxide and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 8 out of a vacuum chamber, a surface thereof is oxidized.

17. A production method for a multilayer film of a semiconductor nitride and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 8 out of a vacuum chamber, a surface thereof is nitrided.

18. A production method for a multilayer film of metal and a semiconductor film, wherein a metal film is formed without taking the semiconductor film formed by the production method according to claim 8 out of a vacuum chamber.

19. A semiconductor element produced using the production method according to claim 8.

20. A production method for a multilayer film of a semiconductor oxide and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 9 out of a vacuum chamber, a surface thereof is oxidized.

21. A production method for a multilayer film of a semiconductor nitride and a semiconductor film, wherein without taking the single crystal semiconductor film formed by the production method according to claim 9 of a vacuum chamber, a surface thereof is nitrided.

22. A production method for a multilayer film of metal and a semiconductor film, wherein a metal film is formed without taking the semiconductor film formed by the production method according to claim 9 out of a vacuum chamber.

23. A semiconductor element produced using the production method according to claim 9.

Description

BRIEF DESCRIPTION OF DRAWING

[0022] FIG. 1 is the whole structure of a semiconductor crystal growth apparatus.

[0023] FIG. 2 is a process for forming a semiconductor crystal film.

[0024] FIG. 3 is a schematic cross-sectional structural diagram of a boron-doped semiconductor crystal film.

[0025] FIG. 4 is a graph showing a relationship between the growth temperature and activation rate of a semiconductor crystal film formed by crystal growth using boron-doped silicon targets with (100) and (111) plane orientation.

[0026] FIG. 5 is a graph showing the impurity profile of a silicon crystal film formed by crystal growth using a boron-doped silicon target with (100) plane orientation.

[0027] FIG. 6 is a schematic cross-sectional structural diagram of a group 15 element (phosphorus)-doped semiconductor crystal film.

[0028] FIG. 7A is a graph showing a relationship between the growth rate and impurity activation rate of a phosphorus-doped semiconductor crystal film.

[0029] FIG. 7B is a graph showing a relationship between the growth rate and impurity activation rate of a phosphorus-doped SiGe semiconductor crystal film.

[0030] FIG. 8A are graphs showing relationships between the growth temperature, carrier density and activation rate of silicon crystal films formed by crystal growth using a phosphorus-doped silicon target.

[0031] FIG. 8B is a graph showing a relationship between the growth temperature and carrier mobility of a silicon crystal film formed by crystal growth using a phosphorus-doped silicon target.

[0032] FIG. 9 are graphs showing the impurity (P) profiles of silicon crystal films (growth temperature 320 C., 400 C., 450 C., 500 C., 550 C., 600 C.).

[0033] FIG. 10 is a TEM photograph of grown films.

DESCRIPTION OF EMBODIMENT

[0034] An embodiment of the present invention will now be illustrated as examples in detail using the drawings. It should be noted, however, that constituent elements described in this embodiment are shown as examples, and the scope of this invention is not limited only to those. In addition, all combinations of features illustrated in the embodiment are not essential for the solution of the invention.

1. Structure of a Semiconductor Crystal Film Growth Apparatus

EMBODIMENT

[0035] First, the structure of the semiconductor crystal film growth apparatus according to the present embodiment will be illustrated with reference to a drawing. FIG. 1 shows the whole structure of the growth apparatus. The apparatus includes a vacuum chamber 10, a target 20, a target 21, a Si substrate 30, a substrate mounting table with a heater 40, a DC power source 50, a high-frequency power source 51, a matching box 52 and a radiation thermometer 60.

[0036] The vacuum chamber 10 has an evacuation pump, not shown. The evacuation pump is desirably a contamination-free pump, for example, a turbomolecular pump, a sputter ion pump, a cryopump or a dry pump. The target 20 and target 21 are each any of a high purity group 14 element target or a group 15 element-doped group 14 element target or a boron-doped group 14 element target. The Si substrate 30 to grow a crystal is put on a place opposed to the target 20 and target 21. The target 20 and the target 21 can be put with the direction of the surface thereof inclined to the Si substrate 30. The mechanism to retain the inclined surfaces of the target 20 and the target 21 is achieved, for example, by a method for turning a flange to attach a target in the vacuum chamber 10 to a desired direction or an equivalent method.

[0037] The high-frequency power source 51 to apply a high-frequency voltage (e.g. a frequency of 13.56 MHz) is connected to the target 20 via the matching box 52, and the DC power source 50 to apply a DC voltage is connected to the target 21, respectively.

[0038] In the substrate mounting table with a heater 40, for example, the temperature of the substrate is measured by the radiation thermometer 60 provided outside the vacuum chamber, and the temperature is controlled so that the Si substrate 30 will have a predetermined temperature by control equipment (not shown).

[0039] This device is a magnetron sputtering device, in which magnets (not shown) are placed on the back of the target 20 and the target 21.

[0040] It should be noted that an embodiment having two targets is shown as an example in FIG. 1; however, the number of targets may be 3 or more or may be one. The target may be also a single crystal. The present embodiment has a structure having three single crystal targets or four single crystal targets. In addition, high-frequency voltage and DC voltage may be applied to each target switchably or both of them may be superimposed (and applied).

[0041] When simultaneously sputtering two or more of the same element targets, the targets may be placed symmetrically to the straight line passing through the center of the substrate to improve the uniformity of a grown film.

2. Process for Growing a Single Crystal Semiconductor Film

[0042] The process for growing a semiconductor crystal film according to the embodiment of the present invention will now be illustrated with reference to FIG. 2. It should be noted that each step in the process will be now represented as S.

[0043] First, the vacuum chamber 10 is evacuated to a very high vacuum (about 10.sup.10 Torr) in S21.

[0044] In the subsequent S22, the Si substrate 30 is introduced on the substrate mounting table with a heater 40. It should be noted that the Si substrate 30 may be immersed in dilute hydrofluoric acid before being introduced to remove native oxide film.

[0045] Subsequently, the Si substrate 30 is heated by the substrate mounting table with a heater 40 in S23. At this time, the temperature of the substrate may be temporarily raised to a temperature higher than the growth temperature and reduced to the growth temperature after thermal cleaning.

[0046] Subsequently, an inert gas is introduced into the vacuum chamber 10 while adjusting the flow rate so that the growth pressure will be obtained in S24. It should be noted that the inert gas is argon (Ar) in the present embodiment; however, any inert gas may be used. The sputtering gas pressure of the vacuum chamber 10 is set to a value between 1.2 [mTorr] and 5 [mTorr] by adjusting the flow rate of the inert gas. In the present embodiment below, the pressure is set to 3 [mTorr] or 5 [mTorr].

[0047] In S25, subsequently, high-frequency electric power or DC voltage is applied to the target 20 or the target 21 or the target 20 and the target 21 simultaneously. The inert gas plasma was generated to sputter the target 20 or the target 21 or the target 20 and the target 21 simultaneously, which causes crystal growth on the Si substrate 30.

[0048] According to the above process, atoms contained in the target 20 and the target 21 are sputtered by ions from the inert gas plasma by applying DC voltage and high-frequency electric power in an inert gas atmosphere, which causes crystal growth on the Si substrate 30 opposed to the targets.

3. Examples of Single Crystal Semiconductor Film Growth

[0049] First, the semiconductor multilayer film according to the present embodiment will be illustrated with reference to a drawing. FIG. 3 is a cross-sectional diagram schematically showing the semiconductor crystal film 100 according to the present embodiment. The semiconductor crystal film 100 includes an N-type Si substrate 110, a Si crystal layer not containing impurities 120, and a boron-containing semiconductor crystal film 130.

[0050] In the present embodiment, a single crystal N-type Si substrate is used as the Si substrate 110; however, an SOI (Silicon on Insulator) substrate and an SOQ (Silicon on Quartz) substrate may be used, in which a single crystal Si thin film is formed on an insulator. The N-type Si substrate 110 may be e.g. a substrate with (100) plane orientation. In the present embodiment, the Si crystal layer not containing impurities 120 is provided on the N-type Si substrate 110 by the sputter epitaxy method; however, this Si layer not containing impurities may be also provided by other crystal growth methods such as the CVD method. Alternatively, Si and Ge mixed crystals may be provided by the sputter epitaxy method or other crystal growth methods. Si and C mixed crystals may be also grown.

Dependency on Plane Orientation of Target

[0051] Using a target with (100) plane orientation (boron concentration 2.010.sup.19/cm.sup.3) and a target with (111) plane orientation (boron concentration 2.110.sup.19/cm.sup.3), which contain boron as impurities, the semiconductor layer 130 containing boron as impurities was grown. Ar was used as the inert gas, the pressure thereof was 3 [mTorr], and the growth rates of the Si crystal layer not containing impurities 120 and the boron-containing semiconductor crystal film 130 were both 5 nm per minute. When the growth rate is slower, the activation rate is further improved as shown in FIG. 7 below. It should be noted that the plane orientation tolerance of a target used is 1 (JEITA). As long as the tolerance is about 6 (tan 6 1/10), the crystal lattice condition on the outermost surface of a target does not have great differences, and the target can be used.

[0052] FIG. 4 shows differences in the impurity activation rate with respect to the growth temperature due to differences in plane orientation of targets. It is found that when using a target with (100) plane orientation, about 50% of impurities are activated at a growth temperature of 580 C. and 100% of impurities are activated at a growth temperature of 612 C., whereas when using a target with (111) plane orientation, the growth temperature is required to be 732 C. to reach an impurity activation rate of 100%.

[0053] FIG. 5 shows the boron concentration in the depth direction when a target (100) containing boron as impurities is used and the growth (substrate) temperature is 580 C. The slope from a depth of around 100 nm of the graph is 13 [nm/decade]. This shows a depth at which the boron concentration is reduced to one tenth. This slope of the boron concentration in the depth direction is about one third of the value in Non-patent Literature 4, and it is found that a steep impurity profile can be formed.

[0054] The group 15 element-doped semiconductor crystal multilayer film according to the present embodiment will be illustrated with reference to a drawing.

[0055] FIG. 6 is a cross-sectional diagram schematically showing the semiconductor crystal film 200 according to the present embodiment. The semiconductor crystal multilayer film includes a Si substrate 210, a Si crystal layer not containing impurities 220, a semiconductor crystal film containing a group 15 element as impurities 230, and a Si crystal layer not containing impurities 240.

[0056] The Si substrate 210 may be also a single crystal Si substrate. The Si substrate 210 may be also an SOI (Silicon on Insulator) substrate and an SOQ (Silicon on Quartz) substrate, in which a single crystal Si thin film is formed on an insulator. The Si substrate 210 may be also e.g. a Si substrate with (100) plane orientation.

[0057] In the present example, the Si crystal layer not containing impurities 220 is provided on the Si substrate 210 by the sputter epitaxy method; however, the same Si crystal layer or Si and Ge mixed crystals may be also provided by other methods such as the CVD method.

[0058] The group 15 element-containing Si crystal film 230 is provided on the Si crystal layer not containing impurities 220. It should be noted that phosphorus (P) is used as the group 15 element in the present embodiment below; however, any group 15 element may be used.

[0059] The Si crystal layer not containing impurities 240 is provided on the group 15 element-containing Si crystal film 230. In the present embodiment, the Si crystal layer not containing impurities 240 is grown by the sputter epitaxy method; however, the same Si crystal layer may be also provided by other methods such as the CVD method, and in the semiconductor crystal multilayer film, all crystal layers are grown at the same temperature, including the Si substrate 210, the Si crystal layer not containing impurities 220, the semiconductor crystal film containing a group 15 element as impurities 230, and the Si crystal layer not containing impurities 240.

[0060] In the present embodiment, a phosphorus (P)-doped Si crystal film was grown using a target including phosphorus (P) as impurities (100 plane orientation, phosphorus concentration 610.sup.19/cm.sup.3) by the sputter epitaxy method. Ar was used as the inert gas and the pressure thereof was 5 [mTorr].

Impurity Activation Rate-Growth Rate

[0061] Changes in the impurity activation rate with respect to the crystal growth rate will now be illustrated. FIG. 7A represents the activation rate of impurities in the crystal film at a growth temperature of 400 C. when the growth rate of the semiconductor crystal film is changed.

[0062] As can be seen from the graph, as the growth rate is raised, the impurity activation rate is linearly reduced. As specific values, an activation rate of 72% at a growth rate of 2.7 nm per minute (growth rate of 20 atomic layers per minute), and an activation rate of 81% at a growth rate of 0.66 nm per minute (growth rate of 5 atomic layers per minute) are obtained. It is therefore found that a slower growth rate indicates a higher impurity activation rate. It was found that a semiconductor crystal film having an impurity activation rate of above 72% could be formed when the growth rate of the semiconductor crystal film was 2.7 nm or less per minute, and a semiconductor crystal film having an impurity activation rate of above 50% could be formed when the growth rate was 7 nm or less per minute at a growth temperature of 400 C.

[0063] FIG. 7B shows the activation rate of impurities in a crystal film when a phosphorus-doped SiGe growth rate is changed. The activation rate was 94% at a growth rate of 3.5 nm per minute and the activation rate was 100% at a growth rate of 0.9 nm per minute, and the same tendency as of the phosphorus-doped Si crystal film was obtained.

Carrier Density and Impurity Activation Rate-Growth Temperature

[0064] FIG. 8A(a) and FIG. 8A(b) show a relationship between the growth temperature and the carrier density, and a relationship between the growth temperature and the impurity activation rate, respectively. The growth rate was 2.7 nm per minute. Even when the growth temperature is raised, the impurity concentration in the semiconductor crystal film 230 is only slightly reduced, and thus the carrier density and the impurity activation rate show almost the same changes. When the growth temperature is lower than 250 C., the carrier density and the impurity activation rate are reduced. The carrier density and the impurity activation rate are moderately increased at a growth temperature from 300 C. to 450 C., and they are almost constant at 450 C. or higher. Specifically, the carrier density is 310.sup.19/cm.sup.3 and the activation rate is 59% at a growth temperature of 300 C., and it is found that a sufficiently high-quality crystal film is obtained. In addition, when the growth temperature is further raised, the carrier density and the activation rate are further increased, and a carrier density of 3.610.sup.19/cm.sup.3 and an activation rate of 75% are obtained at a growth temperature of 448 C.

Carrier Mobility-Growth Temperature

[0065] FIG. 8B shows a relationship between the growth temperature and the carrier mobility. The growth rate was 2.7 nm per minute as with the above. The carrier mobility is low at lower than 250 C. In addition, the rate of increase in carrier mobility is reduced at a growth temperature of 300 C. or higher, and the mobility is almost constant at 400 C. or higher. This electron mobility is almost coincident with the universal mobility, and it is found that a high-quality semiconductor crystal film is obtained at a temperature higher than 400 C. This tendency is the same as of the impurity activation rate described above.

[0066] From FIGS. 8A(a) and (b) and FIG. 8B(c), it is found that an impurity-containing Si semiconductor crystal film having sufficient mobility for semiconductor device operation can be grown by the sputter epitaxy method at a growth temperature of at least 300 C. or higher and desirably 400 C. or higher.

Impurity Profile-Growth Temperature

[0067] Next, when a phosphorus-doped Si crystal film was grown on a non-doped Si crystal film by the sputter epitaxy method, the degree of diffusion of doped impurities was measured. FIG. 9 show the phosphorus concentration in the depth direction when a target containing phosphorus as impurities was used and the growth temperature was 320 C., 400 C., 450 C., 500 C., 550 C. and 600 C. The growth rate was 2.7 nm per minute as with the above. In samples grown at 320 C. and 400 C., the slope at a depth of around 175 [nm] of the graphs is 10 [nm/decade]. In samples grown at a growth temperature 450 C. and a growth temperature of 500 C., the diffusion is slightly increased, 12 [nm/decade]; however, it is found that a steeper impurity profile than the profile in boron doping shown in FIG. 5 can be formed. The features of the impurity profile are shown in Table 1 as numerical values.

TABLE-US-00001 TABLE 1 Growth temperature Backward diffusion Forward diffusion ( C.) (nm/decade) (/cm.sup.3) 320 10 1.8 10.sup.17 400 10 4.8 10.sup.17 450 12 1.0 10.sup.18 500 12 2.3 10.sup.18 550 44 4.9 10.sup.18 600 176 7.2 10.sup.18

[0068] In the table above, the backward diffusion represents a depth at which the concentration of impurities, which are reduced and diffused in an exponential manner in the depth direction from the semiconductor crystal film 230 containing group 15 impurities into the semiconductor layer 220 grown using a target not containing impurities, is reduced to 1/10. The forward diffusion represents the average value of concentrations of impurities, which are diffused from the semiconductor crystal film 230 containing group 15 impurities into the semiconductor layer 240 grown using a target not containing impurities, in an approximately constant impurity concentration part in a depth of about 15 nm to 35 nm. As can be seen with reference to the table 1 above, there is no diffusion into the non-doped semiconductor crystal film, a base of the impurity-doped semiconductor crystal film, at a growth temperature of lower than 600 C. and more desirably 500 C. or lower.

[0069] On the other hand, it is found that when the non-doped Si semiconductor crystal film is grown on the impurity-doped semiconductor crystal film at a growth temperature of 320 to 600 C., forward diffusion into the non-doped Si semiconductor crystal film is less at a lower temperature.

[0070] From the above experimental results, it is found that when a phosphorus (P)-doped semiconductor crystal film is grown by the sputter epitaxy method, the growth temperature is preferably 320 to 500 C.

Smoothness of a Grown Film

[0071] FIG. 10 is an example of cross-sectional TEM (Transmission Electron Microscopy) photographs of the grown films. Although particles, which usually hinder crystal growth, exist in the interface between the Si substrate and the Si grown layer shown in the photograph, when the Si crystal layer is grown to 30 nm, the upper surface thereof is smooth at an atomic layer level. Even after growth of a desired semiconductor multilayer film is completed, the surface thereof can be maintained to very clean conditions by retaining the semiconductor multilayer film in a very high vacuum, which is favorable, for example, to form a SiO.sub.2 film by oxidation and to form an ohmic electrode by forming a film of metal such as titanium, nickel or tungsten or a multilayer film thereof in the subsequent process.

(Other Examples)

[0072] Using an intrinsic semiconductor not containing impurities as a Si target or a Ge target, an intrinsic semiconductor crystal film of Si or SiGe can be grown in the same manner. Using the crystal growth method which can laterally form the above steep impurity profile, a P-type semiconductor film, an N-type semiconductor film, and an I-type semiconductor film are formed, and various semiconductor junctions such as a PN junction and a PIN junction can be formed. When the I layer of the PIN junction is SiGe, the bandgap is narrower than the bandgap of Si depending on the composition ratio thereof, and thus a photodiode which can respond to a longer wavelength region can be produced.

[0073] In the production method for a semiconductor crystal film according to the present invention, a target doped to a concentration D.sub.1 and a target not containing a dopant may be simultaneously sputtered. By adjusting the electric power applied to the two targets, the concentration of impurities in a grown crystal film can be controlled (provided that the concentration is equal to or lower than D.sub.1).

[0074] In the production method for a semiconductor crystal film according to the present invention, a target doped to a concentration D.sub.1, a target doped to a concentration D.sub.2 and a target not containing a dopant may be simultaneously sputtered. By adjusting electric power applied to the three targets, the concentration of impurities in a grown crystal film can be controlled (provided that the concentration is equal to or lower than D.sub.1 and D.sub.2).

[0075] In addition, impurity elements contained in each of the target doped to the concentration D.sub.1 and the target doped to the concentration D.sub.2 may be the same or different.

REFERENCE SIGN LIST

[0076] 10 Vacuum chamber [0077] 20, 21 Target [0078] 30 Si substrate