CURRENT SENSOR FOR PRINTED CIRCUIT BOARD
20250172641 ยท 2025-05-29
Inventors
Cpc classification
G01R33/098
PHYSICS
International classification
Abstract
A contactless current sensing circuit for sensing current in a conductive wire on a dielectric substrate of a printed circuit board (PCB) includes a plurality of magnetic tunneling junction (MTJ) structures including first and second MTJ structures on a first side of the conductive wire, and third and fourth MTJ structures on a second side of the conductive wire opposite to the first side. The MTJ structures are located within the H-field induced by a current flowing through the conductive wire.
Claims
1. A circuit comprising: a conductive wire on a dielectric substrate of a printed circuit board (PCB); a plurality of magnetic tunneling junction (MTJ) structures including first and second MTJ structures on a first side of the conductive wire; and third and fourth MTJ structures on a second side of the conductive wire opposite to the first side.
2. The circuit of claim 1, wherein the plurality of MTJ structures are packaged in a single chip over the dielectric substrate.
3. The circuit of claim 2, wherein the single chip is located on an opposite side of the dielectric substrate from the conductive wire.
4. The circuit of claim 3, wherein the single chip is coupled to an input voltage wire, a first output voltage wire, and a second output voltage wire, and the input voltage wire, the first output voltage wire and the second output voltage wire are located on the same side of the dielectric substrate as the conductive wire.
5. The circuit of claim 1, wherein the first and second MTJ structures are packaged separately from the third and fourth MTJ structures.
6. The circuit of claim 5, wherein the first and second MTJ structures are packaged in a first chip, and the third and fourth MTJ structures are packaged in a second chip.
7. The circuit of claim 5, wherein the first MTJ structure is packaged in a first chip, the second MTJ structure is packaged in a second chip, the third MTJ structure is packaged in a third chip, and the fourth MTJ structure is packaged in a fourth chip.
8. The circuit of claim 5, wherein the separate packages are located on the same side of the dielectric substrate as the conductive wire.
9. The circuit of claim 1, wherein the conductive wire is a copper trace printed on the PCB.
10. The circuit of claim 1, wherein the dielectric substrate is a polymer material, a fiber-reinforced polymer material, a fiber and polymer laminate, or a ceramic material.
11. The circuit of claim 1, wherein the first, second, third and fourth MTJ structures are resistors in a Wheatstone bridge circuit.
12. The circuit of claim 11, wherein free layers of the plurality of MTJ structures are located within an H-field induced when a current flows through the wire and configured to change a magnetization direction in the presence of the H-field.
13. An apparatus comprising: a printed circuit board (PCB) including a dielectric substrate; a conductive wire on the dielectric substrate; a plurality of magnetic tunneling junction (MTJ) structures including first and second MTJ structures on a first side of the conductive wire; and third and fourth MTJ structures on a second side of the conductive wire opposite to the first side.
14. The apparatus of claim 13, wherein the plurality of MTJ structures are packaged in a single chip over the dielectric substrate.
15. The apparatus of claim 14, wherein the single chip is located on an opposite side of the dielectric substrate from the conductive wire.
16. The apparatus of claim 15, wherein the single chip is coupled to an input voltage wire, a first output voltage wire, and a second output voltage wire, and the input voltage wire, the first output voltage wire and the second output voltage wire are located on the same side of the dielectric substrate as the conductive wire.
17. The apparatus of claim 13, wherein the first and second MTJ structures are packaged separately from the third and fourth MTJ structures.
18. The apparatus of claim 17, wherein the first and second MTJ structures are packaged in a first chip, and the third and fourth MTJ structures are packaged in a second chip.
19. A method for forming a current sensing circuit, the method comprising: placing, on a printed circuit board (PCB) with a conductive wire, a plurality of magnetic tunneling junction (MTJ) structures including first and second MTJ structures on a first side of the conductive wire, and third and fourth MTJ structures on a second side of the conductive wire opposite to the first side.
20. The method of claim 19, wherein placing the plurality of MTJ structures on the PCB includes placing a single chip comprising the plurality of MTJ structures on the PCB and coupling the single chip to a ground, an input voltage wire, a first output voltage wire, and a second output voltage wire of the PCB.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0008]
[0009]
[0010]
[0011]
[0012]
DETAILED DESCRIPTION
[0013] Embodiments of the present application relate to a current sensing circuit, an apparatus comprising a current sensing circuit and a method for forming the current sensing circuit.
[0014] A detailed description of embodiments is provided below along with accompanying figures. The scope of this disclosure is limited by the claims and encompasses numerous alternatives, modifications and equivalents. Although steps of various processes are presented in a given order, embodiments are not necessarily limited to being performed in the listed order. In some embodiments, certain operations may be performed simultaneously, in an order other than the described order, or not performed at all.
[0015] Numerous specific details are set forth in the following description. These details are provided to promote a thorough understanding of the scope of this disclosure by way of specific examples, and embodiments may be practiced according to the claims without some of these specific details. Accordingly, the specific embodiments of this disclosure are illustrative, and are not intended to be exclusive or limiting. For clarity, technical material that is known in the technical fields related to this disclosure has not been described in detail so that the disclosure is not unnecessarily obscured. The figures are not drawn to scale, and some features are intentionally enlarged or diminished for emphasis and visual clarity.
[0016]
[0017] The PCB 103 may include one or more layer or dielectric substrate 102, each of which may include a polymeric material such as epoxy, polyester, polyimide, or polytetrafluorethylene. The polymeric material may be reinforced or interwoven with fibers such as glass or organic fibers. In some embodiments, PCB 103 is a laminate material of multiple layers, one or more of which is a layer of conductive material such as copper. In an embodiment, the PCB 103 includes a copper ground plane. Laminate layers may be alternating layers of polymer and fibers. In some embodiments, one or more layer of PCB 103 is a ceramic material. Examples of PCBs 103 are FR-4, CEM-2 and RF-35.
[0018] The wire 104 may be a conductive metal that is printed or otherwise suitably provided on the PCB 103. The dimensions of the wire 104 may be dictated by the intended application of the current sensor. For example, a thickness of a copper wire 104 may be from about 0.035 mm to 0.31 mm, and a width of a copper wire may be from about 0.25 mm to 7.6 mm. The specific size of wires 104 may vary between embodiments based on the application of the PCB 103 and the amount of current which the wire 104 is designed to handle.
[0019] An MTJ structure 106 comprises at least three layers of material including two layers of magnetic material 108 and 112 separated by a thin insulting layer 110. The magnetic material layers may include a pinned layer 112 which has a fixed magnetic orientation and a free layer 108. The magnetization direction of the free layer 108 may be adaptable, such that the magnetization direction changes when exposed to an external electromagnetic field. The MTJ structure 106 may be a perpendicular MTJ (pMTJ) structure.
[0020] For tunneling between the magnetic layers 108 and 112 of MTJ structure 106, the tunneling current is highest when the magnetization direction of the magnetic layers are parallel and tunneling current is lowest when the magnetization direction of the magnetic layers are anti-parallel. Accordingly, the resistance of an MTJ structure 106 is proportional to the difference in the magnetization direction between the pinned layer 112 and the free layer 108. This resistance may be referred to as the tunneling magnetic resistance (TMR) of an MTJ structure 106. When a voltage is applied to the magnetic materials, electrons can travel across the insulating layer 110 using quantum mechanical tunneling. In
[0021]
[0022] The flow of magnetic field 222 acts on the direction of magnetization 114 of the free layers 108 of the MTJ structures 106 by causing the direction of magnetization 114 to move in the direction of the magnetic field 222. As seen in
[0023] The orientations of the directions of magnetization 114 in
[0024]
[0025] The altered magnetization directions 114 result in the MTJ structures 106a and 106c on one side of the wire 104 having different resistances from the MTJ structures 106b and 106d on the opposite side of the wire 104. This difference can be exploited to measure the amount of current 220 flowing through the wire 104.
[0026] As seen in
[0027]
[0028] As seen in
[0029] The chips 430 may be formed by known and existing or future developed processes. For example, components of a chip 430 may be formed by deposition, lithography, and etching methods.
[0030] In an embodiment, lower metal contacts 434 are formed by depositing and etching a conductive material on a semiconductor substrate. Each of the layers of material in the MTJ structures 106 may be deposited over the lower metal contacts 434 by a conventional deposition method such as a physical vapor deposition (PVD) or a chemical vapor deposition (CVD) process. Following the deposition processes, a resist formed over a topmost material is exposed to energy (light) to form a pattern (opening). An etching process with a selective chemistry, e.g., reactive ion etching (RIE), may be used to pattern the materials through the openings of the resist to form the respective MTJ structures 106. The resist can be removed by a conventional oxygen ashing process or other known stripants.
[0031] The free layer 108 and pinned layer 112 of the MTJ structures 106 may comprise alloys and/or multilayers of cobalt, iron, alloys of cobalt-iron, nickel, alloys of nickel iron, and alloys of cobalt-iron-boron. The thin insulating layer 110 may include an oxide material such as an oxide of magnesium or aluminum, for example. The magnetization direction of fixed layer 112 may be fixed by an adjacent synthetic anti-ferromagnetic (SAF) layer including one or more layer of material comprising one or more of Mn, Pt, Ir, Cr or Fe, for example. In addition, the MTJ structures 106 may include one or more layer such as a buffering layer comprising one or more layer a non-magnetic material such as Ru or Ta. The MTJ structures 106 may be comprised of various layers of these and other materials as known in the art to achieve desired performance characteristics and conform to desired deposition and etching processes.
[0032] Upper metal contacts 432 (and other wiring) may be formed over the MTJ structures 106 by similar deposition and etching processes. After the device and wiring structures are formed, they may be packaged in a polymeric packaging material such as an epoxy molding compound (EMC) exposing external connections such as pins or lead frames for attaching the chips 430 to circuitry of the PCB 103.
[0033]
[0034] In the example of
[0035] A person of skill in the art will recognize that the circuit 100 can be implemented in various configurations without departing from the scope of this disclosure. For example, in some embodiments, each of the MTJ structures 106 is packaged in a separate chip 430. In another embodiment, each resistor in the Wheatstone bridge circuit may be implemented by connecting two or more MTJ structures 106 in series. In another embodiment, the MTJ structures 106 are included in a single chip 430 which is placed over the wire 104 on the same side of the dielectric substrate 102 as the wire 104 whose current is being sensed. Accordingly, embodiments may be implemented using different numbers of chips 430, and the one or more chip 430 may be located on the same side of dielectric substrate 102 as the wire 104 or on the opposite side of the dielectric substrate 102.
[0036] The circuit 100 may be incorporated into an electronic device. The device can be any product that measures current in a wire of a PCB in the device, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor. The device may be a household appliance, a portable or stationary computing device, a vehicle or a component of a vehicle, an image capturing device, etc.
[0037] Aspects of the present disclosure have been described in conjunction with the specific embodiments thereof that are proposed as examples. Numerous alternatives, modifications, and variations to the embodiments as set forth herein may be made without departing from the scope of the claims set forth below. Accordingly, embodiments as set forth herein are intended to be illustrative and not limiting.