Method for calibrating an SSB receiver

Abstract

A method for calibrating a single sideband (SSB) receiver, comprising: a) adjusting a mutual phase shift of I- and Q-signals to a first phase shift value; b) feeding a first, a second and a third test signal having a predetermined phase offset to an input to obtain respective SSB signals, and measuring a first and a second phase difference therefrom; c) calculating a first phase error on the basis of the first and second phase differences; d) repeating steps a)-c) with a second phase shift value to obtain a second phase error; and e) calibrating the SSB receiver by using that one of the first and second phase shift values that has yielded the smaller one of the first and second phase errors.

Claims

1. A method for calibrating a single sideband (SSB) receiver having an input for receiving a signal, an I/Q mixer for converting the signal into an I-signal in an inphase path and a Q-signal in a quadrature path, a phase shifter for mutually phase shifting the I- and Q-signals by an adjustable phase shift, and a combiner for combining the mutually phase shifted I- and Q-signals to an SSB signal, the method comprising: a) adjusting the phase shift to a first phase shift value; b) successively feeding a first, a second and a third test signal to the input, the first and second test signals having a predetermined phase offset and the second and third test signals having the same predetermined phase offset, to obtain respective first, second and third SSB signals, and measuring a first phase difference between the first and second SSB signals and a second phase difference between the second and third SSB signals; c) calculating a first phase error on the basis of the first and second phase differences; d) repeating steps a)-c) with a second phase shift value in step a) to obtain a second phase error; and e) calibrating the SSB receiver by using that one of the first and second phase shift values that has yielded the smaller one of the first and second phase errors.

2. The method according to claim 1, wherein the first and second phase errors are calculated each as
E.sub.,j=|.sub.12.sub.23| with E.sub.,j corresponding to the respective first (j=1) and second (j=2) phase error, .sub.12, .sub.23 corresponding to the first and second phase differences, respectively, and |.Math.| denoting the absolute value.

3. The method according to claim 1, wherein the predetermined phase offset is in the range of 10 to 80.

4. The method according to claim 1, wherein the predetermined phase offset is in the range of 25 to 65.

5. The method according to claim 1, wherein the predetermined phase offset is approximately 45.

6. The method according to claim 1, wherein the phase shifter comprises, in one of the inphase and quadrature paths, a filter with at least one variable capacitor or inductor.

7. The method according to claim 6, wherein the filter comprises a capacitor bank having parallel capacitors that can be selectively connected to said one path to adjust the phase shift.

8. The method according to claim 7, wherein capacitances of the capacitors of said capacitor bank form a geometric sequence with a common ratio of two.

9. The method according to claim 6, wherein the phase shifter comprises another filter in the other one of said paths.

10. The method according to claim 1, wherein the SSB receiver further comprises an amplitude adjuster for mutually adjusting the amplitudes of the I- and Q-signals by an adjustable amplitude gain, wherein, in step a) and its repetition in step d), also the amplitude gain is adjusted to a first amplitude gain value and a second amplitude gain value, respectively, and in step e) the SSB receiver is calibrated by using that combination of the first phase shift and the first amplitude gain value and the second phase shift and the second amplitude gain value that has yielded the smaller one of the first and second phase errors.

11. The method according to claim 10, wherein the amplitude adjuster comprises a resistor bank having parallel resistors that can be selectively connected to one of the inphase and quadrature paths to adjust the amplitude gain.

12. The method according to claim 11, wherein resistances of the resistors of said resistor bank form a geometric sequence with a common ratio of two.

13. The method according to claim 11, wherein the resistor bank further has a respective capacitor in series to each selectively connectable resistor.

14. The method according to claim 1, wherein the first, second, and third test signals are generated by amplitude modulation.

Description

BRIEF DESCRIPTION OF THE DRAWINGS/FIGURES

(1) The disclosed subject matter shall now be described in further detail by means of exemplary embodiments thereof under reference to the enclosed drawings, in which:

(2) FIG. 1 shows an SSB receiver in a schematic block diagram;

(3) FIG. 2 shows a method according to the disclosed subject matter for calibrating the SSB receiver of FIG. 1 in a flow diagram; and

(4) FIG. 3 shows a test signal generator generating and feeding test signals according to the method of FIG. 2 into the SSB receiver of FIG. 1 in a schematic block diagram.

DETAILED DESCRIPTION

(5) FIG. 1 shows a single sideband (SSB) receiver 1 receiving a signal S at an input 2 and processing the signal S by an I/Q mixer 3, a phase shifter 4 and a combiner 5 to obtain an SSB signal R therefrom. The I/Q mixer 3 has a first mixer 6 connected to a local oscillator 7 for converting the signal S into an I-signal I in an inphase path 8 and a second mixer 9 connected to the local oscillator 7 via a 90 phase delay element 10 for converting the signal S into a Q-signal Q in a quadrature path 11. Depending on the frequency of the local oscillator 7, the I- and Q-signals I, Q can reside either in intermediate band frequencies or in baseband.

(6) The phase shifter 4 is arranged downstream of the I/Q mixer 3 and mutually phase shifts the I- and Q-signals I, Q by an adjustable phase shift whose determination will be described below. The combiner 5 is arranged downstream of the phase shifter 4 and combines the mutually phase shifted I- and Q-signals I, Q to the SSB signal R, e.g., by adding or subtracting these signals I, Q to/from one another, to cancel any unwanted sideband (image signal) in the SSB signal R.

(7) The phase shift affects the cancellation of the image signal and is to be properly adjusted by calibrating the SSB receiver 1. A method M for calibrating the SSB receiver 1 shall now be described with reference to FIGS. 1 and 2.

(8) In a first step a) of the method M, the phase shift is adjusted to a first phase shift value .sub.1. Typically, the first phase shift value is adjusted to approximately cause 180 dephased I- and Q-signals I, Q. In the embodiment shown in FIG. 1 the SSB receiver 1 has a controller 12 which adjusts the phase shift as described later on in more detail.

(9) In a second step b) of the method M a first, a second and a third test signal S.sub.1, S.sub.2, S.sub.3, generally S.sub.i (i=1, 2, 3), are fed to the input 2 to obtainafter receiving, I/Q mixing, phase shifting and combining each of the test signals S.sub.i in the SSB receiver 1respective first, second and third SSB signals R.sub.1, R.sub.2, R.sub.3, generally R.sub.i (i=1, 2, 3), therefrom. The first test signal S.sub.1 and the second test signal S.sub.2 have a predetermined phase offset .sub.12, and the second test signal S.sub.2 and the third test signal S.sub.3 have the same predetermined phase offset .sub.23=.sub.12=. Thus, the phase of the second test signal S.sub.2 is centred and separated from the phase of the first test signal S.sub.1 and the phase of the third test signal S.sub.3 by the absolute value of the phase offset .

(10) The test signals S.sub.i may be generated by a variety of modulation techniques known in the art. An exemplary test signal generator 13 to generate the test signals S.sub.i is shown in FIG. 3. The test signal generator 13 has a mixer 14 modulating the signal of a local oscillator by an amplitude signal A of an amplitude generator 16 to generate each test signal S.sub.i by amplitude modulation. For instance, the amplitude generator 16 can generate the amplitude signal A to oscillate at a single target frequency which eases a successive phase measurement described below. The test signal generator 13 further has two 45 phase delay lines 17, 18 each of which can be selectively connected to the signal path 19 of the amplitude-modulated test signal S.sub.i via switches 20-23, to generate the first, second and third test signals S.sub.i having a predetermined phase offset of 45. Alternatively, the predetermined phase offset may have a different value, e.g., in the range of 10 to 80, or in the range of 25 to 65.

(11) Coming back to FIG. 2, step b) of the method M further comprises measuring a first phase difference .sub.12 between the first SSB signal R.sub.1 and the second SSB signal R.sub.2 and measuring a second phase difference .sub.23 between the second SSB signal R.sub.2 and the third SSB signal R.sub.3. The difference between the first and second phase differences .sub.12, .sub.23 corresponds to an asymmetry in the phase measurement and is indicative of a residual image signal. The method M is based on utilising the degree of asymmetry of the first and second phase differences .sub.12, .sub.23 at a selected phase shift to enhance image cancellation.

(12) In the SSB receiver 1 of FIG. 1, the phase differences .sub.12, .sub.23 are measured in an analogue or digital phase measuring circuit 24. For instance, the phase measuring circuit 24 may measure the phase of each SSB signal e.g., by comparing zero crossings of each SSB signal R.sub.i with zero crossings of a local oscillator, which oscillates at the same target frequency of amplitude modulation mentioned above, and subsequently subtract the measured phases from each other.

(13) It shall be noted that the feeding and measuring of step b) may be performed in several temporal orders: in a first exemplary variant by successively feeding all three test signals S.sub.i into the input 2 one after the other while measuring the respective phases .sub.i of the SSB signals R.sub.i and then computing the phase differences .sub.12, .sub.23 therefrom; or in a second exemplary variant by successively feeding two of the three test signals S.sub.i, e.g., the first and the second test signals S.sub.1, S.sub.2, while measuring the phases .sub.1 and .sub.2 and computing their phase difference .sub.12 and then feeding other two of the three test signals S.sub.i, e.g., the second and the third test signals S.sub.2, S.sub.3, while measuring the phases .sub.2 and .sub.3 and computing their phase difference .sub.23.

(14) In a subsequent step c) of the method M a first phase error E.sub.,1 is calculated on the basis of the first and second phase differences .sub.12, .sub.23 measured in step b). To this end, a variety of mathematical functions depending on the phase differences .sub.12, .sub.23 can be used, e.g.,

(15) In a subsequent step c) of the method M, a first phase error E.sub.,1 is calculated on the basis of the first and second phase differences .sub.12, .sub.23 measured in step b). To this end, a variety of mathematical functions depending on the phase differences .sub.12, .sub.23 can be used, e.g.,
E.sub.,1=|.sub.12.sub.23|,(1)
E.sub.,1=max(.sub.12/.sub.23,.sub.23/.sub.12),(2)
E.sub.,1=|.sub.12+.sub.232.Math.|, etc.(3)
with E.sub.,1 denoting the first phase error, |.Math.| denoting the absolute value, and max(.Math.) denoting the maximum.

(16) In the SSB receiver 1 of FIG. 1, the first phase error E.sub.,1 is calculated in an error calculation unit 25 and subsequently stored in a memory 26 together with the first phase shift value .sub.1.

(17) In a subsequent step d) of the method M, steps a)-c) are repeated in a loop 27 at least once, i.e. in the first repetition, a second phase shift value .sub.2 is set in step a), to obtain a second phase error E.sub.,2 at the end of step c). In other words, within the first repetition of the loop 27, in step a) the phase shift is adjusted to a second phase shift value .sub.2 different from the first phase shift value .sub.1; with this adjustment the test signals S.sub.i are successively fed into the input 2 and the resulting phase differences .sub.12, .sub.23 of the then obtained (and differently phase shifted) SSB signals R.sub.i are measured in step b); and from the new phase differences .sub.12, .sub.23 a second phase error E.sub.,2 is calculated in step c). The phase shift values .sub.2 may be stored together with the second phase error E.sub.,2 in the memory 26.

(18) In a final step e), the SSB receiver 1 is calibrated by using that one of the first and second phase shift values .sub.1, .sub.2 that has yielded the smaller one of the first and second phase errors E.sub.,1, E.sub.,2, i.e. by using the first phase shift value .sub.1 in case the first phase error E.sub.,1 is smaller than the second phase error E.sub.,2 and the second phase shift value .sub.2 otherwise. To this end, the smallest phase error E.sub.,1 or E.sub.,2 and the corresponding phase shift value .sub.1 or .sub.2 can be retrieved from the memory 26 and used by the controller 12.

(19) After carrying out steps a) to e), the SSB receiver 1 is roughly calibrated and ready to receive further signals S at a higher quality, i.e. with a lower residual image signal.

(20) As indicated by the loop 27 in FIG. 2, the steps a)-c) mayand typically willbe repeated more than once for multiple phase shift values .sub.j (j=1, 2, 3, 4, . . . ), to obtain respective multiple phase errors E.sub.,j and store them together with the phase shift values .sub.j in the memory 26 so that the best phase shift value .sub.j, which yielded the smallest phase error E.sub.,j, can be retrieved from the memory 26 and used by the controller 12 in step e). Of course, to find a phase shift value .sub.j that yields a minimum phase error E.sub.,j any optimisation algorithms known in the art may be employed by the controller 12.

(21) Alternatively, e.g., in case of a small number of possible phase shift vales .sub.j, all possible phase shift vales .sub.j may be employed one after the other in a brute-force manner to find a minimal phase error E.sub.,j.

(22) FIG. 1 shows an exemplary embodiment of the phase shifter 4 which shall now be described in more detail. The phase shifter 4 of this embodiment comprises a first filter 28 (here: a low pass filter) in the inphase path 8 and a second filter 29 (here: a high pass filter) in the quadrature path 11. The first filter 28 has a variable capacitor formed by a capacitor bank 30 which has parallel capacitors 31.sub.1, 31.sub.2, . . . 31.sub.N, generally 31.sub.n, that can be selectively connected to the inphase path 8 via respective switches 32.sub.1, 32.sub.2, . . . 32.sub.N, generally 32.sub.n. The switches 32.sub.n are controlled by the controller 12 which thereby adjusts the phase shift to the respective phase shift value .sub.j. In order to fine-tune the adjustment of the phase shift the capacitors 31.sub.n of the capacitor bank 30 optionally form a geometric series with a common ratio of two, i.e. the capacitance of the n-th capacitor 31.sub.n is given by C.sub.n=C.sub.1.Math.2.sup.n-1 with C.sub.1 and C.sub.n denoting the capacitance of the first and n-th capacitors 31.sub.1, 31.sub.n of the capacitor bank 30, respectively.

(23) In other embodiments (not shown) the SSB receiver 1 can comprise low, high and bandpass filters in the inphase and/or quadrature paths 8, 11 each with or without a variable capacitor and/or inductor to filter and phase shift the I- and Q-signals I, Q.

(24) Moreover, as shown in FIG. 1 the SSB receiver 1 can optionally comprise an amplitude adjuster 33 which mutually adjusts the amplitudes of the I- and Q-signals I, Q by an adjustable amplitude gain . The amplitude adjuster 33 can be controlled by the controller 12 such that besides the phase shift also the amplitude gain is adjusted in step a) to a first amplitude gain value .sub.1, and in one or more repetition/s in the loop 27 of step d) to a respective second (optionally: third, fourth, . . . ) amplitude gain value .sub.2 (.sub.3, .sub.4, . . . ). The phase shift values .sub.j, the amplitude gain values .sub.j and the resulting phase errors E.sub.,j can be stored in the memory 26 and employed to find that combination of phase shift and amplitude gain values .sub.j, .sub.j that has yielded the smallest one of the phase errors E.sub.,j. This combination may then be used to calibrate the SSB receiver 1 therewith in step e).

(25) As can be seen in FIG. 1, the optional amplitude adjuster 33 can have a structure similar to the capacitor bank 30 and comprise a resistor bank 34 which has parallel resistors 35.sub.1, 35.sub.2, . . . 35.sub.M, generally 35.sub.m, that can be selectively connected to the quadrature path 11 via respective switches 36.sub.1, 36.sub.2, . . . 36.sub.M, generally 36.sub.m. The switches 36.sub.m are controlled by the controller 12 which thereby adjusts the amplitude gain to the respective amplitude gain value .sub.j. In order to fine-tune the adjustment of the amplitude gain the resistors 35.sub.m of the resistor bank 34 optionally form a geometric series with a common ratio of two, i.e. the resistance of the m-th resistor 35.sub.m is given by W.sub.m=W.sub.1.Math.2.sup.n-1, with W.sub.1 and W.sub.m denoting the resistance of the first and m-th resistors 35.sub.1, 35.sub.m of the resistor bank 34, respectively. Moreover, to additionally suppress DC components in the Q-signal Q, the resistor bank 34 further has a respective capacitor 37.sub.1, 37.sub.2, . . . , 37.sub.M in series to each selectively connected resistor 35.sub.m.

(26) While the optional amplitude adjuster 33 is arranged in the quadrature path 11 only and attenuates the Q-signal Q in the embodiment shown in FIG. 1, more generally the mutual amplitude adjustment can be carried out by attenuating or amplifying one or both of the I- and Q-signals.

(27) The present disclosed subject matter is not restricted to the specific embodiments described in detail herein, but encompasses all variants, combinations and modifications thereof that fall within the scope of the appended claims.