LOW POWER DC-AC COUPLED PRE-AMPLIFIER CIRCUITS FOR HIGH-SPEED LINK RECEIVERS

Abstract

Disclosed is a receiver that includes a pre-amplifier circuit and an amplifier circuit. The pre-amplifier circuit includes first and second input terminals that receive signals from a transmitter; first and second output terminals that output signals to the amplifier circuit; a first resistor having a first terminal coupled to the first input terminal, and a second terminal coupled to a first node; a second resistor having a first terminal coupled to the second input terminal, and a second terminal coupled to the first node; a third resistor having a first terminal coupled to the first output terminal, and a second terminal coupled to a second node; a fourth resistor having a first terminal coupled to the second output terminal, and a second terminal coupled to the second node; and a switch having a first terminal coupled to the first node, and a second terminal coupled to the second node.

Claims

1. A receiver, comprising: a pre-amplifier circuit; and an amplifier circuit which, in operation, generates an amplified signal based on output signals provided by the pre-amplifier circuit, wherein the pre-amplifier circuit includes: a first output terminal and a second output terminal that, in operation, provide the output signals to the amplifier circuit; a first input terminal; a second input terminal; a first resistor having a first terminal electrically coupled to the first input terminal, and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal, and a second terminal electrically coupled to the first node; a third resistor having a first terminal electrically coupled to the first output terminal, and a second terminal electrically coupled to a second node; a fourth resistor having a first terminal electrically coupled to the second output terminal, and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node, and a second terminal electrically coupled to the second node.

2. The receiver according to claim 1, wherein: the pre-amplifier circuit operates in a direct current coupling mode while the switch is in a non-conductive state, and the pre-amplifier circuit operates in an alternating current coupling mode while the switch is in a conductive state.

3. The receiver according to claim 1, wherein: an average of a voltage at the first output terminal and a voltage at the second output terminal is provided to the first node while the switch is in a conductive state, and the average of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node while the switch is in a non-conductive state.

4. The receiver according to claim 1 wherein: a resistance of the first resistor is equal to a resistance of the second resistor, and a resistance of the third resistor is equal to a resistance of the fourth resistor.

5. The receiver according to claim 1, wherein the pre-amplifier circuit further comprises: a fifth resistor having a first terminal electrically coupled to a power supply voltage, and a second terminal electrically coupled to the second output terminal; a sixth resistor having a first terminal electrically coupled to the power supply voltage, and a second terminal electrically coupled to the first output terminal; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, a third terminal electrically coupled to the third terminal of the first transistor; and a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and the third terminal of the second transistor, and a third terminal electrically coupled a ground potential.

6. The receiver according to claim 5, wherein: a resistance of the first resistor is equal to a resistance of the second resistor, a resistance of the third resistor is equal to a resistance of the fourth resistor, and a resistance of the fifth resistor is equal to a resistance of the sixth resistor.

7. A pre-amplifier circuit, comprising: a first input terminal; a second input terminal; a first output terminal; a second output terminal; a first resistor having a first terminal electrically coupled to the first input terminal, and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal, and a second terminal electrically coupled to the first node; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, a third terminal electrically coupled to the third terminal of the first transistor; a third resistor having a first terminal electrically coupled to a power supply voltage, and a second terminal electrically coupled to the second output terminal; a fourth resistor having a first terminal electrically coupled to the power supply voltage, and a second terminal electrically coupled to the first output terminal; a fifth resistor having a first terminal electrically coupled to the second output terminal, and a second terminal electrically coupled to a second node; a sixth resistor having a first terminal electrically coupled to the first output terminal, and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node, and a second terminal electrically coupled to the second node.

8. The pre-amplifier circuit according to claim 7, wherein: each of the first terminal of the first transistor and the first terminal of the second transistor is a gate terminal, each of the second terminal of the first transistor and the second terminal of the second transistor is a drain terminal, and each of the third terminal of the first transistor and the third terminal of the second transistor is a source terminal.

9. The pre-amplifier circuit according to claim 7, further comprising: a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and the third terminal of the second transistor, and a third terminal electrically coupled a ground potential.

10. The pre-amplifier circuit according to claim 9, wherein: each of the first terminal of the first transistor, the first terminal of the second transistor, and the first terminal of the third transistor is a gate terminal, each of the second terminal of the first transistor, the second terminal of the second transistor, and the second terminal of the third transistor is a drain terminal, and each of the third terminal of the first transistor, the third terminal of the second transistor, and the third terminal of the third transistor is a source terminal.

11. The pre-amplifier circuit according to claim 7, wherein: the pre-amplifier circuit operates in a direct current coupling mode while the switch is in a non-conductive state, and the pre-amplifier circuit operates in an alternating current coupling mode while the switch is in a conductive state.

12. The pre-amplifier circuit according to claim 7, wherein: an average of a voltage at the first output terminal and a voltage at the second output terminal is provided to the first node while the switch is in a conductive state, and the average of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node while the switch is in a non-conductive state.

13. The pre-amplifier circuit according to claim 7, further comprising: a first capacitor coupled to the first input terminal; and a second capacitor coupled to the second input terminal.

14. The pre-amplifier circuit according to claim 13, wherein: the first capacitor and the second capacitor, in operation, block direct current signals from entering the first input terminal and the second input terminal.

15. The pre-amplifier circuit according to claim 7, wherein: a resistance of the first resistor is equal to a resistance of the second resistor, a resistance of the third resistor is equal to a resistance of the fourth resistor, and a resistance of the fifth resistor is equal to a resistance of the sixth resistor.

16. A method of operating a receiver that includes a pre-amplifier circuit and an amplifier circuit, the method comprising: electrically coupling a first output terminal of the pre-amplifier circuit to the amplifier circuit; electrically coupling a second output terminal of the pre-amplifier circuit to the amplifier circuit; electrically coupling a first terminal of a first resistor to a first input terminal of the pre-amplifier circuit; electrically coupling a second terminal of the first resistor to a first node of the pre-amplifier circuit; electrically coupling a first terminal of a second resistor to a second input terminal of the pre-amplifier circuit; electrically coupling a second terminal of the second resistor to the first node of the pre-amplifier circuit; electrically coupling a first terminal of a third resistor to the first output terminal of the pre-amplifier circuit; electrically coupling a second terminal of the third resistor to a second node of the pre-amplifier circuit; electrically coupling a first terminal of a fourth resistor to the second output terminal of the pre-amplifier circuit; electrically coupling a second terminal of the fourth resistor to the second node of the pre-amplifier circuit; electrically coupling a first terminal of a switch to the first node of the pre-amplifier circuit; electrically coupling a second terminal of the switch to the second node of the pre-amplifier circuit.

17. The method according to claim 16, further comprising: operating the pre-amplifier circuit in a direct current coupling mode while the switch is in a non-conductive state, and operating the pre-amplifier circuit in an alternating current coupling mode while the switch is in a conductive state.

18. The method according to claim 16, further comprising: providing an average of a voltage at the first output terminal and a voltage at the second output terminal to the first node while the switch is in a conductive state, wherein the average of the voltage at the first output terminal and the voltage at the second output terminal is not provided to the first node while the switch is in a non-conductive state.

19. The method according to claim 16 wherein: a resistance of the first resistor is equal to a resistance of the second resistor, and a resistance of the third resistor is equal to a resistance of the fourth resistor.

20. The method according to claim 16, further comprising: electrically coupling a first terminal of a fifth resistor to a power supply voltage; electrically coupling a second terminal of a fifth resistor to the second output terminal; electrically coupling a first terminal of a sixth resistor to the power supply voltage; electrically coupling a second terminal of the sixth resistor to the first output terminal; electrically coupling a first terminal of a first transistor to the second input terminal; electrically coupling a second terminal of the first transistor to the first output terminal; electrically coupling a first terminal of a second transistor to the first input terminal; electrically coupling a second terminal of the second transistor to the second output terminal; electrically coupling a third terminal of the second transistor to a third terminal of the first transistor; electrically coupling a first terminal of a third transistor to a bias voltage potential; electrically coupling a second terminal of the third transistor to the third terminal of the first transistor and the third terminal of the second transistor; and electrically coupling a third terminal of the third transistor to a ground potential.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0021] Non-limiting and non-exhaustive embodiments are described with reference to the following drawings. In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified.

[0022] For a better understanding of the present disclosure, reference will be made to the following Detailed Description, which is to be read in association with the accompanying drawings:

[0023] FIG. 1 shows a block diagram of a receiver according to an embodiment of the present disclosure.

[0024] FIG. 2 is diagram for explaining operation of the receiver shown in FIG. 1 in a DC-coupled mode.

[0025] FIG. 3 is diagram for explaining operation of the receiver shown in FIG. 1 in an AC-coupled mode.

DETAILED DESCRIPTION

[0026] According to the present disclosure, an output common mode signal from a pre-amplifier stage of a receiver (e.g., high-speed link receiver) is used to provide an input common mode signal for input data when the receiver operates in an AC-coupling mode. Thus, receivers according to the present disclosure do not consume additional current while operating in the AC-coupling mode.

[0027] FIG. 1 shows a block diagram of a receiver 100 according to an embodiment of the present disclosure. The receiver includes a pre-amplifier circuit 102 and an amplifier circuit 104. In one or more implementations, the receiver 100 is a high-speed link receiver, which may include additional circuitry (not shown) that demodulates a signal output by the amplifier circuit 104, for example. In one or more implementations, the amplifier circuit 104 includes a differential amplifier, such as an operational amplifier. In one or more implementations, the amplifier circuit 104 is an amplifying and differential-to-single-ended-conversion circuit.

[0028] The pre-amplifier circuit 102 includes an input terminal I.sub.1 and an input terminal I.sub.2 through which the pre-amplifier circuit 102 receives signals transmitted by a transmitter (not illustrated). The input terminal I.sub.1 is a positive data input terminal, and the input terminal I.sub.2 is a negative data input terminal. The pre-amplifier circuit 102 also includes an output terminal O.sub.1 and an output terminal O.sub.2 through which the pre-amplifier circuit 102 provides signals to the amplifier circuit 104.

[0029] In addition, the pre-amplifier circuit 102 includes a transistor T.sub.1, a transistor T.sub.2, and a transistor T.sub.3. In one or more implementations, each of the transistors T.sub.1, T.sub.2, and T.sub.3 is an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET) that includes a gate terminal, a drain terminal, a source terminal, and a body terminal.

[0030] More particularly, the gate terminal of the transistor T.sub.1 is electrically coupled to the input terminal I.sub.2, the drain terminal of the transistor T.sub.1 is electrically coupled to the output terminal O.sub.1, and the source terminal of the transistor T.sub.1 is electrically coupled to the source terminal of the transistor T.sub.2. The gate terminal of the transistor T.sub.2 is electrically coupled to the input terminal I.sub.1, the drain terminal of the transistor T.sub.2 is electrically coupled to the output terminal O.sub.2, and the source terminal of the transistor T.sub.2 is electrically coupled to the source terminal of the transistor T.sub.1. The gate terminal of the transistor T.sub.3 is electrically coupled to a bias voltage potential VG, the drain terminal of the transistor T.sub.3 is electrically coupled to the source terminal of the transistor T.sub.1 and the source terminal of the transistor T.sub.2, and the source terminal of the transistor T.sub.3 is electrically coupled to a ground potential. Additionally, the body terminals of the transistors T.sub.1, T.sub.2, and T.sub.3 are electrically connected to the ground potential.

[0031] The pre-amplifier circuit 102 also includes a resistor R.sub.1, a resistor R.sub.2, a resistor R.sub.3, a resistor R.sub.4, a resistor R.sub.5, and a resistor R.sub.6. Each of the resistors R.sub.1, R.sub.2, R.sub.3, R.sub.4, R.sub.5, and R.sub.6 includes a first terminal and second terminal. More particularly, the first terminal of the resistor R.sub.1 is electrically coupled to the input terminal I.sub.1, and the second terminal of the R.sub.1 is electrically coupled to a node N.sub.1. The first terminal of the resistor R.sub.2 is electrically coupled to the input terminal I.sub.2, and the second terminal of the resistor R.sub.2 is electrically coupled to the node N.sub.1. The first terminal of the resistor R.sub.3 is electrically coupled to a power supply voltage V.sub.supply, and the second terminal of the resistor R.sub.3 is electrically coupled to the output terminal O.sub.2. The first terminal of the resistor R.sub.4 is electrically coupled to the power supply voltage V.sub.supply, and the second terminal of the resistor R.sub.4 is electrically coupled to the output terminal O.sub.1. The first terminal of the resistor R.sub.5 is electrically coupled to the output terminal O.sub.2, and the second terminal of the resistor R.sub.5 is electrically coupled to a node N.sub.2. The first terminal of the resistor R.sub.6 is electrically coupled to the output terminal O.sub.1, and the second terminal of the resistor R.sub.6 is electrically coupled to the node N.sub.2.

[0032] In one embodiment, each of the resistors R.sub.1 and R.sub.2 is a 50 Ohm resistor. Each of the resistors R.sub.3 and R.sub.4 is a 1 KOhm resistor. Each of the resistors R.sub.5 and R.sub.6 is 10 KOhm resistor. Also, the supply voltage V.sub.supply is 1.8 Volts.

[0033] Additionally, the pre-amplifier circuit 102 includes a switch S including a first terminal, a second terminal, and a third terminal through which the switch S receives a control signal Biasselect from control circuitry (not illustrated). The first terminal of the switch S is electrically coupled to the node N.sub.1, and the second terminal of the switch S is electrically coupled to the second node N.sub.2. While the control signal Biasselect has a first characteristic (e.g., voltage level), the switch S is in a conductive state in which the first terminal is electrically coupled to the second terminal. While the control signal Biasselect has a second characteristic (e.g., voltage level), the switch S is in a nonconductive state in which the first terminal is not electrically coupled to the second terminal. While the switch S is in the non-conductive state, the pre-amplifier circuit operates 102 in a DC-coupling mode in which DC signals are not blocked from entering the pre-amplifier circuit 102 through the input terminal I.sub.1 and the input terminal I.sub.2, as will be explained with reference to FIG. 2. While the switch S is in the conductive state, the pre-amplifier circuit 102 operates in an AC-coupling mode in which DC signals are blocked from entering the pre-amplifier circuit 102 through the input terminal I.sub.1 and the input terminal I.sub.2, as will be explained with reference to FIG. 3.

[0034] FIG. 2 is diagram for explaining operation of the receiver 100 in the DC-coupled mode. In FIG. 2, the switch S receives the control signal Biasselect that causes the switch S to be in the non-conductive state. Accordingly, the node N.sub.1 is not electrically coupled to the node N.sub.2. Thus, a common mode receiver voltage V.sub.CM-RX, which is a voltage at the node N.sub.2, is not used to bias the common mode transmitter voltage V.sub.CM-TX, which is the average voltage level of the signals input to the input terminals I.sub.1 and I.sub.2.

[0035] FIG. 3 is diagram for explaining operation of the receiver 100 in an AC-coupled mode. In FIG. 3, the switch S receives the control signal Biasselect that causes the switch S to be in the conductive state. Accordingly, the node N.sub.1 is electrically coupled to the node N.sub.2. The common mode receiver voltage V.sub.CM-RX is the average of the voltage at output terminal O.sub.1 and the voltage at the output terminal O.sub.2, which is provided to the node N.sub.1 in order to bias the common mode transmitter voltage V.sub.CM-TX, which is the average the voltage level at the input terminal I.sub.1 and the voltage level at the input terminal I.sub.2. Accordingly, the common mode transmitter voltage V.sub.CM-TX becomes aligned with the common mode receiver voltage V.sub.CM-RX, and the receiver 100 is able to correctly receive signals from a transmitter having a common mode voltage that is different from the common mode voltage of the receiver 100. Thus, while the receiver 100 operates in the AC-coupling mode (i.e., the switch is in the conductive state), and the receiver 100 can be driven by any transmitter without any common mode constraint.

[0036] The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.

[0037] These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.