METHOD OF CLOCK SYNCHRONIZATION BETWEEN TRANSMITTER AND RECEIVER

Abstract

A method of clock synchronization between a transmitter and a receiver includes sampling a first receiver timestamp and a second receiver timestamp of the receiver at a first time and a second time respectively, sampling a first transmitter timestamp and a second transmitter timestamp of the transmitter at a third time and a fourth time respectively, sampling a first timing synchronization function (TSF) receiver timestamp and a second TSF receiver timestamp by a Wi-Fi TSF at the first time and the second time respectively, sampling a first TSF transmitter timestamp and a second TSF transmitter timestamp by the Wi-Fi TSF at the third time and the fourth time respectively, generating an initial timestamp, generating an initial TSF timestamp, generating a target phase difference, and performing a coarse tune at a receiver system clock periodically to compensate the target phase difference.

Claims

1. A method of clock synchronization between a transmitter and a receiver, comprising: sampling a first receiver timestamp and a second receiver timestamp of the receiver at a first time and a second time respectively; sampling a first transmitter timestamp and a second transmitter timestamp of the transmitter at a third time and a fourth time respectively; sampling a first timing synchronization function (TSF) receiver timestamp and a second TSF receiver timestamp by a Wi-Fi TSF at the first time and the second time respectively; sampling a first TSF transmitter timestamp and a second TSF transmitter timestamp by the Wi-Fi TSF at the third time and the fourth time respectively; generating an initial timestamp according to the first receiver timestamp and the first transmitter timestamp; generating an initial TSF timestamp according to the first TSF receiver timestamp and the first TSF transmitter timestamp; generating a target phase difference according to the initial timestamp, the initial TSF timestamp, the first receiver timestamp, the second receiver timestamp, the first TSF receiver timestamp, the second TSF receiver timestamp, the second TSF transmitter timestamp, and the second transmitter timestamp; and performing a coarse tune at a receiver system clock periodically to compensate the target phase difference.

2. The method of claim 1, wherein generating the initial timestamp according to the first receiver timestamp and the first transmitter timestamp is subtracting the first transmitter timestamp from the first receiver timestamp to generate the initial timestamp.

3. The method of claim 1, wherein generating the initial TSF timestamp according to the first TSF receiver timestamp and the first TSF transmitter timestamp is subtracting the first TSF transmitter timestamp from the first TSF receiver timestamp to generate the initial timestamp.

4. The method of claim 1, wherein generating the target phase difference according to the initial timestamp, the initial TSF timestamp, the first receiver timestamp, the second receiver timestamp, the first TSF receiver timestamp, the second TSF receiver timestamp, the second TSF transmitter timestamp, and the second transmitter timestamp is: $\mathrm{Target}\mathrm{Phase}\mathrm{Difference}=\left(R_1-T_{\mathrm{INI}}\right)+\left(R_2-R_1\right)*\frac{TS{F}_{T2}-\left(TS{F}_{R1}-TS{F}_{\mathrm{INI}}\right)}{TS{F}_{R2}-TS{F}_{R1}}-T_2$ wherein: R.sub.1 is the first receiver timestamp; R.sub.2 is the second receiver timestamp; T.sub.INI is the initial timestamp; TSF.sub.T2 is the second TSF transmitter timestamp; TSF.sub.R1 is the first TSF receiver timestamp; TSF.sub.INI is the initial TSF timestamp; TSF.sub.R2 is the second TSF receiver timestamp; and T.sub.2 is the second transmitter timestamp.

5. The method of claim 4 wherein the coarse tune is performed according to a following equation: $\mathrm{Coarse}\mathrm{tune}=\frac{\mathrm{Target}\mathrm{Phase}\mathrm{Difference}}{\left(\mathrm{TS}{F}_{T2}-{\mathrm{TSF}}_{T1}\right)*\mathrm{Tf}}\mathrm{TSFf}$ wherein: TSF.sub.T1 is the first TSF transmitter timestamp; Tf is a frequency of a system clock; and TSFf is a frequency of a TSF clock.

6. The method of claim 5, wherein the frequency of the system clock is about 10 MHz, and the frequency of the TSF clock is about 1 MHZ.

7. The method of claim 4, further comprising: sampling an ith receiver timestamp and an (i1)th receiver timestamp by a receiver system clock at an ith time and an (i1)th time respectively; sampling an ith transmitter timestamp and an (i1)th transmitter timestamp by a transmitter system clock at a jth time and a (j1)th time respectively; sampling an ith TSF receiver timestamp and an (i1)th TSF receiver timestamp by the Wi-Fi TSF at the ith time and the (i1)th time respectively; sampling an ith TSF transmitter timestamp and an (i1)th TSF transmitter timestamp by the Wi-Fi TSF at the jth time and the (j1)th time respectively; generating a phase difference according to the initial timestamp, the initial TSF timestamp, the ith receiver timestamp, the (i1)th receiver timestamp, the ith TSF transmitter timestamp, the ith TSF receiver timestamp, the (i1)th TSF receiver timestamp and the ith transmitter timestamp; generating first differences between the target phase difference and phase differences; applying a loop filter to filter the first differences to an average difference; and performing a fine tune at receiver system clock periodically to compensate the average difference; wherein i and j are integers larger than 2.

8. The method of claim 7, wherein generating the phase difference according to the initial timestamp, the initial TSF timestamp, the ith receiver timestamp, the (i1)th receiver timestamp, the ith TSF transmitter timestamp, the ith TSF receiver timestamp, the (i1)th TSF receiver timestamp and the ith transmitter timestamp is: $\mathrm{Phase}\mathrm{Diff}=\left(R_{i-1}-T_{\mathrm{INI}}\right)+\left(R_i-R_{i-1}\right)*\frac{TS{F}_{T_i}-\left(TS{F}_{R_{i-1}}-TS{F}_{\mathrm{INI}}\right)}{TS{F}_{R_i}-TS{F}_{R_{i-1}}}-T_i$ wherein: R.sub.i-1 is the (i1)th receiver timestamp; R.sub.i is the ith receiver timestamp; TSF.sub.T.sub.i is the ith TSF transmitter timestamp; TSF.sub.R.sub.i-1 is the (i1)th TSF receiver timestamp; TSF.sub.R.sub.i is the ith TSF receiver timestamp; and T.sub.i is the ith transmitter timestamp.

9. The method of claim 8, wherein generating the first differences between the target phase difference and the phase differences comprises subtracting the target phase difference from the phase difference to generate a first difference.

10. The method of claim 9, wherein the fine tune is performed according to a following equation: $\mathrm{fine}\mathrm{tune}={.Math.}_{i=j}^{j+n-1}\frac{f{d}_i}{\left(TS{F}_{T_i}-TS{F}_{T_{i-1}}\right)\mathrm{Tf}n}\mathrm{TSFf}$ wherein: fd.sub.i is an ith first difference; TSF.sub.T.sub.i-1 is an (i1)th TSF transmitter timestamp; Tf is a frequency of a system clock; TSFf is a frequency of a TSF clock; and n is an integer greater than 0.

11. The method of claim 10, wherein the frequency of the system clock is about 10 MHz, and the frequency of the TSF clock is about 1 MHz.

12. The method of claim 7, further comprising discarding the ith transmitter timestamp and the ith TSF transmitter timestamp when a following condition is satisfied: $\left|TS{F}_{T_i}-TS{F}_{T_{i-1}}-T_{ob}\right|>\mathrm{threshold}$ wherein: TSF.sub.T.sub.i is the ith TSF transmitter timestamp; TSF.sub.T.sub.i-1 is an (i1)th TSF transmitter timestamp; and T.sub.ob is a time duration for observing transmitter timestamps.

13. The method of claim 1, wherein receiver timestamps and transmitter timestamps are sampled at a frequency of 5 Hz.

14. A method of clock synchronization between a transmitter and a receiver via a wireless communication protocol, comprising: sampling at least two transmitting timestamps at the transmitter periodically in a reference time domain of the wireless communication protocol, the at least two transmitting timestamps being sampled at different time points and separated by a predetermined interval one after another; sampling at least two receiving timestamps at the receiver in the reference time domain of the wireless communication protocol; and adjusting a system clock frequency at the receiver according to an offset derived from the at least two transmitting timestamps, at least timestamps and the predetermined interval.

15. The method of claim 14 further comprising performing a coarse tune at the receiver system clock periodically to compensate the offset.

16. The method of claim 14 further comprising performing a fine tune at the receiver system clock periodically to compensate the offset.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. 1 is a block diagram of a wireless one connected line system according to an embodiment of the present invention.

[0010] FIG. 2 is a method for system clock synchronization using Wi-Fi timing synchronization function according to an embodiment of the present invention.

[0011] FIG. 3 is a flow chart of a method for system clock synchronization according to an embodiment of the present invention.

DETAILED DESCRIPTION

[0012] FIG. 1 is a block diagram of a wireless one connected line (WOCL) system 100 according to an embodiment of the present invention. The WOCL system 100 comprises a box 102, a dongle transmitter 104 coupled to the box through High Definition Multimedia Interface (HDMI), a dongle receiver 108 linked to the dongle transmitter 104 through Wi-Fi, and a television 112 coupled to the dongle receiver 108 through HDMI. The dongle transmitter 104 comprises a video encoder 106, and the dongle receiver 108 comprises a line to evolution (L2E) decoder 110.

[0013] Wireless one connected line (WOCL) enables wireless transmission between the box 102 and television 112 via Wi-Fi. The box side is equipped with the dongle transmitter 104, while the television side features the dongle receiver 108. The box 102 converts all signals into a High Definition Multimedia Interface (HDMI) output and sends the HDMI output to the dongle transmitter 104. The dongle transmitter 104 compresses the HDMI output with the L2E encoder 106 to generate Wi-Fi packets. The Wi-Fi packets are transmitted to the dongle receiver 108 wirelessly from the dongle transmitter 104. The dongle receiver 108 receives the Wi-Fi packets and decodes the Wi-Fi packets with the L2E decoder 110 into an HDMI input, and the HDMI input is outputted to the television 112. This entire process can be regarded as transmitting signals from the box 102 to the television 112 through an HDMI transmission line. In a wired environment, the system clock remains synchronous, but in a wireless environment, the transmitter system clock and the receiver system clock in the dongle transmitter 104 and the dongle receiver 108 respectively may experience clock drift, thus additional synchronization has to be performed to prevent video frames from being dropped or being repeatedly transmitted.

[0014] FIG. 2 is a method 200 for clock synchronization using Wi-Fi timing synchronization function according to an embodiment of the present invention. In this embodiment, the transmitter and the receiver is communicated via Wi-Fi communication protocol. According to FIG. 2, a first receiver timestamp R.sub.1 and a second receiver timestamp R.sub.2 are sampled by the receiver system clock at a first time and a second time respectively. Moreover, a first transmitter timestamp T.sub.1 and a second transmitter timestamp T.sub.2 are sampled by the transmitter system clock at a third time and a fourth time respectively. In addition, the Wi-Fi communication protocol provides timing synchronization function (TSF) to act as a reference clock. A first timing synchronization function (TSF) receiver timestamp TSF.sub.R1, a second TSF receiver timestamp TSF.sub.R2, a first TSF transmitter timestamp TSF.sub.T1 and a second TSF transmitter timestamp TSF.sub.T2 are sampled by a Wi-Fi TSF at the first time, the second time, the third time and the fourth time respectively.

[0015] In an embodiment, the time period between the first time and the second time is about 200 milliseconds, and the time period between the third time and the fourth time is also about 200 milliseconds.

[0016] At first, an initial timestamp T.sub.INI is generated according to the first receiver timestamp R.sub.1 and the first transmitter timestamp T.sub.1 by using a following equation:

[00001]$T_{\mathrm{INI}}=R_1-T_1$

[0017] Secondly, an initial TSF timestamp TSF.sub.INI is generated according to the first TSF receiver timestamp TSF.sub.R1 and the first TSF transmitter timestamp TSF.sub.T1 by using a following equation:

[00002]$TS{F}_{\mathrm{INI}}=TS{F}_{R1}-TS{F}_{T1}$

[0018] As illustrated in FIG. 2, R.sub.2 is denoted as a synchronized second receiver timestamp R.sub.2. The ideal situation is to adjust the second receiver timestamp from R.sub.2 to R.sub.2 so that the system clocks of the transmitter and receiver may be synchronized. Third, the synchronized second receiver timestamp R.sub.2 is generated according to the following equation:

[00003]$R_2^{}=\left(R_1-T_{\mathrm{INI}}\right)+\left(R_2-R_1\right)*\frac{TS{F}_{T2}-\left(TS{F}_{R1}-TS{F}_{\mathrm{INI}}\right)}{TS{F}_{R2}-TS{F}_{R1}}$

[0019] In this equation, the timeline of the receiver system clock is aligned with the timeline of the transmitter system clock. The difference between the second receiver timestamp R.sub.2 and the first receiver timestamp R.sub.1 is transferred to be on the timeline of the transmitter system clock. Therefore, the synchronized second receiver timestamp R.sub.2 is transferred from the second receiver timestamp R.sub.2 at the timeline of the transmitter system clock.

[0020] The target phase difference between the second transmitter timestamp T.sub.2 and the synchronized second receiver timestamp R.sub.2 can be thus calculated by the following equation:

[00004]$\mathrm{Target}\mathrm{Phase}\mathrm{Difference}=\left(R_1-T_{\mathrm{INI}}\right)+\left(R_2-R_1\right)*\frac{TS{F}_{T2}-\left(TS{F}_{R1}-TS{F}_{\mathrm{INI}}\right)}{TS{F}_{R2}-TS{F}_{R1}}-T_2$

[0021] By subtracting T.sub.2 from R.sub.2, the target phase difference can be calculated, thus an offset is derived according to the following equation, and a coarse tune is performed accordingly to the receiver system clock.

[00005]$\mathrm{Coarse}\mathrm{tune}=\frac{\mathrm{Target}\mathrm{Phase}\mathrm{Difference}}{\left(\mathrm{TS}{F}_{T2}-{\mathrm{TSF}}_{T1}\right)*\mathrm{Tf}}\mathrm{TSFf}$

[0022] Tf is a frequency of a system clock, and TSFf is a frequency of a TSF clock. In an embodiment, Tf can be about 10 MHz, and TSFf can be about 1 MHz. At last, a coarse tune is performed at the receiver system clock periodically to compensate the target phase difference.

[0023] In another embodiment, a fine tune is performed in addition to the coarse tune. At the fine tune stage, an ith receiver timestamp R.sub.i and an (i1)th receiver timestamp R.sub.i-1 are sampled by a receiver system clock at an ith time and an (i1)th time respectively. An ith transmitter timestamp T.sub.i and an (i1)th transmitter timestamp T.sub.i-1 are sampled by a transmitter system clock at a jth time and a (j1)th time respectively. An ith TSF receiver timestamp TSF.sub.R.sub.i and an (i1)th TSF receiver timestamp TSF.sub.R.sub.i-1 are sampled by the Wi-Fi TSF at the ith time and the (i1)th time respectively. An ith TSF transmitter timestamp TSF.sub.T.sub.i and an (i1)th TSF transmitter timestamp TSF.sub.T.sub.i-1 are sampled by the Wi-Fi TSF at the jth time and the (j1)th time respectively, where i and j are integers larger than 2.

[0024] Then, the phase difference can be calculated as the following equation:

[00006]$\mathrm{Phase}\mathrm{Diff}=\left(R_{i-1}-T_{\mathrm{INI}}\right)+\left(R_i-R_{i-1}\right)*\frac{TS{F}_{T_i}-\left(TS{F}_{R_{i-1}}-TS{F}_{\mathrm{INI}}\right)}{TS{F}_{R_i}-TS{F}_{R_{i-1}}}-T_i$

[0025] An ith first difference fd.sub.i is generated according to the target phase difference and the phase difference by using the following equation:

[00007]${\mathrm{fd}}_i=\mathrm{target}\mathrm{phase}\mathrm{difference}-\mathrm{phase}\mathrm{difference}$

[0026] Therefore, the ith first difference fd.sub.i is inputted into a loop filter for generating a fine tune. In an embodiment, the fine tune can be performed according to the following equation by using an average loop filter:

[00008]$\mathrm{fine}\mathrm{tune}=\underset{i=j}{\overset{j+n-1}{.Math.}}\frac{f{d}_i}{\left(TS{F}_{T_i}-TS{F}_{T_{i-1}}\right)\mathrm{Tf}n}\mathrm{TSFf}$

where n is an integer greater than 0. The loop filter can be but not limited to the average of n.

[0027] In another embodiment, the ith transmitter timestamp T.sub.i and the ith TSF transmitter timestamp TSF.sub.T.sub.i are discarded when the following condition is satisfied:

[00009]$\left|TS{F}_{T_i}-TS{F}_{T_{i-1}}-T_{ob}\right|>\mathrm{threshold}$

where T.sub.ob is a time duration for observing transmitter timestamps such as 200 milliseconds.

[0028] FIG. 3 is a flow chart of a method 300 for system clock synchronization according to an embodiment of the present invention. The method 300 includes the following steps: [0029] Step S302: Sample a first receiver timestamp R.sub.1, a second receiver timestamp R.sub.2, a first transmitter timestamp T.sub.1, a second transmitter timestamp T.sub.2, a first TSF receiver timestamp TSF.sub.R1, a second TSF receiver timestamp TSF.sub.R2, a first TSF transmitter timestamp TSF.sub.T1, and a second TSF transmitter timestamp TSF.sub.T2; [0030] Step S304: Generate a target phase difference according to the first receiver timestamp R.sub.1, the second receiver timestamp R.sub.2, the first transmitter timestamp T.sub.1, the second transmitter timestamp T.sub.2, the first TSF receiver timestamp TSF.sub.R1, the second TSF receiver timestamp TSF.sub.R2, the first TSF transmitter timestamp TSF.sub.T1, and the second TSF transmitter timestamp TSF.sub.T2; [0031] Step S306: Sample an ith receiver timestamp R.sub.i, an (i1)th receiver timestamp R.sub.i-1, an ith transmitter timestamp T.sub.i, an (i1)th transmitter timestamp T.sub.i-1, an ith TSF receiver timestamp TSF.sub.R.sub.i, an (i1)th TSF receiver timestamp TSF.sub.R.sub.i-1, an ith TSF transmitter timestamp TSF.sub.T.sub.i, and an (i1)th TSF transmitter timestamp TSF.sub.T.sub.i-1; [0032] Step S308: Generate first differences according to the ith receiver timestamp R.sub.i, the (i1)th receiver timestamp R.sub.i-1, the ith transmitter timestamp T.sub.i, the (i1)th transmitter timestamp T.sub.i-1, the ith TSF receiver timestamp TSF.sub.R.sub.i, the (i1)th TSF receiver timestamp TSF.sub.R.sub.i-1, the ith TSF transmitter timestamp TSF.sub.T.sub.i, and the (i1)th TSF transmitter timestamp TSF.sub.T.sub.i-1; and [0033] Step S310: Perform a fine tune for synchronization between the transmitter system clock and the receiver system clock. [0034] Steps S302, S304 are utilized for coarse tune, and steps S306-S310 are utilized for fine tune. By performing the coarse tune and the fine tune, the frequency of the receiver system clock can match the frequency of the transmitter system clock. Therefore, no overflow or underflow would occur in the buffer. The method for system clock synchronization can thus be completed by using Wi-Fi timing synchronization function.

[0035] Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.