CALIBRATION METHOD AND CALIBRATION SYSTEM

20250244435 ยท 2025-07-31

    Inventors

    Cpc classification

    International classification

    Abstract

    A calibration method of calibrating a test instrument includes the following: consecutively connecting a set of calibration standards to at least one port and performing a calibration measurement for each calibration standard connected, thereby obtaining a first set of measurement data; determining, based on a multi-port error model and the first set of measurement data, a plurality of error terms of the multi-port error model, wherein at least one of the error terms includes a product of two error parameters; connecting an additional calibration standard to the at least one port; performing a calibration measurement with the additional calibration standard connected, thereby obtaining a second set of measurement data; and determining the two error parameters based on the second set of measurement data. Further, a calibration system is described.

    Claims

    1. A calibration method of calibrating a test instrument, the test instrument having at least one port, at least one signal analysis circuit, and at least one signal generator circuit, wherein the at least one signal analysis circuit and the at least one signal generator circuit are each connected to the at least one port, the calibration method comprising: consecutively connecting a set of calibration standards to the at least one port and performing a calibration measurement for each calibration standard connected, thereby obtaining a first set of measurement data; determining, based on a multi-port error model and the first set of measurement data, a plurality of error terms of the multi-port error model, wherein the error terms describe transmissivity and reflectivity properties of at least the at least one port, and wherein at least one of the error terms comprises a product of two error parameters; connecting an additional calibration standard to the at least one port, wherein the additional calibration standard is a signal source with known properties or a signal sink with known properties; performing a calibration measurement with the additional calibration standard connected, thereby obtaining a second set of measurement data; and determining the two error parameters based on the second set of measurement data.

    2. The calibration method of claim 1, wherein the calibration standards are connected to the at least one port at a reference plane.

    3. The calibration method of claim 2, wherein a cable is connected to the at least one port, and wherein the reference plane is located at an end of the cable facing away from the at least one port.

    4. The calibration method according to claim 1, wherein the product of two error parameters comprises a first error parameter and a second error parameter, wherein the first error parameter is determined directly based on the second set of measurement data, and wherein the second error parameter is calculated based on the determined product of the two error parameters and based on the first error parameter.

    5. The calibration method according to claim 1, wherein a mismatch of the additional calibration standard is corrected based on the first set of measurement data.

    6. The calibration method according to claim 1, wherein the test instrument comprises at least one directional coupler, and wherein the at least one signal analysis circuit and the at least one signal generator circuit are connected to the at least one port by the at least one directional coupler.

    7. The calibration method according to claim 1, wherein the multi-port error model is an n-term error model.

    8. The calibration method of claim 7, wherein the multi-port error model is a four-term error model.

    9. The calibration method according to claim 1, wherein the multi-port error model is a two-port error model.

    10. The calibration method according to claim 1, wherein exactly one port of the test instrument is calibrated at a time.

    11. The calibration method according to claim 1, wherein the additional calibration standard is established as a signal generator, a comb generator, an oscilloscope, or an analog-to-digital converter.

    12. The calibration method according to claim 1, wherein the individual calibration standards of the set of calibration standards are provided in a calibration device having a housing, wherein the calibration device further comprises a switching circuit and a connecting port, and wherein the switching circuit is configured to selectively connect one of the calibration standards to the connecting port.

    13. The calibration method of claim 12, wherein the additional calibration standard is provided in the housing.

    14. The calibration method according to claim 12, wherein the additional calibration standard is provided separately from the calibration device, wherein the calibration device comprises a further connecting port, wherein the switching circuit is configured to selectively connect one of the calibration standards or the further connecting port to the connecting port.

    15. The calibration method according to claim 1, wherein the test instrument is a vector network analyzer, a signal generator, or a signal analyzer.

    16. The calibration method according to claim 1, wherein the test instrument is a vector signal generator or a vector signal analyzer.

    17. A calibration system, comprising a test instrument, a set of calibration standards, and an additional calibration standard, wherein the calibration system includes circuitry configured to perform the calibration method according to claim 1.

    Description

    DESCRIPTION OF THE DRAWINGS

    [0045] The foregoing aspects and many of the attendant advantages of the claimed subject matter will become more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:

    [0046] FIG. 1 schematically shows a calibration system according to an embodiment of the present disclosure;

    [0047] FIG. 2 schematically shows a calibration system according to another embodiment of the present disclosure;

    [0048] FIG. 3 shows a representative flow chart of a calibration method according to an embodiment of the present disclosure;

    [0049] FIG. 4 shows a multi-port error model according to an embodiment; and

    [0050] FIG. 5 shows a multi-port error model according to another embodiment.

    DETAILED DESCRIPTION

    [0051] The detailed description set forth below in connection with the appended drawings, where like numerals reference like elements, is intended as a description of various embodiments of the disclosed subject matter and is not intended to represent the only embodiments. Each embodiment described in this disclosure is provided merely as an example or illustration and should not be construed as preferred or advantageous over other embodiments. The illustrative examples provided herein are not intended to be exhaustive or to limit the claimed subject matter to the precise forms disclosed.

    [0052] FIG. 1 schematically shows an example embodiment of calibration system 10 for calibrating a test instrument 12. In the example embodiment shown in FIG. 1, the test instrument 12 may be established as a vector network analyzer comprising a first port 14 and a second port 16.

    [0053] For example, the test instrument 12 may be a modulated vector network analyzer. However, it is to be understood that the explanations given hereinafter likewise apply to other types of test instruments that may have the same or a different number of ports. For example, the test instrument 12 may be a signal analyzer, a vector signal analyzer, a signal generator, a vector signal generator, a spectrum analyzer, or an oscilloscope.

    [0054] Without restriction of generality, the example embodiment of the test instrument 12 shown in FIG. 1 is described hereinafter. The test instrument 12 comprises a signal generator circuit 18 and a signal analysis circuit 20. The signal generator circuit 18 is configured to generate a test signal that can be applied to a device under test via the first port 14. In an embodiment, the signal generator circuit 18 may be or comprise a vector signal generator.

    [0055] In an embodiment, the signal analysis circuit 20 is configured to receive a corresponding processed signal from the device under test via the second port 16, and to analyze the processed signal in order to assess a performance of the device under test. In an embodiment, the signal analysis circuit 20 may be or comprise a vector signal analyzer.

    [0056] In the example embodiment shown in FIG. 1, the signal generator circuit 18 and the signal analysis circuit 20 are each connected to the first port 14 via a first directional coupler 22. The first directional coupler 22 is configured to transmit a forward-travelling signal from the signal generator circuit 18 to the first port 14. The first directional coupler 22 is further configured to transmit a backward-travelling signal from the first port 14 to the signal analysis circuit 20.

    [0057] In the example embodiment shown in FIG. 1, the signal generator circuit 18 and the signal analysis circuit 20 are also each connected to the second port 16 via a second directional coupler 24. The second directional coupler 24 is configured to transmit a forward-travelling signal from the second port 16 to the signal analysis circuit 20. The second directional coupler 24 is further configured to transmit a backward-travelling signal from the signal generator circuit 18 to the second port 16.

    [0058] In the example embodiment shown in FIG. 1, the test instrument 12 further comprises a control circuit 26 that is configured to control the signal generator circuit 18 and/or the signal analysis circuit 20. For example, the control circuit 26 may be configured to set operational parameters of the signal generator circuit 18 and/or of the signal analysis circuit 20, for example frequency ranges, a bandwidth, a sampling rate, filter coefficients, etc.

    [0059] As shown in FIG. 1, the calibration system 10 further comprises a calibration device 28 that is provided separately from the test instrument 12. In an embodiment, the calibration device 28 comprises a housing 30 that is established separately from the test instrument 12, wherein the components described hereinafter are provided in the housing 30.

    [0060] In an embodiment, the calibration device 28 comprises a connecting port 32 that is connectable to the first port 14 and/or to the second port 16 of the test instrument 12. The calibration device 28 further comprises a set of calibration standards, wherein the set of calibration standards comprises a first calibration standard 34, a second calibration standard 36, and a third calibration standard 38.

    [0061] For example, the first calibration standard 34, the second calibration standard 36, and the third calibration standard 38 may correspond to open (O), short (S), and matched (M) calibration standards, respectively. However, it is to be understood that the set of calibration standards may comprise other suitable types of calibration standards.

    [0062] Moreover, an additional calibration standard 40 (A) is provided within the housing 30 in the example embodiment shown in FIG. 1. In general, the additional calibration standard 40 is a signal source with known properties or a signal sink with known properties. For example, the additional calibration standard 40 may be established as a signal generator, a comb generator, or an analog-to-digital converter.

    [0063] In the example embodiment shown in FIG. 1, the calibration device 28 further comprises a switching circuit 42 that is connected to the connecting port 32 as well as to the calibration standards 34, 36, 38, 40. The switching circuit 42 is configured to selectively connect one of the calibration standards 34, 36, 38 or the additional calibration standard 40 to the connecting port 32.

    [0064] FIG. 2 shows another embodiment of the calibration system 10, wherein only the differences to the system of FIG. 1 described above are explained hereinafter.

    [0065] As shown in FIG. 2, the additional calibration standard 40 is provided separately from the calibration device 28. For example, the additional calibration standard 40 may be established as a signal generator, a comb generator, an oscilloscope, or an analog-to-digital converter.

    [0066] In this embodiment, the calibration device 28 comprises another connecting port 44 that is connected to the switching circuit 42. The connecting port 44 is connectable to the additional calibration standard 40, such that the additional calibration standard can be connected to the connecting port 32 via the switching circuit 42 and the further connecting port 44. The switching circuit 42 is configured to selectively connect one of the calibration standards 34, 36, 38 or the further connecting port 44 to the connecting port 32.

    [0067] It is noted that the calibration device 28 according to any of the embodiments described above is optional. It is also possible to connect the individual calibration standards 34, 36, 38 and/or the additional calibration standard 40 to the test instrument 12 directly, i.e. directly via a cable.

    [0068] In an embodiment, the test instrument 12 may comprise more than one signal generator circuit, and/or more than one signal analysis circuit, and/or another number of ports.

    [0069] In any case, each port is connected to at least one signal generator circuit, for example to exactly one signal generator circuit, and to at least one signal analysis circuit, for example to exactly one signal analysis circuit.

    [0070] Hereinafter, a calibration method of calibrating the test instrument 12 is described with reference to FIG. 3.

    [0071] The test instrument 12 described above is provided (step S1). Optionally, the calibration device 28 described above is provided (step S2). Hereinafter, it is assumed without restriction of generality that the calibration device 28 is provided. However, it is to be understood that the steps described hereinafter can also be performed without the calibration device 28 with appropriate adjustments.

    [0072] The calibration standards 34, 36, 38 of the set of calibration standards are consecutively connected to the first port 14 of the test instrument, and a respective calibration measurement is performed by the signal generator circuit 18 and the signal analysis circuit 20 for each of the calibration standards 34, 36, 38 (step S3).

    [0073] In an embodiment, a first calibration measurement is conducted with the first calibration standard 34 being connected to the first port 14. Afterwards, a second calibration measurement is conducted with the second calibration standard 36 being connected to the first port 14. Finally, a third calibration measurement is conducted with the third calibration standard 38 being connected to the first port 14.

    [0074] In an embodiment, the calibration measurements conducted may be reflection measurements, i.e. a test signal is generated by the signal generator circuit 18 and forwarded to the respective calibration standard 34, 36, 38 via the first port 14, the connecting port 32, and the switching circuit 42. A signal reflected by the respective calibration standard 34, 36, 38 is forwarded to the signal analysis circuit 20 via the switching circuit 42, the connecting port 32, the first port 14, and the first directional coupler 22.

    [0075] The signal analysis circuit 20 analyzes the respective reflected signals, thereby obtaining a first set of measurement data. In an embodiment, the first set of measurement data comprises measurement data on each of the calibration standards 34, 36, 38.

    [0076] It is noted that starting the calibration of the test instrument 12 with the first port 14 is not necessary. Likewise, the calibration could first be performed on the second port 16 or on other ports of the test instrument 12.

    [0077] A plurality of error terms of a multi-port error model are determined based on the multi-port error model and based on the first set of measurement data by the signal analysis circuit 20 (step S4).

    [0078] In general, the error terms of the multi-port error model describe transmissivity and reflectivity properties of at least the respective port, i.e. of the first port 14 in the case described above. For example, the multi-port error model comprises error terms describing the transmissivity and reflectivity properties, wherein the error terms comprise one or more error parameters each.

    [0079] FIG. 4 shows an example embodiment of a multi-port error model. In the embodiment of FIG. 4, the multi-port error model is a 2-port error model with four error parameters e.sub.00, e.sub.10, e.sub.01, and e.sub.11. However, it is to be understood that any other suitable multi-port error model may be used. In an embodiment, the multi-port error model may be any suitable n-term error model comprising n error parameters.

    [0080] The error model of FIG. 4 describes a portion of the calibration system 10 between the signal generator circuit 18 and a reference plane 46. As is illustrated in FIG. 4, the reference plane 46 is located at the point where a device under test (DUT) 48 is to be connected to the first port 14.

    [0081] During the calibration, the calibration device 28 is connected to the first port 14 at the reference plane 46. Thus, the reference plane 46 may be at an end of a cable connecting the first port 14 and the calibration device 28, namely at the end of the cable facing away from the first port 14.

    [0082] The four error parameters e.sub.00, e.sub.10, e.sub.01, and e.sub.11 describe a transmission between the signal generator circuit 18 and the signal analysis circuit 20, a transmission between the signal generator circuit 18 and the reference plane 46, a transmission between the reference plane 46 and the signal analysis circuit 20, and a reflection at the reference plane 46, respectively.

    [0083] The multi-port error model can be expressed as a matrix

    [00001] E 1 = ( e 00 e 01 e 10 e 11 ) .

    [0084] In this example, the error terms e.sub.00, e.sub.11, and e.sub.01.Math.e.sub.10 can be determined based on the first set of measurement data, i.e. one of the determined error terms comprises a product of two error parameters that cannot be determined individually based on the first set of measurement data.

    [0085] In an embodiment, the additional calibration standard 40 is connected to the first port 14, and an additional calibration measurement is performed with the additional calibration standard 40 connected to the first port 14 by the signal generator circuit 18 and the signal analysis circuit 20, thereby obtaining a second set of measurement data (step S5).

    [0086] In an embodiment, a mismatch of the additional calibration standard 40 may be corrected based on the first set of measurement data for determining the second set of measurement data. For example, an impedance mismatch between the additional calibration standard 40 and the reference plane 46 may be corrected based on the first set of measurement data for determining the second set of measurement data.

    [0087] The error parameters comprised in the product of error parameters are determined based on the second set of measurement data by the signal analysis circuit 20 (step S6). For example, one of the two error parameters comprised in the product of error parameters is determined directly based on the second set of measurement data, i.e. one of the two error parameters is measured directly.

    [0088] The other one of the two error parameters can then be calculated based on the determined product and based on the measured error parameter of the product.

    [0089] In the example multi-port error model described above, if the additional calibration standard is a signal source, the error parameter e.sub.01 can be measured directly, and the error parameter e.sub.10 can then be calculated.

    [0090] If the additional calibration standard is a signal sink, the error parameter e.sub.10 can be measured directly, and the error parameter e.sub.01 can then be calculated.

    [0091] Thus, all error parameters of the multi-port error model are determined based on measurements performed with respect to the first port 14 only.

    [0092] Operational parameters of the test instrument 12, for example of the signal generator circuit 18 and/or of the signal analysis circuit 20, are adapted based on the determined error parameters by the control circuit 26 (step S7).

    [0093] Accordingly, the test instrument 12 is calibrated with respect to the first port 14 based on the determined error parameters.

    [0094] In an embodiment, the calibration may be performed in time domain or in frequency domain.

    [0095] Steps S3 to S7 described above are then repeated for the second port 16 (step S8).

    [0096] The multi-port error model for calibrating the second port 16 is shown in FIG. 5, and is established similarly to the multi-port error model for calibrating the first port 14 described above.

    [0097] The four error parameters e.sub.00, e.sub.10, e.sub.01, and e.sub.11 describe a transmission between the signal generator circuit 18 and the signal analysis circuit 20, a transmission between the reference plane 46 and the signal analysis circuit 20, a transmission between the signal generator circuit 18 and the reference plane 46, and a reflection at the reference plane 46, respectively.

    [0098] The multi-port error model can be expressed as a matrix

    [00002] E 2 = ( e 00 e 01 e 10 e 11 ) .

    [0099] If the test instrument 12 comprises further ports, the further ports can be calibrated consecutively, i.e. one port may be fully calibrated at a time.

    [0100] Thus, the calibration method described above enables a full calibration of all ports of the test instrument 12, wherein each port can be calibrated independent of any other ports.

    [0101] Certain embodiments disclosed herein include systems, apparatus, modules, units, devices, components, etc., that utilize circuitry (e.g., one or more circuits) in order to implement standards, protocols, methodologies or technologies disclosed herein, operably couple two or more components, generate information, process information, analyze information, generate signals, encode/decode signals, convert signals, transmit and/or receive signals, control other devices, etc. Circuitry of any type can be used. It will be appreciated that the term information can be use synonymously with the term signals in this paragraph. It will be further appreciated that the terms circuitry, circuit, one or more circuits, etc., can be used synonymously herein.

    [0102] In an embodiment, circuitry includes, among other things, one or more computing devices such as a processor (e.g., a microprocessor), a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a system on a chip (SoC), or the like, or any combinations thereof, and can include discrete digital or analog circuit elements or electronics, or combinations thereof. In an embodiment, circuitry includes hardware circuit implementations (e.g., implementations in analog circuitry, implementations in digital circuitry, and the like, and combinations thereof).

    [0103] In an embodiment, circuitry includes combinations of circuits and computer program products having software or firmware instructions stored on one or more computer readable memories that work together to cause a device to perform one or more protocols, methodologies or technologies described herein. In an embodiment, circuitry includes circuits, such as, for example, microprocessors or portions of microprocessor, that require software, firmware, and the like for operation. In an embodiment, circuitry includes an implementation comprising one or more processors or portions thereof and accompanying software, firmware, hardware, and the like.

    [0104] For example, the functionality described herein can be implemented by special purpose hardware-based computer systems or circuits, etc., or combinations of special purpose hardware and computer instructions. Each of these special purpose hardware-based computer systems or circuits, etc., or combinations of special purpose hardware circuits and computer instructions form specifically configured circuits, machines, apparatus, devices, etc., capable of implementing the functionality described herein.

    [0105] Of course, in an embodiment, two or more of these components, or parts thereof, can be integrated or share hardware and/or software, circuitry, etc. In an embodiment, these components, or parts thereof, may be grouped in a single location or distributed over a wide area. In circumstances where the components are distributed, the components are accessible to each other via communication links.

    [0106] In some embodiments, one or more of the components of the test instrument 12, the calibration device 28, the addition calibration standard 40 of FIG. 2, etc., referenced above include circuitry programmed to carry out one or more steps of any of the methods disclosed herein. In an embodiment, one or more computer-readable media associated with or accessible by such circuitry contains computer readable instructions embodied thereon that, when executed by such circuitry, cause the component or circuity to perform one or more steps of any of the methods disclosed herein.

    [0107] In an embodiment, the computer readable instructions includes applications, programs, program modules, scripts, source code, program code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, and/or the like (also referred to herein as executable instructions, instructions for execution, program code, computer program instructions, and/or similar terms used herein interchangeably).

    [0108] In an embodiment, computer-readable media is any medium that stores computer readable instructions, or other information non-transitorily and is directly or indirectly accessible by a computing device, such as processor circuitry, etc., or other circuity disclosed herein etc. In other words, a computer-readable medium is a non-transitory memory at which one or more computing devices can access instructions, codes, data, or other information. As a non-limiting example, a computer-readable medium may include a volatile random access memory (RAM), a persistent data store such as a hard disk drive or a solid-state drive, or a combination thereof. In an embodiment, memory can be integrated with a processor, separate from a processor, or external to a computing system.

    [0109] Accordingly, blocks of the block diagrams and/or flowchart illustrations support various combinations for performing the specified functions, combinations of operations for performing the specified functions and program instructions for performing the specified functions. These computer program instructions may be loaded onto one or more computer or computing devices, such as special purpose computer(s) or computing device(s) or other programmable data processing apparatus(es) to produce a specifically-configured machine, such that the instructions which execute on one or more computer or computing devices or other programmable data processing apparatus implement the functions specified in the flowchart block or blocks and/or carry out the methods described herein. Again, it should also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, or portions thereof, could be implemented by special purpose hardware-based computer systems or circuits, etc., that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

    [0110] It will be appreciated that in one or more embodiments, the term computer or computing device can include, for example, any computing device or processing structure, including but not limited to a processor (e.g., a microprocessor), a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a system on a chip (SoC), a graphics processing unit (GPU) or the like, or any combinations thereof.

    [0111] In the foregoing description, specific details are set forth to provide a thorough understanding of representative embodiments of the present disclosure. It will be apparent to one skilled in the art, however, that the embodiments disclosed herein may be practiced without embodying all of the specific details. In some instances, well-known process steps have not been described in detail in order not to unnecessarily obscure various aspects of the present disclosure.

    [0112] Although the method and various embodiments thereof have been described as performing sequential steps, the claimed subject matter is not intended to be so limited. As nonlimiting examples, the described steps need not be performed in the described sequence and/or not all steps are required to perform the method. Moreover, embodiments are contemplated in which various steps are performed in parallel, in series, and/or a combination thereof. As such, one of ordinary skill will appreciate that such examples are within the scope of the claimed embodiments.

    [0113] In the detailed description herein, references to one embodiment, an embodiment, an example embodiment, one or more embodiments, some embodiments, etc., indicate that the embodiment or embodiments described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment or embodiments. In addition, when a particular feature, structure, or characteristic is described in connection with an embodiment or embodiments, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. After reading the description, it will be apparent to one skilled in the relevant art(s) how to implement the disclosure in alternative embodiments. Thus, it will be appreciated that embodiments of the present disclosure may employ any combination of features described herein. All such combinations or sub-combinations of features are within the scope of the present disclosure.

    [0114] Throughout this specification, terms of art may be used. These terms are to take on their ordinary meaning in the art from which they come, unless specifically defined herein or the context of their use would clearly suggest otherwise.

    [0115] The drawings in the FIGURES are not to scale. Similar elements are generally denoted by similar references in the FIGURES. For the purposes of this disclosure, the same or similar elements may bear the same references. Furthermore, the presence of reference numbers or letters in the drawings cannot be considered limiting, even when such numbers or letters are indicated in the claims.

    [0116] The present application may reference quantities and numbers. Unless specifically stated, such quantities and numbers are not to be considered restrictive, but exemplary of the possible quantities or numbers associated with the present application. Also in this regard, the present application may use the term plurality to reference a quantity or number. In this regard, the term plurality is meant to be any number that is more than one, for example, two, three, four, five, etc. The terms about, approximately, near, etc., mean plus or minus 5% of the stated value. For the purposes of the present disclosure, the phrase at least one of A and B is equivalent to A and/or B or vice versa, namely A alone, B alone or A and B.. Similarly, the phrase at least one of A, B, and C, for example, means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C), including all further possible permutations when greater than three elements are listed.

    [0117] Where a range of values is provided, it is understood that each intervening value, to the tenth of the unit of the lower limit (unless the context clearly dictates otherwise), between the upper and lower limit of that range, and any other stated or intervening value in that stated range, is encompassed within the disclosure. The upper and lower limits of these smaller ranges may independently be included in the smaller ranges and are also encompassed within the disclosure, subject to any specifically excluded limit in the stated range. While the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included in the disclosure.

    [0118] The principles, representative embodiments, and modes of operation of the present disclosure have been described in the foregoing description. However, aspects of the present disclosure which are intended to be protected are not to be construed as limited to the particular embodiments disclosed. Further, the embodiments described herein are to be regarded as illustrative rather than restrictive. It will be appreciated that variations and changes may be made by others, and equivalents employed, without departing from the spirit of the present disclosure. Accordingly, it is expressly intended that all such variations, changes, and equivalents fall within the spirit and scope of the present disclosure, as claimed.