SURGE PROTECTION ELEMENT

Abstract

The present invention provides a surge protection element that can smoothly handle an unnecessary current produced by a harmful pulse. A surge protection element 10 is the surge protection element 10 including a first electrode 11, an n-type semiconductor layer 12, a second electrode 13 sequentially joined in a designated direction. A portion at least from any position in the n-type semiconductor layer 12 toward the second electrode 13 in the designated direction is composed of a graded composition layer 12B, whereby in a state in which a voltage is not applied, a bandgap Eg of the portion gradually increases in the designated direction, and part of a conduction level Ec exceeding a Fermi level Ef in the portion gradually increases in the designated direction.

Claims

1. A surge protection element comprising a first electrode, an n-type semiconductor layer, and a second electrode sequentially joined in a designated direction, wherein a portion at least from any position in the n-type semiconductor layer toward the second electrode in the designated direction is composed of a graded composition layer, whereby in a state in which a voltage is not applied, a bandgap of the portion gradually increases in the designated direction, and part of a conduction level exceeding a Fermi level in the portion gradually increases in the designated direction.

2. The surge protection element according to claim 1, wherein the graded composition layer of the n-type semiconductor layer is composed of a composite oxide or a composite nitride of at least two elements of an element A and an element B selected from the group consisting of Ga, In, Zn, Mg, Al, and Sn, or a combination thereof, and a content ratio of the element B to the element A gradually increases in the designated direction.

3. The surge protection element according to claim 1, wherein the n-type semiconductor layer has a thickness of 5 to 1000 nm in the designated direction.

4. The surge protection element according to claim 2, wherein the n-type semiconductor layer has a thickness of 5 to 1000 nm in the designated direction.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG. 1 is a configuration diagram of a surge protection element of the present invention;

[0013] FIG. 2A is an energy band diagram of the surge protection element of the present invention before a voltage is applied thereto;

[0014] FIG. 2B is an energy band diagram of the surge protection element of the present invention when a voltage is applied thereto;

[0015] FIG. 3A is an energy band diagram of a modification of the surge protection element of the present invention before a voltage is applied thereto;

[0016] FIG. 3B is an energy band diagram of the modification of the surge protection element of the present invention when a voltage is applied thereto;

[0017] FIG. 4A is an energy band diagram of a conventional surge protection element before a voltage is applied thereto; and

[0018] FIG. 4B is an energy band diagram of the conventional surge protection element when a voltage is applied thereto.

DETAILED DESCRIPTION OF THE INVENTION

[0019] A surge protection element 10 will be described in detail with reference to the drawings. The same or corresponding components have the same reference characters allotted, and description thereof will be omitted as appropriate in some cases.

[0020] FIG. 1 shows the surge protection element 10 of the present invention. The surge protection element 10 includes a first electrode 11, an n-type semiconductor layer 12, and a second electrode 13. The first electrode 11, the n-type semiconductor layer 12, and the second electrode 13 are joined in this order in a designated direction (the direction of an upward arrow shown in FIG. 1).

[0021] A Schottky barrier SB is formed between the n-type semiconductor layer 12 and the second electrode 13. That is, the surge protection element 10 is a Schottky barrier diode, and therefore has a response speed higher than that of a p-n junction diode which is an element in which both majority carriers and minority carriers are involved.

[0022] FIG. 2A is an energy band diagram in a state in which a voltage has not been applied to the surge protection element 10 of the present invention. In FIG. 2A, a dash-dotted line indicates a Fermi level Ef of the n-type semiconductor layer 12, and an upper solid line in the n-type semiconductor layer 12 indicates a conduction level Ec. In FIG. 2A, the Fermi levels Ef of the n-type semiconductor layer 12 and the second electrode 13 are shown in alignment. In the n-type semiconductor layer, a forbidden band which is an energy band in which there is no electron path exists at the center of a carrier distribution. Thus, free electrons at the conduction level of the n-type semiconductor layer 12 are located at an energy level higher than an energy level at which free electrons in metal are present, and a valence level Ev of the n-type semiconductor layer 12 is located at a low energy level. When the n-type semiconductor layer 12 and the second electrode 13 are joined, free electrons in the n-type semiconductor layer 12 move to the second electrode 13 side and decrease. The carrier distribution of the n-type semiconductor layer 12 at the junction is thereby changed, so that the Fermi level changes in position. However, the Fermi level itself does not move unless there is external application of a potential. Thus, energy levels of the conduction level and the valence level of the n-type semiconductor layer 12 at the junction change relatively with respect to the position of the Fermi level. The Schottky barrier SB is formed between the n-type semiconductor layer 12 and the second electrode 13 as described above. In the present embodiment, the bandgap Eg of the n-type semiconductor layer 12 is 3.4 eV, and the Schottky barrier SB between the n-type semiconductor layer 12 and the second electrode 13 is 2.8 eV.

[0023] The first electrode 11 is formed in a rectangular flat-plate shape having a pair of major surfaces opposite to each other as shown in FIG. 1. Ferrous metal is used as the material for the first electrode 11. Other than ferrous metal, aluminum-based metal, copper-based metal, or the like can also be used as the material for the first electrode 11. A metal substrate may be used as the first electrode 11. The use of the metal substrate as the first electrode 11 can further reduce the process (manufacturing) cost.

[0024] This point will be described in detail. In a case of forming a first electrode on one of upper and lower surfaces of the n-type semiconductor layer 12 and a second electrode on the other surface by vapor deposition or the like, the n-type semiconductor layer 12 is first deposited on a substrate (a substrate not limited to a metal substrate). Then, after forming either the first electrode or the second electrode, it is necessary to once separate the n-type semiconductor layer 12 from the substrate and form the other electrode on a separation surface of the n-type semiconductor layer 12. In contrast, in a case of using the metal substrate as the first electrode, it is only necessary to directly deposit the n-type semiconductor layer 12 immediately above the metal substrate and form the second electrode 13. Thus, the separation process can be omitted.

[0025] A substrate having a two-layered structure of an insulation layer (e.g., glass) and a metal layer may be used as the first electrode 11. With such a configuration, effects similar to the above-described effects can be obtained. When comparing the resistivity of a film with the resistivity of a bulk body, the resistivity of the film tends to be larger. Thus, the use of the metal substrate as the first electrode 11 enables an unnecessary current produced by a harmful pulse to be bypassed more promptly.

[0026] The n-type semiconductor layer 12 is joined to the first electrode 11 in the designated direction as shown in FIG. 1. Specifically, a compound film is caused to grow on the first electrode 11 by the mist chemical vapor deposition (CVD) method. Specifically, an organic metal (solid) containing a metal element that will form a desired film, for example, is dissolved by an organic solvent to obtain a raw material solution. Mist obtained by nebulizing the raw material solution by ultrasonic vibration is transferred to a high-temperature reaction container (at about 300 to 500 C.) while being diluted by nitrogen (N.sub.2) gas to cause the compound film to grow on the first electrode 11 placed in the high-temperature reaction container. A gas flow rate is set at 5.0 L/min both for mist transfer carrier gas and dilution gas.

[0027] As a method of causing growth of the compound film, the metal organic chemical vapor deposition (MOCVD) method, for example, can be employed as a method other than the mist CVD method. As raw material gas at this time, gas obtained by vaporizing organic metal which is a raw material by hydrogen (H.sub.2), nitrogen (N.sub.2), or the like can be used. Alternatively, the sputtering method, vapor phase epitaxy (VPE) method, molecular beam epitaxy (MBE) method, or the like may be employed. The first electrode 11 and the n-type semiconductor layer 12 form an ohmic contact.

[0028] The n-type semiconductor layer 12 has a thickness of 5 to 1000 nm in the designated direction. The n-type semiconductor layer 12 more preferably has a thickness of 5 to 500 nm. When the n-type semiconductor layer 12 has a thickness less than or equal to 500 nm, the series resistance can be reduced, and at the same time, Joule heat can be controlled.

[0029] The n-type semiconductor layer 12 is composed of three layers of an initial layer 12A (on the first electrode 11 side in the n-type semiconductor layer 12), a graded composition layer 12B, and a final layer 12C (on the second electrode 13 side in the n-type semiconductor layer 12). The initial layer 12A is a low-resistance layer, and the final layer 12C is a high-resistance layer. In the present embodiment, the initial layer 12A, the graded composition layer 12B, the final layer 12C have thicknesses of 100 nm, 200 nm, and 100 nm, respectively. The initial layer 12A can have a layer thickness ranging from 1 to 200 nm, the graded composition layer 12B can have a layer thickness ranging from 1 to 200 nm, and the final layer 12C can have a layer thickness ranging from 1 to 200 nm. The sum of the thicknesses of the initial layer 12A, the graded composition layer 12B, and the final layer 12C is preferably less than or equal to 500 nm.

[0030] In the present embodiment, the initial layer 12A of the n-type semiconductor layer 12 is composed of an oxide of an element A. A portion from any position in the n-type semiconductor layer 12 in the designated direction toward the second electrode 13 is composed of the graded composition layer 12B. The graded composition layer 12B is composed of a composite oxide of the element A and the element B. In the present embodiment, the final layer 12C is composed of a composite oxide in which the content ratio of the element B to the element A is 8:2.

[0031] For example, the element A is zinc (Zn), and the element B is magnesium (Mg). That is, the initial layer 12A of the n-type semiconductor layer 12 is composed of zinc oxide (ZnO), and the graded composition layer 12B and the final layer 12C are composed of zinc magnesium oxide (ZnMgO).

[0032] In the graded composition layer 12B, the content ratio of the element B to the element A gradually increases in the designated direction. That is, the graded composition layer 12B is composed of zinc magnesium oxide (ZnMgO) in which the content ratio of magnesium (Mg) to zinc (Zn) gradually increases in the designated direction.

[0033] A transition of the content ratio of magnesium (Mg) to zinc (Zn) in the present embodiment is changed by a certain increment in the designated direction. The transition of the content ratio of magnesium (Mg) to zinc (Zn) may be such that the content ratio of magnesium (Mg) to zinc (Zn) is raised rapidly on the first electrode 11 side and such that the content ratio of magnesium (Mg) to zinc (Zn) is raised gently on the second electrode 13 side. Alternatively, the transition of the content ratio of magnesium (Mg) to zinc (Zn) may be such that the content ratio of magnesium (Mg) to zinc (Zn) is raised gently on the first electrode 11 side and such that the content ratio of magnesium (Mg) to zinc (Zn) is raised rapidly on the second electrode 13 side.

[0034] In the present embodiment, the content ratio of magnesium (Mg) to zinc (Zn) in the graded composition layer 12B is raised ultimately up to 8:2.

[0035] The transition of the content ratio of magnesium (Mg) to zinc (Zn) in the present embodiment is changed gradually (intermittently) in the designated direction. That is, the graded composition layer 12B is formed of a laminated structure of a plurality of layers in which the content ratio of magnesium (Mg) to zinc (Zn) is changed in the designated direction. The transition of the content ratio of magnesium (Mg) to zinc (Zn) may be changed continuously in the designated direction.

[0036] The graded composition layer 12B is formed such that the content ratio of magnesium (Mg) to zinc (Zn) gradually increases by changing a composition in raw solution in the growth process. For example, the composition, which is of Zn.sub.0.90Mg.sub.0.10O in the initial stage of growth, is then changed in concentration ratio to, in the order, Zn.sub.0.85Mg.sub.0.15O, Zn.sub.0.80Mg.sub.0.20O, Zn.sub.0.75Mg.sub.0.25O, . . . , and Zn.sub.0.20Mg.sub.0.80O, or changed by 0.05, thereby forming the graded composition layer 12B of a laminated structure of 16 layers.

[0037] In the case of the MOCVD method, the graded composition layer 12B formed such that the content ratio of magnesium (Mg) to zinc (Zn) gradually increases can be obtained by changing the concentration ratio of organic metal in carrier gas. In the case of the sputtering method, a plurality of sputtering targets different in composition are prepared, and a sputtering target is replaced with another sputtering target different in composition each time the single n-type semiconductor layer 12 is deposited. The graded composition layer 12B formed such that the content ratio of magnesium (Mg) to zinc (Zn) gradually increases can thereby be obtained.

[0038] Although the graded composition layer 12B of 16 layers is formed by changing the concentration ratio by 0.05 in the present embodiment, the concentration ratio may be changed by a value more than or equal to 0.05, such as by changing the concentration ratio by 0.10, for example, to form the graded composition layer 12B of eight layers, or the concentration ratio may be changed by a value less than or equal to 0.05, such as by changing the concentration ratio by 0.025 to form the graded composition layer 12B of 32 layers. The composition in raw solution in the growth process may be continuously changed in concentration ratio.

[0039] Although the composition in raw solution in the initial stage of growth of the graded composition layer 12B is Zn.sub.0.90Mg.sub.0.10O in the present embodiment, the composition in raw solution may be higher in Mg ratio, such as Zn.sub.0.80Mg.sub.0.20O, than Zn.sub.0.90Mg.sub.0.10O in the initial phase of growth, or the composition in raw solution may be lower in Mg ratio, such as Zn.sub.0.99Mg.sub.0.01O, than Zn.sub.0.90Mg.sub.0.10O in the initial phase of growth.

[0040] Although the composition in raw solution in the later stage of growth of the graded composition layer 12B is Zn.sub.0.20Mg.sub.0.80O in the present embodiment, the composition in raw solution may be lower in Mg ratio, such as Zn.sub.0.25Mg.sub.0.75, than Zn.sub.0.20Mg.sub.0.80 in the later phase of growth.

[0041] As shown in FIG. 2A, the bandgap Eg gradually increases in the designated direction (in the direction of a right arrow) as Eg1, Eg2, and Eg3 in a portion composed of the graded composition layer 12B in the n-type semiconductor layer 12.

[0042] Part of the conduction level Ec exceeding the Fermi level Ef in the portion of the n-type semiconductor layer 12 composed of the graded composition layer 12B is composed so as to gradually increase in the designated direction (in the direction of the right arrow) as Ec1, Ec2, and Ec3. That is, the conduction level Ec has no step difference and rises upward to the right relatively smoothly.

[0043] FIG. 2B is an energy band diagram of the surge protection element 10 of the present invention when a voltage is applied thereto. Similarly to FIG. 2A, a dash-dotted line indicates the Fermi level Ef of the n-type semiconductor layer 12, and an upper solid line in the n-type semiconductor layer 12 indicates the conduction level Ec also in FIG. 2B. A broken line indicates an energy band diagram of the surge protection element 10 of the present invention in a state in which a voltage is not applied thereto.

[0044] When a voltage is applied to the surge protection element 10 of the present invention as shown in FIG. 2B, the portion composed of the graded composition layer 12B in the n-type semiconductor layer 12 has no step difference as a result of the energy band diagram (see FIG. 2A) before a voltage is applied thereto and falls downward to the right relatively smoothly. That is, the energy barrier 33 produced when a voltage is applied to the conventional semiconductor element 30 as shown in FIG. 4B is not produced. Thus, electrons 20 flow smoothly from the n-type semiconductor layer 12 toward the second electrode 13. That is, an unnecessary current produced by a harmful pulse can be smoothly handled when the n-type semiconductor layer 12 is composed of the graded composition layer 12B.

[0045] Although the element A is zinc (Zn), and the element B is magnesium (Mg) in the present embodiment, the element A may be Ga, In, Zn, Mg, Al, Sn, or the like, or may be a combination thereof. The element B may be Mg, Al, Sn, Ga, Zn, or the like, or may be a combination thereof. In the present embodiment, the initial layer 12A is composed of an oxide, but may be composed of a nitride, a composite oxide, or a composite nitride, or may be composed of a combination thereof. In the present embodiment, the graded composition layer 12B and the final layer 12C are composed of a composite oxide, but may be composed of a composite nitride, or may be composed of a combination thereof.

[0046] In the present embodiment, the final layer 12C is composed of a composite oxide in which the content ratio of the element B to the element A is 8:2, which is identical to the composition in raw solution in the later stage of growth of the graded composition layer 12B. However, the final layer 12C can be composed of a composite oxide in which the content ratio of the element B to the element A has any value. Alternatively, the final layer 12C may be composed of an oxide of the element B. Still alternatively, the final layer 12C may be composed of a nitride of the element B or a composite nitride containing the element A and the element B, or may be composed of a combination thereof.

[0047] Table 1 below is a table collectively showing examples of an element (the element B), the content rate of which is adjusted to relatively increase, among constituting elements of the graded composition layer 12B, a constituent of the initial layer 12A, and a constituent of the final layer 12C.

TABLE-US-00001 TABLE 1 No Element B Initial layer Final layer 1 Mg ZnO ZnMgO 2 Al GaO GaAlO 3 Al GaN GaAlN 4 Mg ZnMgO ZnMgO 5 Al GaAlO GaAlO 6 Al GaAlN GaAlN 7 Sn InO SnO 8 Sn InSnO InSnO 9 Ga, Zn InGaZnO InGaZnO

[0048] Although the n-type semiconductor layer 12 is composed of three layers of the initial layer 12A, the graded composition layer 12B, and the final layer 12C in the present embodiment, the n-type semiconductor layer 12 may be composed of two layers of the initial layer 12A and the graded composition layer 12B as shown in FIG. 3A and FIG. 3B. In this case, the initial layer 12A is the low-resistance layer, and a terminal end of the graded composition layer 12B on the second electrode side is the high-resistance layer. Even in the case in which the n-type semiconductor layer 12 has such a two-layered structure, the effects obtained by the above-described graded composition layer 12B can be exercised. Alternatively, the n-type semiconductor layer 12 may be composed of two layers of the graded composition layer 12B and the final layer 12C. That is, the graded composition layer 12B may be formed from a terminal end of the n-type semiconductor layer 12 on the first electrode side.

[0049] The n-type semiconductor layer 12 may contain a doping material according to necessity. The n-type semiconductor layer 12 can contain at least one of Al, Si, In, Ga, Ge, and Sn as a doping material. When the n-type semiconductor layer 12 contains an appropriate doping element, the bandgap can be adjusted.

[0050] The second electrode 13 is joined from above to the n-type semiconductor layer 12 in the designated direction. The second electrode 13 is formed by a publicly-known technique, and a deposition technique such as the deposition method, sputtering method, or the like, for example, is used.

[0051] The second electrode 13 is a material that may form a Schottky contact with the n-type semiconductor layer 12, and the material thereof may be composed of an alloy of platinum (Pt) and gold (Au), or one or more elements selected from a metal element group consisting of platinum (Pt), gold (Au), titanium (Ti), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), copper (Cu), iron (Fe), silver (Ag), and chromium (Cr), or an alloy thereof. Alternatively, a compound having a metal element such as titanium nitride (TiN) or silver oxide (Ag.sub.2O) may be used for the second electrode 13.

[0052] A desired forward rising voltage Vf of the surge protection element 10 can be obtained from a combination of the element that composes the n-type semiconductor layer 12, the element that composes the second electrode 13, and the doping element contained in the n-type semiconductor layer 12.

[0053] Next, operation to be performed when a harmful pulse is applied to a semiconductor device including the surge protection element 10 will be described. The surge protection element 10 is connected to a semiconductor circuit connected in the forward direction between a signal line and a ground of the semiconductor device, for example. When a voltage exceeding the forward rising voltage Vf, such as a harmful pulse, is applied to the surge protection element 10, a forward bias current flows in the surge protection element 10 and is grounded (see FIG. 2B). Thus, the semiconductor device including the surge protection element 10 is protected from the harmful pulse.

[0054] The forward rising voltage Vf of the surge protection element 10 is set at a value larger than an operating voltage Va of the semiconductor device including the surge protection element 10. Consequently, the surge protection element 10 does not bypass a current when a signal indicating a voltage less than or equal to the forward rising voltage Vf is received. When a harmful pulse larger than the forward rising voltage Vf is applied, the forward bias current flows in the surge protection element 10, and an unnecessary current produced by the harmful pulse is grounded.

[0055] As described above in detail, the surge protection element 10 that can smoothly handle an unnecessary current produced by a harmful pulse can be provided.

REFERENCE SIGNS LIST

[0056] 10 surge protection element [0057] 11 first electrode [0058] 12 n-type semiconductor layer [0059] 12A initial layer [0060] 12B graded composition layer [0061] 12C final layer [0062] 13 second electrode [0063] 20 electron