TRANSCEIVER CIRCUIT OPERABLE IN A DYNAMIC POWER RANGE
20250253882 ยท 2025-08-07
Inventors
Cpc classification
H03F2200/102
ELECTRICITY
International classification
Abstract
A transceiver circuit operable in a dynamic power range is provided. In embodiments disclosed herein, the transceiver circuit is configured to generate a radio frequency (RF) signal and a target voltage that is adapted according to a power range of the RF signal. More specifically, the transceiver circuit is configured to generate the target voltage differently when the power range of the RF signal is higher (e.g., 18 dBm) or lower (e.g., <18 dBm). By adapting the target voltage based on the power range of the RF signal, it is possible to suppress a potential voltage ripple in a modulated voltage generated according to the target voltage to thereby achieve a desired adjacent channel leakage ratio (ACLR) when the RF signal is amplified at a power amplifier circuit based on the modulated voltage.
Claims
1. A transceiver circuit comprising: a signal processing circuit configured to generate a radio frequency (RF) signal having a time-variant input power; and a target voltage circuit configured to: determine a power range of the RF signal based on the time-variant input power; and generate a target voltage having a time-variant change across the determined power range.
2. The transceiver circuit of claim 1, further comprising a digital baseband circuit configured to generate an input vector having a time-variant amplitude, wherein the signal processing circuit is further configured to convert the input vector into the RF signal having the time-variant input power tracking the time-variant amplitude of the input vector.
3. The transceiver circuit of claim 1, wherein the target voltage circuit comprises: a high power-range (HPR) lookup table (LUT) configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is higher than a defined clipping threshold; and a low power-range (LPR) LUT configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is lower than or equal to the defined clipping threshold.
4. The transceiver circuit of claim 3, wherein: the HPR LUT is further configured to correlate the time-variant input power with a constant target voltage when the time-variant input power is lower than or equal to the defined clipping threshold; and the LPR LUT is further configured to correlate the time-variant input power with a non-constant target voltage when the time-variant input power is lower than or equal to the defined clipping threshold.
5. The transceiver circuit of claim 3, wherein the target voltage circuit is further configured to: generate the target voltage based on the HPR LUT when the determined power range is higher than the defined clipping threshold; and generate the target voltage based on the LPR LUT when the determined power range is lower than or equal to the defined clipping threshold.
6. A power management circuit comprising: a power amplifier circuit configured to amplify a radio frequency (RF) signal from a time-variant input power to a time-variant output power based on a modulated voltage; a power management integrated circuit (PMIC) configured to generate the modulated voltage based on a target voltage; and a transceiver circuit comprising: a signal processing circuit configured to generate the RF signal having the time-variant input power; and a target voltage circuit configured to: determine a power range of the RF signal based on the time-variant input power; and generate the target voltage having a time-variant change across the determined power range.
7. The power management circuit of claim 6, wherein: the power amplifier circuit causes a modulated current that interacts with the modulated voltage to create a ripple voltage in the modulated voltage across the power range of the RF signal; and the target voltage circuit is further configured to generate the target voltage to thereby cause the ripple voltage to be cancelled across the power range of the RF signal.
8. The power management circuit of claim 7, wherein the PMIC comprises: an equalizer circuit configured to apply an equalization filter to the target voltage to thereby create an equalized target voltage; and a voltage modulation circuit configured to generate the modulated voltage based on the equalized target voltage.
9. The power management circuit of claim 8, wherein: the equalizer circuit is further configured to apply the equalization filter to the target voltage to thereby add an opposite ripple voltage in the equalized target voltage; and the voltage modulation circuit is configured to generate the modulated voltage comprising the opposite ripple voltage to thereby cancel the ripple voltage in the modulated voltage.
10. The power management circuit of claim 9, wherein: the equalization filter is configured to add the opposite ripple voltage in the equalized target voltage in response to the time-variant change of the target voltage; and the target voltage circuit is further configured to generate the target voltage having the time-variant change across the power range of the RF signal.
11. The power management circuit of claim 6, further comprising a digital baseband circuit configured to generate an input vector having a time-variant amplitude, wherein the signal processing circuit is further configured to convert the input vector into the RF signal having the time-variant input power tracking the time-variant amplitude of the input vector.
12. The power management circuit of claim 6, wherein the target voltage circuit comprises: a high power-range (HPR) lookup table (LUT) configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is higher than a defined clipping threshold; and a low power-range (LPR) LUT configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is lower than or equal to the defined clipping threshold.
13. The power management circuit of claim 12, wherein the time-variant change in the target voltage is less than two-hundred millivolts when the determined power range is lower than or equal to the defined clipping threshold.
14. The power management circuit of claim 12, wherein: the HPR LUT is further configured to correlate the time-variant input power with a constant target voltage when the time-variant input power is lower than or equal to the defined clipping threshold; and the LPR LUT is further configured to correlate the time-variant input power with a non-constant target voltage when the time-variant input power is lower than or equal to the defined clipping threshold.
15. The power management circuit of claim 14, wherein the target voltage circuit is further configured to: generate the target voltage based on the HPR LUT when the determined power range is higher than the defined clipping threshold; and generate the target voltage based on the LPR LUT when the determined power range is lower than or equal to the defined clipping threshold.
Description
BRIEF DESCRIPTION OF THE DRAWING FIGURES
[0010] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.
[0011]
[0012]
[0013]
[0014]
[0015]
[0016]
DETAILED DESCRIPTION
[0017] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
[0018] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.
[0019] It will be understood that when an element such as a layer, region, or substrate is referred to as being on or extending onto another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly on or extending directly onto another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being over or extending over another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being directly over or extending directly over another element, there are no intervening elements present. It will also be understood that when an element is referred to as being connected or coupled to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being directly connected or directly coupled to another element, there are no intervening elements present.
[0020] Relative terms such as below or above or upper or lower or horizontal or vertical may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms a, an, and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises, comprising, includes, and/or including when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
[0022] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0023] Embodiments of the disclosure relate to a transceiver circuit operable in a dynamic power range. In embodiments disclosed herein, the transceiver circuit is configured to generate a radio frequency (RF) signal and a target voltage that is adapted according to a power range of the RF signal. More specifically, the transceiver circuit is configured to generate the target voltage differently when the power range of the RF signal is higher (e.g., 18 dBm) or lower (e.g., <18 dBm). By adapting the target voltage based on the power range of the RF signal, it is possible to suppress a potential voltage ripple in a modulated voltage generated according to the target voltage to thereby achieve a desired adjacent channel leakage ratio (ACLR) when the RF signal is amplified at a power amplifier circuit based on the modulated voltage.
[0024] Before discussing the transceiver circuit of the present disclosure, starting at
[0025]
[0026]
[0027] With reference back to
[0028] The PMIC 20 is configured to generate the modulated voltage V.sub.CC based on the target voltage V.sub.TGT and provide the modulated voltage V.sub.CC to the power amplifier circuit 18. Notably, the power amplifier circuit 18 has an inherent impedance Z.sub.PA that can cause a modulated current IPA in the power amplifier circuit 18 in response to receiving the modulated voltage V.sub.CC. Given that the inherent impedance Z.sub.PA can vary in accordance with, for example, the time-variant input power P.sub.IN(t) and/or a modulated frequency of the RF signal 14, the modulated current IPA can interact with the modulated voltage V.sub.CC to create a ripple voltage V.sub.CC-RIPPLE in the modulated voltage V.sub.CC. Understandably, since the modulated current IPA is associated with the time-variant input power P.sub.IN(t), the ripple voltage V.sub.CC-RIPPLE will exist across the entire power range of the RF signal 14.
[0029] The ripple voltage V.sub.CC-RIPPLE may lead to a degraded linearity at the power amplifier circuit 18 and, as a result, cause a nonlinear relationship between the time-variant output power P.sub.OUT(t) and the time-variant input power P.sub.IN(t). Consequently, the RF signal 14 can potentially suffer a worsened ACLR.
[0030] To help suppress the ripple voltage V.sub.CC-RIPPLE, the PMIC 20 can be configured to include an equalizer circuit 22 and a voltage modulation circuit 24. The equalizer circuit 22 is configured to apply an equalization filter H.sub.EQ(s) to the target voltage to thereby create an equalized target voltage V.sub.TGT-EQ. The voltage modulation circuit 24 is configured to generate the modulated voltage V.sub.CC based on the equalized target voltage V.sub.TGT-EQ.
[0031] More specifically, the equalizer circuit 22 is configured to add an opposite ripple voltage V.sub.CC-RIPPLE in the equalized target voltage V.sub.TGT-EQ to cancel the ripple voltage V.sub.CC-RIPPLE. As a result, the voltage modulation circuit 24 can generate the modulated voltage V.sub.CC without the ripple voltage V.sub.CC-RIPPLE.
[0032] In a non-limiting example, the equalization filter H.sub.EQ(s) is a transfer function that is driven by a change dV.sub.TGT/dt in the target voltage V.sub.TGT. In this regard, when the transceiver circuit 12 generates the constant target voltage V.sub.TGT-CNT in response to the time-variant input power P.sub.IN(t) being lower than or equal to the defined clipping threshold P.sub.CLIP, the equalizer circuit 22 will not be operational to apply the equalization filter H.sub.EQ(S) to the target voltage V.sub.TGT. As a result, the equalized target voltage V.sub.TGT-EQ will not include the opposite ripple voltage V.sub.CC-RIPPLE to cancel the ripple voltage V.sub.CC-RIPPLE across the entire power range of the RF signal 14. Consequently, the RF signal 14 can suffer a degraded ACLR.
[0033] Studies have shown that the ripple voltage V.sub.CC-RIPPLE may be less problematic when the time-variant input power P.sub.IN(t) is in a higher power range (e.g., 23 dBm), but can create a greater problem when the time-variant input power P.sub.IN(t) is in a lower power range (e.g., 18 dBm). As such, the technical problem to be solved is to ensure that the equalizer circuit 22 is operational to add the opposite ripple voltage V.sub.CC-RIPPLE to cancel the ripple voltage V.sub.CC-RIPPLE across a dynamic power range of the RF signal 14.
[0034] In this regard,
[0035] Like the transceiver circuit 12 in the existing power management circuit 10, the transceiver circuit 28 is configured to generate the RF signal 30 with a time-variant input power P.sub.IN(t). As described above in
[0036] Herein, the RF signal 30 is said to be in a high power-range (HPR) when the power range of the RF signal 30 is greater than or equal to 18 dBm (e.g., 23 dBm) or in a low power-range (LPR) when the power range of the RF signal 30 is lower than 18 dBm. Notably in the power management circuit 26, the power amplifier circuit 18 and the PMIC 20 will each operate in a same fashion as described in
[0037] As described in detail below, the transceiver circuit 28 is configured to ensure that a time-variant change dV.sub.TGT/dt in the target voltage V.sub.TGT will always occur when the RF signal 30 is in the LPR such that the equalizer circuit 22 can always generate the equalized target voltage V.sub.TGT-EQ with the opposite ripple voltage V.sub.CC-RIPPLE. In contrast, when the RF signal 30 is in the HPR, the equalizer circuit 22 will operate in the same fashion as in the existing power management circuit 10. As such, the power management circuit 26 can achieve an improvement in ACLR over the existing power management circuit 10, especially when the RF signal 30 is in the LPR. In this regard, the power management circuit 26 provides a solution to the technical problem described above.
[0038]
[0039] Herein, the transceiver circuit 28 includes a digital baseband circuit 32, a signal processing circuit 34, and a target voltage circuit 36. The digital baseband circuit 32 is configured to generate an input vector {right arrow over (b.sub.MOD)}. In a non-limiting example, the input vector {right arrow over (b.sub.MOD)} is so generated to include an in-phase component (I) and a quadrature component (0). In this regard, the input vector {right arrow over (b.sub.MOD)} will be associated with a time-variant amplitude {square root over (I.sup.1+Q.sup.2)} that ultimately defines the time-variant input power P.sub.IN(t).
[0040] The signal processing circuit 34, which may include a digital-to-analog converter (DAC) and/or a frequency converter (not shown), is configured to generate the RF signal 30 from the input vector {right arrow over (b.sub.MOD)} and provide the RF signal 30 to the power amplifier circuit 18 in
[0041] In an embodiment, the target voltage circuit 36 can include a HPR LUT 38 and a LPR LUT 40.
[0042] Herein, the HPR LUT 38 is identical to the LUT 16, as illustrated in
[0043] In contrast, the LPR LUT 40 is configured to correlate the time-variant input power P.sub.IN(t) with a non-constant target voltage V.sub.TGT-VAR when the power range of the input vector is lower than or equal to the defined clipping threshold P.sub.CLIP. In a non-limiting example, the LPR LUT 40 can correspond to a small slope to cause a small time-variant change dV.sub.TGT/dt (e.g., up to 200 mV) in the target voltage V.sub.TGT. The small time-variant change dV.sub.TGT/dt, although small, is sufficient to trigger the equalizer circuit 22 to generate the equalized target voltage V.sub.TGT-EQ with the opposite ripple voltage V.sub.CC-RIPPLE to thereby cancel the ripple voltage V.sub.CC-RIPPLE in the modulated voltage V.sub.CC.
[0044] The power management circuit 26 of
[0045] Herein, the user element 100 can be any type of user elements, such as mobile terminals, smart watches, tablets, computers, navigation devices, access points, and like wireless communication devices that support wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, and near field communications. The user element 100 will generally include a control system 102, a baseband processor 104, transmit circuitry 106, receive circuitry 108, antenna switching circuitry 110, multiple antennas 112, and user interface circuitry 114. In a non-limiting example, the control system 102 can be a field-programmable gate array (FPGA), as an example. In this regard, the control system 102 can include at least a microprocessor(s), an embedded memory circuit(s), and a communication bus interface(s). The receive circuitry 108 receives radio frequency signals via the antennas 112 and through the antenna switching circuitry 110 from one or more base stations. A low noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using analog-to-digital converter(s) (ADC).
[0046] The baseband processor 104 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 104 is generally implemented in one or more digital signal processors (DSPs) and application specific integrated circuits (ASICs).
[0047] For transmission, the baseband processor 104 receives digitized data, which may represent voice, data, or control information, from the control system 102, which it encodes for transmission. The encoded data is output to the transmit circuitry 106, where a digital-to-analog converter(s) (DAC) converts the digitally encoded data into an analog signal and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated carrier signal to a level appropriate for transmission, and deliver the modulated carrier signal to the antennas 112 through the antenna switching circuitry 110. The multiple antennas 112 and the replicated transmit and receive circuitries 106, 108 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.
[0048] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.