Signal processing circuit and signal processing device
12381568 ยท 2025-08-05
Assignee
Inventors
Cpc classification
H03M1/123
ELECTRICITY
H03M1/125
ELECTRICITY
International classification
Abstract
A signal processing circuit includes a first current sensor input, a second current sensor input, a voltage sensor input for receiving a sensor voltage, a first selection unit, a second selection unit, a current analog-digital converter (ADC), a voltage ADC, digital processing block, and a current-voltage converter. The first selection unit includes a first current input coupled to the first current sensor input, and a second current input coupled to the second current sensor input. The second selection unit includes a first voltage input coupled to the voltage sensor input and a second voltage input. The current ADC is coupled to a first current output. The voltage ADC is coupled to a voltage output. The digital processing block is coupled to outputs of the current ADC and the voltage ADC. The current-voltage converter is coupled between a second current output and the second voltage input.
Claims
1. A signal processing circuit comprising a first current sensor input for receiving a first sensor current; a second current sensor input for receiving a second sensor current; a voltage sensor input for receiving a sensor voltage; a first selection unit comprising a first current input, which is coupled to the first current sensor input, and a second current input, which is coupled to the second current sensor input and being configured to, based on a first selection signal, select one of the first and the second current input as a first selected input to be connected to a first current output, and to select one, in particular another one, of the first and the second current input as a second selected input to be connected to a second current output; a second selection unit comprising a first voltage input, which is coupled to the voltage sensor input and a second voltage input and being configured to, based on a second selection signal, connect one of the first and the second voltage input to a voltage output; a current analog-digital converter (ADC), coupled to the first current output; a voltage ADC coupled to the voltage output; a digital processing block coupled to respective outputs of the current ADC and the voltage ADC; and a current-voltage converter coupled between the second current output and the second voltage input.
2. The signal processing circuit according to claim 1, wherein the first selection unit is configured to simultaneously provide respective currents from the first selected input to the first current output and from the second selected input to the second current output.
3. The signal processing circuit according to claim 1, wherein at least one of the current ADC and the voltage ADC comprises a delta-sigma-modulator.
4. The signal processing circuit according to claim 1, wherein the current-voltage converter comprises a transimpedance amplifier.
5. The signal processing circuit according to claim 1, further comprising at least one offset current source connected to the first current output or to the second current output.
6. The signal processing circuit according to claim 1, wherein the digital processing block comprises a buffer element for buffering digital values provided by the current ADC and the voltage ADC.
7. The signal processing circuit according to claim 1, further comprising at least one further current sensor input for receiving at least one further sensor current, wherein the first selection unit is configured to, based on the first selection signal, select one of the first, the second and the at least one further current input as the first selected input and to select one, in particular another one, of the first, the second and the at least one further current input as the second selected input.
8. A signal processing device comprising a signal processing circuit according to claim 1; a first photosensitive element connected to the first current sensor input; a second photosensitive element connected to the second current sensor input; and a sensor element connected to the voltage sensor input for providing at least one sensor voltage.
9. The signal processing device according to claim 8, wherein the sensor element comprises at least two electrodes for electrocardiogram, ECG, measurement and wherein the signal processing device further comprises a processing block connected between the voltage sensor input and the first voltage input.
10. The signal processing device according to claim 8, wherein the first and the second photosensitive element are adapted for at least one of the following configurations: the first and the second photosensitive element are configured for photoplethysmography (PPG); the first photosensitive element is configured for PPG and the second photosensitive element is configured for detection of oxygen saturation, in particular peripheral oxygen saturation SpO.sub.2; and the first photosensitive element is configured for PPG and the second photosensitive element is configured for ambient light detection.
11. The signal processing device according to claim 8, the signal processing device is implemented as one of the following: a wearable device; a smartwatch; a wristband; glasses; or a sensor patch.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The improved processing concept will be described in more detail in the following with the aid of drawings. Elements having the same or similar function bear the same reference numerals throughout the drawings. Hence their description is not necessarily repeated in following drawings.
(2) In the drawings:
(3)
(4)
(5)
(6)
DETAILED DESCRIPTION
(7)
(8) The signal processing circuit further comprises a digital processing block DIG that is shown schematically only for reasons of a better overview. For example, an output of the current ADC IADC is coupled to the digital processing block DIG.
(9) The signal processing circuit further comprises a voltage sensor input VIN and a second selection unit SEL2 comprising a first voltage input, which is coupled to the voltage sensor input VIN, and a second voltage input being coupled to an output of the current-voltage converter TIA. A voltage output of the second selection unit SEL2 is coupled to a voltage ADC VADC, which has its output coupled to the digital processing block DIG.
(10) The solid black line including the current sensor inputs PD1 to PD6, the current reference terminal PDREF, the voltage sensor input VIN and the voltage reference terminal VINREF for example resembles a boundary of the signal processing circuit.
(11)
(12) The first selection unit SELL is configured to select one of the current inputs, e.g. one of the first and the second current inputs as a first selected input that is to be connected to the first current output and, consequently, to the current ADC IADC. Furthermore, the first selection unit SELL is configured to select one of its current inputs, e.g. the first and the second current input as a second selected input that is to be connected to the second current output and, consequently, to the current-voltage converter TIA. Preferably, the first and the second selected inputs are different from each other.
(13) The selection within the first selection unit SELL is, for example, based on a first selection signal being provided via a first selection input SIN1. For example, the first selection signal is provided from the digital processing block DIG but could also be provided from an entity external to the signal processing circuit.
(14) The second selection unit is configured to connect one of the first and the second voltage input to the voltage output based on a second selection signal that may be provided via a second selection input SIA2. For example, also the second selection signal is provided by the digital processing block DIG but could also be provided from an entity external to the signal processing circuit.
(15) The current-voltage converter TIA is configured to generate a voltage corresponding to the respective input current provided from the first selection unit SEL1. Accordingly, the second selection unit SEL2 provides one of the respective input voltages at its output and to the voltage ADC VADC.
(16) Hence, during operation of the signal processing circuit various configurations for input signals to be processed are available.
(17) For example, in one configuration determined by the respective selection signals one of the currents provided at the current sensor inputs PD1 to PD6, respectively the current inputs of the first selection unit SELL, is provided to the current ADC IADC for converting the current value to a digital representation thereof. The second selection unit SEL2 provides the voltage provided by the sensor element VS to the voltage ADC VADC for generating a digital representation of the respective voltage value. In such a configuration the selection of the second selected input within the first selection unit SELL can be neglected. For example, in such a case even no selection at all is an option, such that no current is provided to the current-voltage converter TIA accordingly.
(18) Eventually, the described configuration allows parallel processing of the selected current sensor input, respectively the selected photosensitive element and the sensor signal of the sensor element VS.
(19) In another configuration, also one of the current inputs, respectively current sensor inputs PD1 to PD6, is selected in the first selection unit SELL as a first selected input, as in the configuration described previously. However, in the present configuration, a second selected input is determined by the first selection signal such that a current provided at the selected input is provided from said selected second input to the current voltage converter TIA for converting it to the corresponding voltage signal. Furthermore, in the second selection unit SEL2, the second voltage input being connected to the output of the current voltage converter TIA is selected via the second selection signal, such that the output voltage of the current voltage converter is provided to the voltage ADC VADC.
(20) Eventually, in this configuration a simultaneous processing of signals from two current sensors, implemented as photosensitive elements in this example, is made possible.
(21) In particular, two parallel current paths are established in the first selection unit SELL between the respective selected inputs and the first and second current outputs. This avoids the need to switch inputs for providing currents over a single current path. Moreover, the parallel provision of the respective sensor currents at the first and the second current output allows simultaneous conversion from the analog to the digital domain via the analog-to-digital converters IADC, VADC which particularly can be beneficial for applications where an exact relationship in time of the respective sensor currents is desired. A sensor voltage from the sensor element VS is neglected in this configuration.
(22)
(23) For example, the current ADC IADC and the voltage ADC VADC comprise a delta-sigma modulator that, for example, allows noise shaping of the respective input signal. However, in alternative implementations only one of the ADCs IADC and VADC may be implemented with a delta-sigma modulator based ADC.
(24) Furthermore in the example of
(25) Further details could be implemented with the transimpedance amplifier without departing from the schematic approach of a transimpedance amplifier shown in this example. The resistive element in the feedback path may be adjustable, e.g. for tuning an exact ratio between input current and output voltage of the transimpedance amplifier.
(26) In the example implementation of
(27) The digital processing block DIG may comprise a buffer element for buffering the respective digital values provided by the ADCs IADC and VADC. For example, the buffer element is implemented as a first in, first out, FIFO, buffer allowing, for example, asynchronous processing or forwarding of the buffered values.
(28) Furthermore, the digital processing block DIG may comprise an interface block for providing the buffered values to another device or signal processing circuit or signal processor or the like. For example, the interface block is configured to operate according to the I2C and/or the SPI transmission standard.
(29) In alternative implementations, the digital processing block may also include a digital signal processor for directly processing the buffered digital values.
(30) In the example implementation of
(31) For example, at least two of the photosensitive elements connected at the current sensor inputs PD1 to PD6 are configured for PPG measurement. To this end, the signal processing circuit may also include circuitry for driving respective LEDs as light sources for the PPG measurement. However, for a better overview, such circuitry is not shown in the present schematic representation of
(32) With reference to the explanation of different possible configurations given in conjunction with
(33) In another configuration, one PPG channel is processed in parallel to the ECG signal.
(34) As discussed before, the signal processing circuit together with the respective sensors can form a signal processing device. While an exact implementation of such a signal processing device should not be limited in the following,
(35)
(36) Despite PPG, one or more of the photosensitive elements connectable to the signal processing circuit can be configured for detection of oxygen saturation, e.g. peripheral oxygen saturation SpO.sub.2, and/or ambient light. For example, the ambient light detection can be used to compensate for ambient light effects in the signals from the PPG configured photosensitive elements.
(37) A photosensitive element in the sense of this description may not only be a single photodiode or other single device but may also include groups of such devices that, for example, provide their respective photocurrents in parallel to improve signal quality and/or strength. Hence, several photodiodes or other devices may be arranged in groups that together provide their respective photocurrents to one of the current sensor inputs PD1 to PD6 each.
(38)
(39) For example,
(40)
(41) The second selection unit may comprise further voltage inputs that could be selected with the second selection signal as an output voltage to be provided to the voltage ADC. For example, further sensor inputs may exist and/or internal voltages of the signal processing device could be measured.
(42) It will be appreciated that the disclosure is not limited to the disclosed embodiments and to what has been particularly shown and described hereinabove. Rather, features recited in separate dependent claims or in the description may advantageously be combined. Furthermore, the scope of the disclosure includes those variations and modifications, which will be apparent to those skilled in the art and fall within the spirit of the appended claims. The term comprising, insofar it was used in the claims or in the description, does not exclude other elements or steps of a corresponding feature or procedure. In case that the terms a or an were used in conjunction with features, they do not exclude a plurality of such features. Moreover, any reference signs in the claims should not be construed as limiting the scope.