Decomposition of signals into a sum of truncated fourier series

Abstract

Systems and methods of performing decomposition of baseband and bandpass signals into a sum of time truncated periodic components with spectral masks defined by the set of Fourier coefficients of the components and the pulse used for time truncation are provided. In one exemplary embodiment, a user equipment device includes a circuitry operable to output a set of truncated periodic components that collectively represents a sample of an input signal having information and a set of power amplifier circuitry electrically coupled to the circuitry and operable to amplify the set of truncated periodic components that collectively represents an amplified sample of the input signal.

Claims

1. A method, comprising: generating, by a circuitry, a set of periodic components based on a set of quantization bits that represents a quantized amplitude of a sample of an input signal having information and a set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated; outputting, by the circuitry, a set of truncated periodic components that collectively represents the input signal sample; and amplifying, by a set of power amplifier circuitry electrically coupled to the circuitry, the set of truncated periodic components that collectively represents an amplified sample of the input signal.

2. The method of claim 1, further comprising: computing an amplitude and a phase of the sample; quantizing the amplitude to obtain the set of quantization bits that represents the quantized amplitude of the sample; and decomposing the set of quantization bits that represents the quantized amplitude of the sample to obtain the set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated.

3. The method of claim 1, further comprising: truncating the set of periodic components to a certain sample period to obtain the set of truncated periodic components.

4. The method of claim 1, further comprising: combining the amplified set of truncated periodic components to obtain an output signal.

5. A user equipment device, comprising: a circuitry operable to: generate a set of periodic components based on a set of quantization bits that represents a quantized amplitude of a sample of an input signal having information and a set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated; and output a set of truncated periodic components that collectively represents the input signal sample; and a set of power amplifier circuitry electrically coupled to the circuitry and operable to amplify the set of truncated periodic components that collectively represents an amplified sample of the input signal.

6. The device of claim 5, further comprising: a first circuitry operable to compute an amplitude and a phase of the sample; a second circuitry operable to quantize the amplitude to obtain the set of quantization bits that represents the quantized amplitude of the sample; and a mapper circuitry operable to decompose the set of quantization bits that represents the quantized amplitude of the sample to obtain the set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated.

7. The device of claim 5, further comprising: a truncation circuitry operable to truncate the set of periodic components to a certain sample period to obtain the set of truncated periodic components.

8. The device of claim 5, further comprising: a combiner circuitry operable to combine the amplified set of truncated periodic components to obtain an output signal.

9. A method, comprising: generating, by a circuitry, a set of periodic components based on a set of quantization bits that represents a quantized amplitude of a sample of an input signal having information and a set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated; and amplifying, by a set of power amplifier circuitry, a set of truncated periodic components that collectively represents an amplified sample of the input signal.

10. The method of claim 9, further comprising: computing an amplitude and a phase of the sample; quantizing the amplitude to obtain the set of quantization bits that represents the quantized amplitude of the sample; and decomposing the set of quantization bits that represents the quantized amplitude of the sample to obtain the set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated.

11. The method of claim 9, further comprising: truncating the set of periodic components to a certain sample period to obtain the set of truncated periodic components.

12. The method of claim 9, further comprising: combining the amplified set of truncated periodic components to obtain an output signal.

13. A user equipment device, comprising: a circuitry operable to generate a set of periodic components based on a set of quantization bits that represents a quantized amplitude of a sample of an input signal having information and a set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated; and a set of power amplifier circuitry operable to amplify a set of truncated periodic components that collectively represents an amplified sample of the input signal.

14. The device of claim 13, further comprising: a first circuitry operable to compute an amplitude and a phase of the sample; a second circuitry operable to quantize the amplitude to obtain the set of quantization bits that represents the quantized amplitude of the sample; and a mapper circuitry operable to decompose the set of quantization bits that represents the quantized amplitude of the sample to obtain the set of periodic component activation indications that indicates which of the set of periodic components is activated or deactivated.

15. The device of claim 13, further comprising: a truncation circuitry operable to truncate the set of periodic components to a certain sample period to obtain the set of truncated periodic components.

16. The device of claim 13, further comprising: a combiner circuitry operable to combine the amplified set of truncated periodic components to obtain an output signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the disclosure are shown. However, this disclosure should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Like numbers refer to like elements throughout.

(2) FIG. 1 illustrates one embodiment of a method of performing a decomposition of signals into a sum of truncated baseband signals in accordance with various aspects as described herein.

(3) FIGS. 2A-2B illustrate embodiments of a system of performing a decomposition into a sum of truncated baseband signals assuming values over a dynamic range in accordance with various aspects as described herein.

(4) FIG. 3 illustrates one embodiment of a system of amplifying and combining a set of truncated bandpass signals in accordance with various aspects as described herein.

(5) FIGS. 4A-4B illustrate embodiments of a system of performing a decomposition into a sum of a limited set of truncated bandpass signals in accordance with various aspects as described herein.

(6) FIGS. 5A-5D illustrate embodiments of a system of amplifying and combining a set of truncated bandpass signals in accordance with various aspects as described herein.

(7) FIG. 6 illustrates one embodiment of a wireless communication network in accordance with various aspects as described herein.

(8) FIG. 7 illustrates one embodiment of an electronic device in accordance with various aspects as described herein.

DETAILED DESCRIPTION

(9) For simplicity and illustrative purposes, the present disclosure is described by referring mainly to an exemplary embodiment thereof. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be readily apparent to one of ordinary skill in the art that the present disclosure may be practiced without limitation to these specific details.

(10) In this disclosure, systems and methods of performing a decomposition of signals into a sum of truncated Fourier series are provided. Signals used in telecommunication systems can include periodic signals whose characteristics can change according to the transmitted information symbols, leading to signals having changes in amplitude, phase or the like over time. Signals in modern communication systems can include changes of amplitude and phase related to the carried information and these changes can cause envelope variations over time that can increase transceiver complexity such as related to amplification and mapping of the transmitted signals. These signals can be represented as periodic signals that can suffer changes to amplitude and phase according to the information carried in each symbol interval. A periodic signal S.sub.T.sub.0(t) with period T.sub.0 obtained by repetition of a pulse

(11) $p\left(t\right)s_{T_o}\left(t\right)={.Math.}_{n=-}^{}Ap\left(t-n{T}_0\right),$
with p(t) being a pulse with a duration TT.sub.0 can be represented as a Fourier series represented by

(12) $s_{T_o}\left(t\right)=a_0+2{.Math.}_{n=1}^{}\left[a_n\cos \left(2{\mathrm{nf}}_{0}t\right)+b_n\sin \left(2{\mathrm{nf}}_{0}t\right)\right],$
with f.sub.0 denoting the fundamental frequency

(13) $f_0=\frac{1}{T_0}.$
The coefficients a.sub.n and b.sub.n represent the amplitudes of the respective cosine and sine terms. The coefficients a.sub.0, a.sub.n and b.sub.n are given as a function of the periodic signal

(14) $s_{T_o}\left(t\right),\mathrm{by}{a}_n=\frac{1}{T_0}{}_{-T_0/2}^{T_0/2}{s}_{T_0}\left(t\right)\cos \left(2{\mathrm{nf}}_{0}t\right)\mathrm{dt},b_n=\frac{1}{T_0}{}_{-T_0/2}^{T_0/2}{s}_{T_o}\left(t\right)\sin \left(2{\mathrm{nf}}_{0}t\right)\mathrm{dt},$
with n=1, 2, . . . , , and

(15) $a_0=\frac{1}{T_0}{}_{-T_0/2}^{T_0/2}{s}_{T_o}\left(t\right)dt.$
Periodic signals can be also represented as a complex exponential Fourier series represented by

(16) $s_{T_o}\left(t\right)={.Math.}_{n=-}^{}{c}_n\exp \left(j2{\mathrm{nf}}_{0}t\right),$
with

(17) $c_n=f_0{}_{-}^{+}{s}_{T_o}\left(t\right)\exp \left(-j2n{f}_{0}t\right)dt.$
With the amplitude A decomposed as a sum of N components with amplitudes A.sub.i {A.sub.1, . . . , A.sub.N}, any periodic signal resulting from a sum of N periodic signals

(18) 0${.Math.}_{i=1}^N{s}_{T_0}^{\left(i\right)}\left(t\right)={.Math.}_{i=1}^N{.Math.}_{n=-}^{}{A}_{i}p\left(t-{\mathrm{nT}}_0\right)$
with amplitudes A.sub.i can be expressed as a sum of N Fourier series

(19) ${.Math.}_{i=1}^N{.Math.}_{n=-}^{}{c}_n^{\left(i\right)}$
exp(j2nf.sub.0t), in which c.sub.n.sup.(i) represents the Fourier coefficients associated with the i-th periodic signal component with amplitude A.sub.i. A baseband signal represented by

(20) $S_{\mathrm{bb}}\left(t\right)={.Math.}_{k=0}^{+}{A}_{k}r\left(t-kT\right),$
where A.sub.k has a finite set of amplitudes, can be mapped as a sum of time truncated periodic components with amplitudes belonging to a finite alphabet with size N, in which each A.sub.k is decomposed. Also, baseband or bandpass signals with continuous values over a dynamic range may have a similar decomposition in terms of periodic components, after a quantization that restricts the alphabet size of possible values that are expressed as sums of components with fixed amplitudes.

(21) In one embodiment, a system can generate a set of periodic components with fixed amplitudes that are time truncated and used to represent the sampled signals as a sum of fixed or constant envelope components, with the spectral mask defined by the Fourier coefficients and the pulse employed in the time truncation operation. The system can sample and decompose continuous and discrete baseband or bandpass signals as a sum of truncated periodic components, which increases flexibility to represent a wider range of signal formats and constellations. The system can quantize the signals to obtain a finite set of possible values that are decomposed as a sum of time truncated periodic components. The system does not have to quantize those signals that assume values in a discrete alphabet, since the values of the alphabet can also be decomposed as a sum of time truncated periodic components having fixed amplitudes.

(22) FIG. 1 illustrates one embodiment of a method 100 of performing a decomposition of signals into a sum of truncated baseband signals in accordance with various aspects as described herein. In FIG. 1, the method 100 can start, for instance, at block 101 where it can include receiving samples of a baseband signal or the samples of a complex envelope or envelope of a bandpass signal. For example, the method 100 can include sampling, by a sampling circuitry or a sample and hold (S/H) circuitry, a baseband signal to generate the samples of the input signal. At block 103, the method 100 can include receiving a clock signal associated with a sample rate f.sub.s of the input signal, a clock signal associated with a sample rate f.sub.s of the input signal, a clock signal associated with an intermediate frequency f.sub.i, a clock signal associated with a carrier frequency f.sub.c, or the like. A skilled artisan will recognize that a sample rate can vary according to the bandwidth of an input signal or the desired time resolution of the sampling process. At block 105, the method 100 can include computing the amplitude or the phase of each sample. At block 107, the method 100 can include quantizing each sample amplitude based on N quantization bits. At block 109, the method 100 includes decomposing, by a mapper circuitry associated with N mapping components, the amplitude or the quantized amplitude of the sample into a sum of N amplitude values and generating a set of N mapping coefficients based on a mapping table that activates or deactivates the set of N mapping components. Further, the number of mapping components can be equal to the number of the set of quantization amplitude bits of the sample. At block 111, the method 100 can include generating a set of N periodic mapping components or a set of N in-phase and quadrature-phase periodic mapping components having different or fixed amplitudes based on the mapping table. At block 113, the method 100 can include time truncating each periodic mapping component. At block 115, the method 100 can include multiplying each truncated periodic mapping component by the corresponding mapping coefficient. At block 117, the method 100 can include upconverting the set of in-phase and quadrature-phase truncated periodic mapping components to carrier frequency f.sub.c. At block 119, the method 100 can include summing each pair of in-phase and quadrature-phase truncated periodic mapping components. In another embodiment steps 107-op1 and 107-op2 convert truncated periodic mapping components to an intermediate frequency and an up conversion to the carrier frequency is needed. At block 121, the method 100 can include amplifying, by a set of power amplifiers, the active set of truncated periodic components. At block 123, the method 100 can include combining the active set of truncated periodic components to obtain an output signal.

(23) In another embodiment, the method can compute a quantization amplitude error e.sub.q as the difference between the amplitude A.sub.n and the quantized amplitude A.sub.nq and can quantize the quantization amplitude error e.sub.q to obtain a quantized quantization amplitude error ego that can be input to the mapper circuitry operable to perform a weighted compensation of the quantization amplitude error e.sub.q on at least one of the active set of truncated periodic mapping components.

(24) In another embodiment, the method can include computing the quantization amplitude error e.sub.q and quantizing the quantization amplitude error e.sub.q to obtain quantized quantization amplitude error e.sub.qQ that can be applied to method step 111 to perform a weighted compensation of the quantized quantization amplitude error ego on at least one of the amplitudes of the set of periodic mapping components.

(25) In another embodiment, the method steps of quantizing, mapping, periodic component generating, time truncating and generating mapping coefficients that activate or deactivate the set of truncated periodic components can be performed in a single digital block.

(26) FIGS. 2A-2B illustrate embodiments of a system 200a,b of performing a decomposition into a sum of truncated baseband signals assuming values over a dynamic range in accordance with various aspects as described herein. The system 200a,b can include a sampling circuitry or a sample and hold circuitry 221 operable to receive an input signal 201-1 (e.g., baseband or bandpass signal), a sample 202 of the input signal 201-1 or samples of the complex envelope of the input signal 201-1, a set of reference clock signals, or the like. A first quantizer circuitry 203 and a mapper circuitry 205, represented by a processing block circuitry PBC, can be operable to receive each sample 202 and compute an amplitude or a phase of each sample. The first quantizer circuitry 203 can be operable to limit the input signal 201-1 from assuming values over a dynamic range to a finite alphabet of possible values of the samples 202. Further, a second quantizer circuitry 223 can be operable to quantize a quantization amplitude error e.sub.q to obtain a quantized quantization amplitude error e.sub.qQ. The mapper circuitry 205 can be further operable to decompose the sample as a sum of a set of periodic mapping components and generate a set of mapping coefficients based on a mapping table that activates or deactivates the set of periodic mapping components. After the mapper circuitry 205, a periodic mapping component generator circuitry 207 can be operable to generate a set of periodic mapping components based on a set of mapping coefficients and a mapping table. A time truncation circuitry 209 can be operable to time truncate each periodic mapping component to a certain time duration and can multiply each truncated periodic mapping component by the corresponding mapping coefficients. An amplifier and combiner circuitry 225 can include an upconverter circuitry operable to up-convert a signal, a set of Digital to Analog Converters (DACs) operable to convert a digital signal to an analog signal, a set of mixer circuitry operable to mix a signal, a set of power DACs or power amplifiers operable to amplify the active set of bandpass truncated periodic components, combiner circuitry operable to combine signals, matching network circuitry, transducer circuitry, or the like.

(27) In FIG. 2A, the system 200a can receive the input signal 201-1 such as the time samples S.sub.bbs of a baseband signal S.sub.bb(t), with amplitudes assuming any value within a dynamic range. In one example, the sampling circuitry or the sample and hold circuitry 221 can sample the input signal 201-1 to obtain the samples 202 with f.sub.sf.sub.0. In another example, the input signal 201-1 can include the samples S.sub.bbs (t.sub.s)=S.sub.bbs=A.sub.ks of a baseband signal. The system 200a can receive a clock reference signal 201-2 associated with a sampling frequency, a reference signal clock 201-3 associated with an intermediate frequency f.sub.i, a clock signal 201-4 associated with a carrier frequency f.sub.c, a clock signal 201-5 associated with a fundamental frequency of the periodic components. A skilled artisan will recognize that the selection of the clock reference signals can be performed based on the bandwidth of an input signal or the desired frequency of the input signal. The system 200a can be configured to input the clock signal 201-2 associated with the sampling frequency to the sampling block 221, the quantizer circuitry 203, the mapper circuitry 205, the time truncation circuitry 209, the amplifier and combiner circuitry 225, or the like. The input signal 201-3 can include a clock reference associated with a fundamental frequency for the periodic components in which each sample is decomposed.

(28) In FIG. 2A, the processing block circuitry PBC includes the first quantizer circuitry 203 and the mapper circuitry 205 operable to compute the amplitude A.sub.ks and the phase of each sample. The first quantizer circuitry 203 can quantize the amplitude A.sub.ks using N bits so as to limit the set of possible values of the amplitude A.sub.ks to limited alphabets having a dimension of 2.sup.N values. The corresponding set of quantization bits 204-{1, . . . , N} and the signal 204-a representing the quantized values of the quantized amplitude A.sub.qks can be input to the mapper circuitry 205. The mapper circuitry 205 can decompose, based on a mapping table, the quantized amplitude A.sub.qks as a sum

(29) $A_{qks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(30) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N} and related to periodic components with same amplitude. The mapper circuitry 205 can compute the set of N mapping coefficients C.sub.I,ik which are output via signals 206-{1, . . . , N} to the activation and time truncation block circuitry 209 operable to activate/deactivate and truncate the set of periodic components. The mapper circuitry 205 can also provide via the signal 206-a the finite alphabet A.sub.i {A.sub.1, . . . , A.sub.N} to the periodic mapping component generator circuitry 207 operable to generate the set of periodic components 208-{1, . . . , N} in which each quantized amplitude is decomposed, represented by

(31) $s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right),$
where coefficients c.sub.I,n.sup.(i) are related to the periodic mapping components with amplitude A.sub.i. The mapper circuitry 205 can also output, to the periodic mapping component generator circuitry 207, a set of signals M-{1, . . . , N} having information associated with the quantization parameters and the mapping coefficients.

(32) In another embodiment, the second quantizer circuitry 223 can receive, from the first quantizer circuitry 203, the quantization error e.sub.q and can quantize the quantization error e.sub.q to the quantized quantization error ego. The second quantizer 223 can then output, to the mapper circuitry 205, the quantized quantization error e.sub.qQ.

(33) In FIG. 2A, the activation and time truncation circuitry 209 can activate and time truncate, based on the coefficients C.sub.I,ik obtained via signals 206-{1, . . . , N}, the sampling pulse duration T.sub.s, the pulse r(t) or the like, the set of periodic components 208-{1, . . . , N} and can generate the set of N truncated periodic components 210-{1, . . . , N} of these signals represented by

(34) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right).$
The activation and time truncation circuitry 209 can output, to the amplifier and combiner circuitry 225, the active set of truncated mapping components 210-{1, . . . , N}. The circuitry 225 can include a combiner circuitry operable to combines the active set of truncated periodic components to generate, for each sample interval T.sub.s, a sum of the active set of truncated periodic components

(35) $S_{\mathrm{qIk}}\left(t\right)={.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)$
as the output signal 227. The sum of N periodic components can be represented by

(36) $s_{qbbs}\left(t\right)={.Math.}_{m=0}^{+}\left[{.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\right]={.Math.}_{m=0}^{+}{S}_{\mathrm{qIk}}\left(t\right),$
where the truncated periodic components s.sub.Ik.sup.(i)(t) are related to the periodic components with amplitude A.sub.i.

(37) In another embodiment, both the first quantizer circuitry 203 and the mapper circuitry 205 can be configured to include a look up table (LUT) circuitry configured to include different quantization and mapping rules to generate different sets of periodic mapping components associated with different baseband signals.

(38) In another embodiment, the first quantizer circuitry 203, the mapper circuitry 205 and the periodic mapping component generator circuitry 207 can be implemented in a single analog or digital circuitry block.

(39) In another embodiment, the amplifier and combiner circuitry 225 can include a set of N power amplifiers operable to amplify each truncated periodic component and a combining circuitry to generate, for each sampling interval, the output signal 227. The combined and amplified output signal 227 can be represented by

(40) $s_{qbbs}\left(t\right)={.Math.}_{i=1}^N{g}_a^i{C}_{I,\mathrm{ik}}\left[{.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)\right]={.Math.}_{m=0}^{+}\left[{.Math.}_{i=1}^N{g}_a^i{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\right],$
with g.sub.a.sup.i denoting the gain of amplifier associated with periodic component with amplitude A.sub.i.

(41) In another embodiment, the amplifier and combiner circuitry 225 can include a set of N power amplifiers electrically coupled to a set of transducers.

(42) In FIG. 2B, the processing block circuitry PBC includes the mapper circuitry 205 operable to compute the amplitude A.sub.ks of each sample, and decompose the amplitude A.sub.ks based on a mapping table as a sum

(43) 0$A_{ks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(44) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N} related to periodic components having the same amplitude. The mapper circuitry 205 can compute the set of N pairs of coefficients C.sub.I,ik, which are output via signals 206-{1, . . . , N} to the periodic mapping component generator circuitry 207 operable to activate/deactivate and truncate the set of periodic mapping components. The mapper circuitry 205 can also output, to the periodic mapping component generator circuitry 207, the signal 204-a that includes the finite alphabets A.sub.i{A.sub.1, . . . , A.sub.N} to generate the set of periodic mapping components 208-{1, . . . , N} represented by

(45) $s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right),$
where coefficients c.sub.I,n.sup.(i) are related to the periodic components with amplitude A.sub.i. The activation and time truncation circuitry 207 can activate/deactivate and time truncate, based on the coefficients C.sub.I,ik obtained via the signals 206-{1, . . . , N}, the sampling pulse duration T.sub.s and the pulse r(t), the set of periodic mapping components 208-{1, . . . , N} and can generate the set of N truncated components 210-{1, . . . , N} represented by

(46) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right).$

(47) In another embodiment, the activation and time truncation circuitry 209 can activate/deactivate and time truncate, based on the coefficients C.sub.ik from 206-{1, . . . , N} together the sampling pulse duration T.sub.s and pulse r(t) to activate and time truncate periodic components 208-{1, . . . , N} and generate the set of N truncated periodic components 210-{1, . . . , N} represented by

(48) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right).$
Active truncated periodic components among the possible ones 210-{1, . . . , N} are the input of an optional block op1.

(49) In FIG. 2B, the amplifier and combiner circuitry 225 can include a combiner circuitry operable to combine the set of truncated periodic components to generate, for each sample interval T.sub.s, the sum of the set of truncated periodic components represented by

(50) $S_{\mathrm{qIk}}\left(t\right)={.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right),$
to obtain the output signal 227. The output signal 227 can be represented as a sequence of sums of N periodic components given by

(51) $s_{bbs}\left(t\right)={.Math.}_{m=0}^{+}\left[{.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\right],$
where the truncated periodic components s.sub.Ik.sup.(i) (t) are related to the periodic components with amplitude A.sub.i, which are the sampled symbol of order k in the sequence of symbols of the input signal.

(52) In another embodiment, the amplifier and combiner circuitry 225 can include a set of N power amplifiers operable to amplify each truncated periodic component and a combining circuitry operable to combine, for each sampling interval, the set of amplified truncated periodic components to obtain the output signal 227 represented by

(53) $s_{qbbs}\left(t\right)={.Math.}_{i=1}^N{g}_a^i{C}_{I,\mathrm{ik}}\left[{.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)\right]={.Math.}_{m=0}^{+}\left[{.Math.}_{i=1}^N{g}_a^i{s}_{\mathrm{Ik}}\left(t\right)\right],$
with g.sub.a.sup.i denoting the gain of amplifier associated with periodic component with amplitude A.sub.i.

(54) In another embodiment, the amplifier and combiner circuitry 225 can include a set of N power amplifiers electrically coupled to a set of transducers.

(55) In another embodiment, the system 200b can receive the input signal 201-1 that includes the sequence of symbols of a baseband signal

(56) $S_{\mathrm{bb}}\left(t\right)={.Math.}_{k=0}^{+}{A}_{k}r\left(t-kT\right),$
where the symbols A.sub.k assume discrete values over a finite alphabet that is decomposed as a sum of N truncated periodic components obtained by repetition of a pulse p(t) with fixed amplitudes. Each symbol, A.sub.k is represented by

(57) $A_k={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i$
with where

(58) 0$C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array}$
and belongs to discrete and finite alphabets of values that can be decomposed as a sum of amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N}. The mapper circuitry 205 can decompose the amplitude A.sub.k based on a mapping table as a sum

(59) $A_k{.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(60) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N}, which are related to periodic components with the same amplitude. The mapper circuitry 205 can also compute the set of N coefficients C.sub.I,ik, which are output to the activation and time truncation circuitry 209 via the signals 206-{1, . . . , N}. The mapper circuitry 205 can also output to the periodic mapping component generator circuitry 207 via the signal 204-a the finite alphabets A.sub.i{A.sub.1, . . . , A.sub.N} to generate the periodic components 205-{1, . . . , N} represented by s.sub.I,T.sub.0.sup.(i)(t)=

(61) ${.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2n{f}_{0}t\right),$
where coefficients c.sub.I,n.sup.(i) are related to the periodic mapping components with amplitude A.sub.i. The activation and time truncation circuitry 209 can activate/deactivate and time truncate, based on the coefficients C.sub.I,ik obtained via the signals 206-{1, . . . , N} and the sampling pulse duration T.sub.s and pulse r(t), the set of periodic mapping components 208-{1, . . . , N} to obtain the set of N truncated periodic components 210-{1, . . . , N} represented by

(62) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right).$

(63) In FIGS. 2A and 2B, the mapping tables, the quantization and mapping rules can be stored in one or more LUT circuitry and the quantizer circuitry 203, mapper circuitry 205 or the generator circuitry 207 can be implemented in a single analog or digital circuitry block.

(64) FIG. 3 illustrates one embodiment of a system 300 of amplifying and combining a set of truncated bandpass signals in accordance with various aspects as described herein. In FIG. 3, the system 300 represents one embodiment of the amplifier and combiner circuitry 225 of FIGS. 2A and 2B. In FIG. 3, the system 300 can include a set of amplifiers 301-{1, . . . , N} and a combiner circuitry 303. The set of amplifiers 301-{1, . . . , N} can receive an active set of truncated periodic components 301-{1, . . . , N}, which correspond to the signals 210-{1, . . . , N.sub.=b} in FIGS. 2A and 2B, and can amplify the active set of truncated periodic components 301-{1, . . . , N} to obtain an active set of amplified truncated periodic components 302-{1, . . . , N}, represented by g.sub.a.sup.is.sub.k.sup.(i), where g.sub.a.sup.i denotes the amplifier gain of the amplifier associated with the i.sup.th component. The combiner circuitry 327 can combine the active set of amplified truncated periodic components 302-{1, . . . , N} to obtain the output signal 372, which represents the sum of the active set of NN truncated periodic mapping components.

(65) In another embodiment, the combiner circuitry 303 can include a set of combiners or a matching network.

(66) In another embodiment, the combiner circuitry 303 can include a set of transducers.

(67) FIGS. 4A-4B illustrate embodiments of a system 400a,b of performing a decomposition into a sum of a limited set of truncated bandpass signals in accordance with various aspects as described herein. In FIG. 4A, the system 400a can receive an input signal 401-1 having the time samples {tilde over (S)}.sub.s={tilde over (S)}(t.sub.s)={tilde over (S)}.sub.iks+jS.sub.Qks representing a complex envelope of a bandpass signal S.sub.bb(t), with amplitudes assuming any value within a certain dynamic range. In one example, the input signal 401-1 can be a baseband signal

(68) $S_{\mathrm{bb}}\left(t\right)={.Math.}_{k=0}^{+}{A}_{k}r\left(t-kT\right)+j{B}_{k}r\left(t-kT\right)={.Math.}_{k=0}^{+}{S}_{\mathrm{Ik}}r\left(t-\mathrm{kT}\right)+j{S}_{Qk}r\left(t-kT\right),$
which can be sampled by a sampling circuitry or a sample and hold circuitry 221 operable to generate the samples {tilde over (S)}.sub.s 402 represented by {tilde over (S)}.sub.s={tilde over (S)}(t.sub.s)=S.sub.iks+jS.sub.Qks. In another example, the input signal 401-1 can include the samples S.sub.Iks=E.sub.ks cos(a.sub.ks)=A.sub.ks and S.sub.Qks=E.sub.ks cos (a.sub.ks)=B.sub.ks representing the in-phase and quadrature-phase components, where

(69) $E_{ks}=\sqrt{S_{\mathrm{Iks}}^2+S_{Qks}^2}=\sqrt{A_{ks}^2+B_{ks}^2}$
and a.sub.ks=arctan (S.sub.Qks/S.sub.Iks), with the signal 401-1 corresponding to the signal 402. The system 400a can also be configured to receive input signal 401-3 associated with a clock reference having a fundamental frequency for the periodic components in which each sample is decomposed, an input signal 401-4 associated with an intermediate frequency f.sub.i, an input signal 401-5 associated with an RF carrier frequency f.sub.c.

(70) In FIG. 4A, a processing block circuitry PBC can include a first quantizer circuitry 403 and a mapper circuitry 405. The quantizer circuitry 403 operable to quantize a signal into a set of N bits can compute E.sub.ks, A.sub.ks and B.sub.ks and can quantize E.sub.ks or A.sub.ks and B.sub.ks to limit the set of possible values to alphabets with dimension of 2.sup.N values. The quantizer circuitry 403 can output, to a mapper circuitry 405, sets of quantization bits 404-{1, . . . , N} that represent the quantized values of A.sub.qks, B.sub.qks and E.sub.qks. The mapper circuitry 405 can decompose A.sub.qks as a sum

(71) $A_{qks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(72) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belongings to a finite alphabet A.sub.i {A.sub.1, . . . , A.sub.N} and related to periodic components with the same amplitude. Also, the mapper circuitry 405 can decompose the quantized value B.sub.qks as a sum

(73) $B_{qks}={.Math.}_{i=1}^N{C}_{Q,ik}{B}_i$
with

(74) 0$C_{Q,ik}=\{\begin{array}{c}1\\ 0\end{array}$
and amplitudes B.sub.i belonging to a finite alphabet B.sub.i{B.sub.1, . . . , B.sub.N} and can decompose the quantized value E.sub.qks of the sample amplitude E.sub.ks as

(75) $E_{qks}={.Math.}_{i=1}^N{C}_{\mathrm{ik}}{E}_i,$
with

(76) $C_{\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes E.sub.i belonging to a finite alphabet E.sub.i{E.sub.1, . . . , E.sub.N}. The mapper circuitry can further compute and output, to an activation and time truncation circuitry 409, the set of N coefficients C.sub.I,ik, C.sub.Q,ik and C.sub.ik 406-{1, . . . , N}. The mapper circuitry 405 can also output, to a periodic mapping component generator circuitry 407, the finite alphabets A.sub.i{A.sub.1, . . . , A.sub.N} 404-a, B.sub.i{B.sub.1, . . . , B.sub.N} 404-b and E.sub.i{E.sub.1, . . . , E.sub.N} 404-c to generate the periodic components 408-i{1, . . . , N.sub.b}, 408-q{1, . . . , N} in which each quantized amplitude of the in-phase and quadrature-phase components is decomposed as represented by

(77) $s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
and

(78) $s_{Q{T}_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{Q,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right),$
where coefficients c.sub.I,n.sup.(i) and c.sub.Q,n.sup.(i) are related to the periodic components with amplitude A.sub.i and B.sub.i, respectively. The mapper circuitry 405 can also output, to the periodic mapping component generator circuitry 407, signals M-{1, . . . , N} associated with quantization components and mapping coefficients to generate the periodic mapping components.

(79) In another embodiment, the periodic mapping component generator circuitry 407 can decompose E.sub.qks into a set of periodic mapping components 408-{1, . . . , N} represented by

(80) $s_{T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{E,n}^{\left(i\right)}$
exp(j2nf.sub.0t) with in-phase and quadrature-phase mapping components being generated based on

(81) $\cos \left({}_{ks}\right)s_{T_o}^{\left(i\right)}\left(t\right)$
and

(82) $\sin \left({}_{ks}\right)s_{T_o}^{\left(i\right)}\left(t\right).$

(83) In another embodiment, a second quantizer circuitry 423 can receive, from the first quantizer circuitry 403, the quantization error Q.sub.E to generate a quantized quantization error Q.sub.EQ for input to the mapper circuitry 405.

(84) In FIG. 4A, the activation and time truncation block 409 can active/deactivate and time truncate, based on the set of coefficients C.sub.I,ik, C.sub.Q,ik 406-{1, . . . , N}, the sampling pulse duration T.sub.s and the pulse r(t), the set of periodic components 408-i {1, . . . , N}, 408-q{1, . . . , N} to obtain the set of N truncated periodic components 410-i {1, . . . , N}, 410-q{1, . . . , N} represented by

(85) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right)$
and

(86) $s_{Qk}^{\left(i\right)}\left(t\right)=\left[C_{Q,ik}{s}_{Q{T}_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right),$
respectively.

(87) In another embodiment, for each sampling interval, the activation and time truncation circuitry 409 can generate the set of truncated components 410-{1, . . . , N} represented by

(88) 0$s_k^{\left(i\right)}\left(t\right)=\left[C_{ik}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right).$

(89) In another embodiment, the activation and time truncation circuitry 409 can activate, based on the coefficients C.sub.ik of 406-{1, . . . , N}, the sampling pulse duration T.sub.s and pulse r(t), the set of N time truncated periodic components 408-{1, . . . , N} to obtain the set of N truncated periodic components 410-{1, . . . , N} represented by

(90) $s_k^{\left(i\right)}\left(t\right)=\left[C_{\mathrm{ik}}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{\mathrm{ks}}}r\left(t-{\mathrm{mT}}_s\right).$

(91) In another embodiment, the mapper circuitry 405 can compute a set of N pairs of coefficients C.sub.I,ik, C.sub.Q,ik or the set of N coefficients C.sub.ik.

(92) In another embodiment, each of the first quantizer circuitry 403 and the mapper circuitry 405 can include a LUT circuitry configured to store different quantization and mapping rules to enable generation of different sets of periodic mapping components associated with different input signals.

(93) In another embodiment, the first quantizer circuitry 403, the mapper circuitry 405 and the generator circuitry 405 can be implemented in a single analog or digital circuitry block.

(94) In FIGS. 4A-4B, the system 400a,b can include a circuitry 425 having a set of upconverter circuitry, a set of DACs or mixers, a set of power DACs or amplifiers, a combiner circuitry 413 or matching network circuitry, transducers, or the like. As illustrated in FIG. 4A, the circuitry 425 includes a set of power DACs 411-{1, . . . , N}, a set of mixer circuitry 415-{1, . . . , N}, and a combiner circuitry 413. The set of power DACs 411-{1, . . . , N} can receive the active set of NN truncated periodic components 410-i {1, . . . , N}, 410-q{1, . . . , N} to obtain an active set of N truncated periodic components 412-{1, . . . , N} as represented by

(95) $s_k^{\left(i\right)}=g_a^i\left[s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right)\right],$
with g.sub.a.sup.i denoting the gain of the power DAC associated with the i.sup.th periodic component. The set of mixer circuitry 415-{1, . . . , N} can up-convert the active set of N truncated periodic components 412-{1, . . . , N} to obtain an active set of bandpass truncated periodic components at an RF carrier frequency f.sub.c. The combiner circuitry 413 can combine the active set of bandpass truncated periodic components 412-{1, . . . , N} at the RF carrier frequency f.sub.c to obtain an output signal 427. The mapping tables, the quantization rules, the mapping coefficients and the coefficients of the periodic components can be stored in a LUT circuitry, having different mapping and quantization rules and different sets of Fourier coefficients.

(96) In another embodiment, the activation and time truncation circuitry 409 can output, to the set of power DACs 411-{1, . . . , N}, the active set of truncated periodic components 410-i {1, . . . , N}, 410-q{1, . . . , N} to generate an active set of amplified truncated components at an intermediate frequency f.sub.i as

(97) $s_k^{\left(i\right)}=g_a^i\left[s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right)\right].$
Further, the set of mixer circuitry 415-{1, . . . , N} can up-convert active set of amplified truncated components at an intermediate frequency f.sub.i to generate the active set of bandpass truncated periodic components 412-{1, . . . , N} at the RF carrier frequency f.sub.c. The combiner circuitry 413 can combine the active set of bandpass truncated periodic components 412-{1, . . . , N} at the RF carrier frequency f.sub.c to obtain the output signal 427.

(98) In another embodiment, the circuitry 425 can include the combiner circuitry 413 or a matching impedance network circuitry operable to combine, after amplification, the active set of amplified truncated periodic components to generate, for each sample interval T.sub.s, the sum of the active set of amplified truncated periodic components

(99) $S_{\mathrm{Ik}}\left(t\right)={.Math.}_{i=1}^N{g}_a^i{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\mathrm{and}{S}_{Qk}\left(t\right)={.Math.}_{i=1}^N{g}_a^{\left(i\right)}{s}_{Qk}^{\left(i\right)}\left(t\right),$
that are combined, by the combiner circuitry 413, to obtain the output signal 427 as the sum of N amplified bandpass truncated periodic mapping components

(100) $s_{\mathrm{qbps}}={.Math.}_{i=1}^N{g}_a^i{s}_k^{\left(i\right)},$
with g.sub.a.sup.i the amplifier gain of the amplifier associated with the i.sup.th component, which is related to the periodic components with amplitude A.sub.i and B.sub.i, respectively. The output signal 427 can be represented by

(101) $s_{I,T_o}\left(t\right)$
and

(102) $s_{Q,T_o}\left(t\right)$
as

(103) $s_{\mathrm{qbps}}\left(t\right)={.Math.}_{m=0}^{+}{s}_{\mathrm{Ik}}^{\left(i\right)}-{.Math.}_{m=0}^{+}{s}_{Qk}^{\left(i\right)},$
where index k of sampled symbol changes over the sequence of samples.

(104) In FIG. 4B, the system 400b can receive the input signal 401-1 having time samples of a complex envelope with a finite set of amplitudes. In another example, the input signal 401-1 can be a signal

(105) $S_{\mathrm{bb}}\left(t\right)={.Math.}_{k=0}^{+}{A}_{k}r\left(t-kT\right)+j{B}_{k}r\left(t-kT\right)={.Math.}_{k=0}^{+}{S}_{\mathrm{Ik}}r\left(t-kT\right)+j{S}_{Qk}r\left(t-kT\right),$
which is sampled by the sampling circuitry or the sample and hold circuitry 221 to generate the samples of the complex envelope signal {tilde over (S)}.sub.s 402 represented by {tilde over (S)}.sub.s={tilde over (S)}(t.sub.s)=S.sub.iks+jS.sub.Qks. In another example, the input signal 401-1 can include the samples S.sub.Iks=E.sub.ks cos (a.sub.ks)=A.sub.ks and S.sub.Qks=E.sub.ks cos (a.sub.ks)=B.sub.ks of the in-phase and quadrature-phase components of a baseband signal, where

(106) 00$E_{ks}=\sqrt{S_{\mathrm{Iks}}^2+S_{Qks}^2}=\sqrt{A_{ks}^2+B_{ks}^2}$
and a.sub.ks=arctan (S.sub.Qks/S.sub.Iks), with the signal 401-1 corresponding to the signal 402. The system 400b can also be configured to receive the input signal 401-3 associated with a fundamental frequency of the periodic components in which each sample is decomposed. The system 400b can also be configured to receive input signals 401-4, 401-5 associated with an intermediate frequency f.sub.i and a carrier frequency f.sub.c, respectively.

(107) In the current embodiment, a processing block circuitry PBC can include a mapper circuitry 405 operable to compute E.sub.ks, A.sub.ks and B.sub.ks, decompose E.sub.ks or A.sub.ks and B.sub.ks based on a mapping table, with A.sub.ks being decomposed as a sum

(108) 01$A_{ks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(109) 02$C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N} and related to periodic components with the same amplitude. Also, the mapper circuitry 405 can decompose the computed value B.sub.ks as a sum

(110) 03$B_{ks}={.Math.}_{i=1}^N{C}_{Q,ik}{B}_i$
with

(111) 04$C_{Q,ik}=\{\begin{array}{c}1\\ 0\end{array}$
and amplitudes B.sub.i belonging to a finite alphabet B.sub.i{B.sub.1, . . . , B.sub.N} and can decompose the computed value E.sub.ks of the sample amplitude as

(112) 05$E_{ks}={.Math.}_{i=1}^N{C}_{ik}{E}_i,$
with

(113) 06$C_{\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes E.sub.i belonging to a finite alphabet E.sub.i{E.sub.1, . . . , E.sub.N}.

(114) In FIG. 4B, the mapper circuitry 405 can compute and output, to the activation and time truncation circuitry 409, sets of N coefficients C.sub.I,ik, C.sub.Q,ik and C.sub.ik 406-{1, . . . , N}. The mapper circuitry 405 can also output, to the periodic mapping component generator circuitry 407, the signals 404-a, 404-b, 404-c that respectively represents the finite alphabets A.sub.i{A.sub.1, . . . , A.sub.N}, B.sub.i{B.sub.1, . . . , B.sub.N} and E; E {E.sub.1, . . . , E.sub.N}, to generate the set of periodic mapping components 408-i{1, . . . , N}, 408-q{1, . . . , N} in which each quantized amplitude of the in-phase and quadrature-phase components is decomposed, represented by

(115) 07$s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
and

(116) 08$s_{Q{T}_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{Q,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right),$
where coefficients c.sub.I,n.sup.(i) and c.sub.Q,n.sup.(i) are related to the periodic components with amplitude A.sub.i and B.sub.i, respectively. The activation and time truncation circuitry 409 can activate and time truncate, based on the set of coefficients C.sub.I,ik, C.sub.Q,ik 406-{1, . . . , N}, the sampling pulse duration T.sub.s and the pulse r(t), the set of periodic components 408-i {1, . . . , N}, 408-q{1, . . . , N} and generate the N truncated versions 410-i{1, . . . , N}, 410-q{1, . . . , N} represented by

(117) 09$s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right)$
and

(118) 0$s_{Qk}^{\left(i\right)}\left(t\right)=\left[C_{Q,ik}{s}_{Q{T}_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right),$

(119) In another embodiment, the periodic mapping component generator circuitry 407 can decompose E.sub.qks into a set of periodic mapping components

(120) $408-\left\{1,.Math.,N\right\}{s}_{T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{E,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
and generate a set of in-phase and quadrature-phase mapping components based on

(121) $\cos \left({}_{ks}\right)s_{T_o}^{\left(i\right)}\left(t\right)$
and

(122) $\sin \left({}_{ks}\right)s_{T_o}^{\left(i\right)}\left(t\right).$

(123) In another embodiment, the activation and time truncation circuitry 409 can activate, based on the coefficients C.sub.ik 406-{1, . . . , N}, the sampling pulse duration T.sub.s and the pulse r(t), the set of N time truncated periodic components 408-{1, . . . , N} to obtain the active set of N truncated periodic components 410-{1, . . . , N} represented by

(124) $s_k^{\left(i\right)}\left(t\right)=\left[C_{ik}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right).$

(125) In another embodiment, the circuitry block 425 can include a set of power DACs 411-{1, . . . , N} operable to receive an active set of NN truncated periodic components 410-i{1, . . . , N}, 410-q{1, . . . , N} or 410-{1, . . . , N} to generate an active set of N amplified truncated periodic components 412-{1, . . . , N} represented by

(126) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right).$
The combiner circuitry 413 can combine the active set of N amplified truncated periodic components 412-{1, . . . , N} to obtain the output signal 427.

(127) In another embodiment, the set of truncated periodic mapping components 410-i{1, . . . , N}, 410-q{1, . . . , N} can be output to a set of DACs that up-convert the set of truncated periodic mapping components 410-i{1, . . . , N}, 410-q{1, . . . , N} to an intermediate frequency f.sub.i as represented by

(128) $s_{\mathrm{Ik}}^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)$
and

(129) $s_{Qk}^{\left(i\right)}=-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right).$
Further, a set of mixer circuitry 415-{1, . . . , N} can up-convert to the carrier frequency f.sub.c.

(130) In another embodiment, the mapper circuitry 405 and the generator 407 can be implemented in a single analog or digital circuitry block.

(131) In another embodiment, the circuitry block 425 can include the combiner circuitry 413 operable to combine the set of in-phase truncated periodic components, represented by

(132) $S_{\mathrm{Ik}}\left(t\right)={.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right),$
and combine the set of quadrature-phase truncated periodic components, represented by

(133) $S_{Qk}\left(t\right)={.Math.}_{i=1}^N{s}_{\mathrm{Qk}}^{\left(i\right)}\left(t\right),$
to generate, for each sample interval T.sub.s, the sum of the set of truncated periodic mapping components to obtain the output signal 427, represented as the sum of N bandpass truncated periodic mapping components

(134) 0$s_{\mathrm{qbps}}\left(t\right)={.Math.}_{i=1}^N{s}_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)-{.Math.}_{i=1}^N{s}_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right),$
with s.sub.Ik.sup.(i) (t) and s.sub.Qk.sup.(i) (t) truncated versions related to the periodic components with amplitude A.sub.i and B.sub.i, respectively. The output signal 427 can be expressed in terms

(135) $s_{I,T_o}\left(t\right)$
and

(136) $s_{Q,T_o}\left(t\right)$
as

(137) $s_{\mathrm{qbps}}\left(t\right)={.Math.}_{m=0}^{+}{s}_{\mathrm{Ik}}^{\left(i\right)}-{.Math.}_{m=0}^{+}{s}_{Qk}^{\left(i\right)},$
where index k of sampled symbol changes over the sequence of samples.

(138) FIGS. 5A-5D illustrate embodiments of a system 500a-d of amplifying and combining a set of truncated bandpass signals in accordance with various aspects as described herein. The systems 500a-d can represent exemplary embodiments of the circuitry 425 in FIGS. 4A and 4B. In FIG. 5A, the system 500a can receive a reference signal 500-1 having a carrier frequency f.sub.c. A set of DACs 501-{1, . . . , N} can receive an active set of N truncated periodic components 500-i{1, . . . , N}, 500-q{1, . . . , N} and can generate an active set of N bandpass truncated periodic components 502-{1, . . . , N} at the carrier frequency f.sub.c, as represented by

(139) $s_k^{\left(i\right)}=s_k^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right).$
The active set of N truncated periodic components 500-i{1, . . . , N}, 500-q{1, . . . , N} correspond to the signals 410-i{1, . . . , N}, 410-q{1, . . . , N} of FIGS. 4A and 4B. A set of amplifiers 507-{1, . . . , N} can amplify the active set of N bandpass truncated periodic components 502-{1, . . . , N} to obtain an active set of N amplified bandpass truncated periodic components 508-{1, . . . , N} at the carrier frequency f.sub.c, as represented by g.sub.a.sup.is.sub.k.sup.(i), where g.sub.a.sup.i denotes the amplifier gain of the amplifier associated with the i.sup.th component. A combiner circuitry or a matching impedance network 509 can combine the active set of N amplified bandpass truncated periodic components 508-{1, . . . , N} to obtain an output signal 527, which represents a sum of N bandpass truncated periodic mapping components

(140) $s_{qbps}={.Math.}_{i=1}^N{g}_a^i{s}_k^{\left(i\right)}.$

(141) In FIG. 5B, the system 500b can receive the reference signal 500-1 associated with an intermediate frequency f.sub.i and a reference signal 500-2 associated with the carrier frequency f.sub.c. A set of DACs 501-{1, . . . , N} can receive an active set of N truncated periodic components 500-i{1, . . . , N}, 500-q{1, . . . , N} and can generate an active set of N bandpass truncated periodic components 502-{1, . . . , N} at the intermediate frequency f.sub.i, as represented by

(142) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right).$
A set of mixers 505-{1, . . . , N} can up-convert these components 502-{1, . . . , N} to generate an active set of N bandpass truncated periodic components 506-{1, . . . , N} at the carrier frequency f.sub.c. A set of amplifiers 507-{1, . . . , N} can amplify the active set of N bandpass truncated periodic components 506-{1, . . . , N} to generate an active set of N amplified bandpass truncated periodic components 508-{1, . . . , N}, as represented by g.sub.a.sup.is.sub.k.sup.(i), where g.sub.a.sup.i denotes the amplifier gain of the amplifier associated with the i.sup.th component. A combiner circuitry 509 can combine the active set of N amplified bandpass truncated periodic components 508-{1, . . . , N} to obtain an output signal 527, which represents the sum of N active amplified bandpass truncated periodic mapping components.

(143) In FIG. 5C, the system 500c can receive the reference signal 500-1 associated with the carrier frequency f.sub.c. A set of mixers 501-i{1, . . . , N}, 501-q{1, . . . , N} can receive an active set of N truncated periodic components 500-i{1, . . . , N}, 500-q{1, . . . , N} and can multiply these components 500-i{1, . . . , N}, 500-q{1, . . . , N} by both cos (2f.sub.ct) and sin (2f.sub.ct) to generate an active set of N bandpass truncated periodic components 502-i{1, . . . , N}, 502-q{1, . . . , N} at the carrier frequency f.sub.c, as represented by

(144) $s_{\mathrm{Ik}}^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)$
and

(145) $s_{Qk}^{\left(i\right)}=-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right).$
The signals 500-i{1, . . . , N}, 500-q{1, . . . , N} correspond to the signals 410-i{1, . . . , N}, 410-q{1, . . . , N} of FIGS. 4A and 4B. A set of adder circuitry 503-{1, . . . , N} can sum each pair of in-phase and quadrature-phase components 502-i{1, . . . , N}, 502-q{1, . . . , N} to obtain an active set of N bandpass truncated periodic components 504-{1, . . . , N} at the carrier frequency f.sub.c, as represented by

(146) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{}+s_{Qk}^{\left(i\right)}.$
set of amplifiers 507-{1, . . . , N} can amplify each component 504-{1, . . . , N} to generate an active set of N bandpass truncated periodic components 508-{1, . . . , N} at the carrier frequency f.sub.c. Further, a combiner circuitry or a matching impedance network 507 can combine the amplified components 508-{1, . . . , N}, as represented by g.sub.a.sup.is.sub.k.sup.(i) where g.sub.a.sup.i denotes the amplifier gain of the amplifier associated with the i.sup.th component, to generate an output signal 527, as represented by the sum of N active bandpass truncated periodic mapping components, given by

(147) 0$s_{qbps}={.Math.}_{i=1}^N{g}_a^i{s}_k^{\left(i\right)}.$

(148) In FIG. 5D, the system 500d can receive the reference signal 500-1 associated with the intermediate frequency f; and the reference signal 501-2 associated with the carrier frequency f.sub.c. A set of mixers 501-i{1, . . . , N}, 501-q{1, . . . , N} can receive an active set of N truncated periodic components 500-i{1, . . . , N}, 500-q{1, . . . , N} and can multiply these components 500-i{1, . . . , N}, 500-q{1, . . . , N} by cos (2f.sub.it) and sin (2f.sub.it) to generate an active set of N bandpass truncated periodic components 502-i{1, . . . , N}, 502-q{1, . . . , N} at the intermediate frequency ft. The signals 500-i{1, . . . , N}, 500-q{1, . . . , N} correspond to the signals 410-i{1, . . . , Np}, 410-q{1, . . . , N} of FIGS. 4A and 4B. A set of adder circuitry 503-{1, . . . , N} can combine each pair of in-phase and quadrature phase components 502-i{1, . . . , N}, 502-q{1, . . . , N} to generate an active set of N bandpass truncated periodic components 504-{1, . . . , N} at the intermediate frequency f.sub.i, as represented by

(149) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right).$
A set of mixers 505-{1, . . . , N} can upconvert the components 504-{1, . . . , N} to generate an active set of N bandpass truncated periodic components 506-{1, . . . , N} at the carrier frequency f.sub.c. A set of amplifiers 507-{1, . . . , N} can amplify the component 506-{1, . . . , N} to generate an active set of N amplified bandpass truncated periodic components 508-{1, . . . , N} at the carrier frequency f.sub.c. A combiner circuitry 509 can combine the outputs of the set of amplifiers 507-{1, . . . , N} to obtain the output signal 527, as represented by the sum of N bandpass truncated periodic mapping components.

(150) In another embodiment, the set of amplifiers can be electrically coupled to a set of transducers.

(151) Although the subject matter described herein may be implemented in any appropriate type of system using any suitable components, the embodiments disclosed herein may also be described in relation to a wireless network, such as the example wireless network illustrated in FIG. 6. For simplicity, the wireless network of FIG. 6 only depicts network 606, network nodes 660 and 660b, and wireless devices 610, 610b, and 610c. In practice, a wireless network may further include any additional elements suitable to support communication between wireless devices or between a wireless device and another communication device, such as a landline telephone, a service provider, or any other network node or end device. Of the illustrated components, network node 660 and wireless device 610 are depicted with additional detail. The wireless network may provide communication and other types of services to one or more wireless devices to facilitate the wireless devices' access to and/or use of the services provided by, or via, the wireless network.

(152) The wireless network may comprise and/or interface with any type of communication, telecommunication, data, cellular, and/or radio network or other similar type of system. In some embodiments, the wireless network may be configured to operate according to specific standards or other types of predefined rules or procedures. Thus, particular embodiments of the wireless network may implement communication standards, such as Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Long Term Evolution (LTE), Narrowband Internet of Things (NB-IoT), and/or other suitable 2G, 3G, 4G, 5G, 6G standards; wireless local area network (WLAN) standards, such as the IEEE 602.11 standards; and/or any other appropriate wireless communication standard, such as the Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, Z-Wave and/or ZigBee standards.

(153) Network 606 may comprise one or more backhaul networks, core networks, Internet Protocol (IP) networks, public switched telephone networks (PSTNs), packet data networks, optical networks, wide-area networks (WANs), local area networks (LANs), wireless local area networks (WLANs), wired networks, wireless networks, metropolitan area networks, and other networks to enable communication between devices.

(154) Network node 660 and wireless device 610 comprise various components described in more detail below. These components work together to provide network node and/or wireless device functionality, such as providing wireless connections in a wireless network. In different embodiments, the wireless network may comprise any number of wired or wireless networks, network nodes, base stations, controllers, wireless devices, relay stations, and/or any other components or systems that may facilitate or participate in the communication of data and/or signals whether via wired or wireless connections.

(155) As used herein, network node refers to equipment capable, configured, arranged and/or operable to communicate directly or indirectly with a wireless device and/or with other network nodes or equipment in the wireless network to enable and/or provide wireless access to the wireless device and/or to perform other functions (e.g., administration) in the wireless network. Examples of network nodes include, but are not limited to, access points (APs) (e.g., radio access points), base stations (BSs) (e.g., radio base stations, Node Bs, evolved Node Bs (eNBs), and NR NodeBs (gNBs)). Base stations may be categorized based on the amount of coverage they provide (or, stated differently, their transmit power level) and may then also be referred to as femto base stations, pico base stations, micro base stations, or macro base stations. A base station may be a relay node or a relay donor node controlling a relay. A network node may also include one or more (or all) parts of a distributed radio base station such as centralized digital units and/or remote radio units (RRUs), sometimes referred to as Remote Radio Heads (RRHs). Such remote radio units may or may not be integrated with an antenna as an antenna integrated radio. Parts of a distributed radio base station may also be referred to as nodes in a distributed antenna system (DAS). Yet further examples of network nodes include multi-standard radio (MSR) equipment such as MSR BSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes, multi-cell/multicast coordination entities (MCEs), core network nodes (e.g., MSCs, MMEs), O&M nodes, OSS nodes, SON nodes, positioning nodes (e.g., E-SMLCs), and/or MDTs. As another example, a network node may be a virtual network node as described in more detail below. More generally, however, network nodes may represent any suitable device (or group of devices) capable, configured, arranged, and/or operable to enable and/or provide a wireless device with access to the wireless network or to provide some service to a wireless device that has accessed the wireless network.

(156) In FIG. 6, network node 660 includes processing circuitry 670, device readable medium 680, interface 690, auxiliary equipment 654, power source 656, power circuitry 657, and antenna 662. Although network node 660 illustrated in the example wireless network of FIG. 6 may represent a device that includes the illustrated combination of hardware components, other embodiments may comprise network nodes with different combinations of components. It is to be understood that a network node comprises any suitable combination of hardware and/or software to perform the tasks, features, functions and methods disclosed herein. Moreover, while the components of network node 660 are depicted as single boxes located within a larger box, or nested within multiple boxes, in practice, a network node may comprise multiple different physical components that make up a single illustrated component (e.g., device readable medium 680 may comprise multiple separate hard drives as well as multiple random access memory (RAM) modules).

(157) Similarly, network node 660 may be composed of multiple physically separate components (e.g., a NodeB component and a radio network controller (RNC) component, or a BTS component and a BSC component, etc.), which may each have their own respective components. In certain scenarios in which network node 660 comprises multiple separate components (e.g., BTS and BSC components), one or more of the separate components may be shared among several network nodes. For example, a single RNC may control multiple NodeB's. In such a scenario, each unique NodeB and RNC pair, may in some instances be considered a single separate network node. In some embodiments, network node 660 may be configured to support multiple radio access technologies (RATs). In such embodiments, some components may be duplicated (e.g., separate device readable medium 680 for the different RATs) and some components may be reused (e.g., the same antenna 662 may be shared by the RATs). Network node 660 may also include multiple sets of the various illustrated components for different wireless technologies integrated into network node 660, such as, for example, GSM, code division multiple access (CDMA), wideband code division multiple access (WCDMA), LTE, NR, Wi-Fi, or Bluetooth wireless technologies. These wireless technologies may be integrated into the same or different chip or set of chips and other components within network node 660.

(158) Processing circuitry 670 is configured to perform any determining, calculating, or similar operations (e.g., certain obtaining operations) described herein as being provided by a network node. These operations performed by processing circuitry 670 may include processing information obtained by processing circuitry 670 by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored in the network node, and/or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination.

(159) Processing circuitry 670 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, digital signal processor (DSP), application-specific integrated circuitry (ASIC), field-programmable gate array (FPGA), or any other suitable computing device, resource, or combination of hardware, software and/or encoded logic operable to provide, either alone or in conjunction with other network node 660 components, such as device readable medium 680, network node 660 functionality. For example, processing circuitry 670 may execute instructions stored in device readable medium 680 or in memory within processing circuitry 670. Such functionality may include providing any of the various wireless features, functions, or benefits discussed herein. In some embodiments, processing circuitry 670 may include a system on a chip (SOC).

(160) In some embodiments, processing circuitry 670 may include one or more of RF transceiver circuitry 672 and baseband processing circuitry 674. In some embodiments, RF transceiver circuitry 672 and baseband processing circuitry 674 may be on separate chips (or sets of chips), boards, or units, such as radio units and digital units. In alternative embodiments, part or all of RF transceiver circuitry 672 and baseband processing circuitry 674 may be on the same chip or set of chips, boards, or units. The embodiments described by this disclosure can be implemented for the network node 660 in the interface 690 and/or the processing circuitry 670. Further, the embodiments described by this disclosure can be implemented for the wireless device or user equipment 610 in the interface 614 and/or the processing circuitry 620.

(161) In certain embodiments, some or all of the functionality described herein as being provided by a network node, base station, eNB or other such network device may be performed by processing circuitry 670 executing instructions stored on device readable medium 680 or memory within processing circuitry 670. In alternative embodiments, some or all of the functionalities may be provided by processing circuitry 670 without executing instructions stored on a separate or discrete device readable medium, such as in a hard-wired manner. In any of those embodiments, whether executing instructions stored on a device readable storage medium or not, processing circuitry 670 may be configured to perform the described functionality. The benefits provided by such functionality are not limited to processing circuitry 670 alone or to other components of network node 660 but are enjoyed by network node 660 as a whole, and/or by end users and the wireless network generally.

(162) Device readable medium 680 may comprise any form of volatile or non-volatile computer readable memory including, without limitation, persistent storage, solid-state memory, remotely mounted memory, magnetic media, optical media, RAM, read-only memory (ROM), mass storage media (for example, a hard disk), removable storage media (for example, a flash drive, a Compact Disk (CD) or a Digital Video Disk (DVD)), and/or any other volatile or non-volatile, non-transitory device readable and/or computer-executable memory devices that store information, data, and/or instructions that may be used by processing circuitry 670. Device readable medium 680 may store any suitable instructions, data or information, including a computer program, software, an application including one or more of logic, rules, code, tables, etc. and/or other instructions capable of being executed by processing circuitry 670 and, utilized by network node 660. Device readable medium 680 may be used to store any calculations made by processing circuitry 670 and/or any data received via interface 690. In some embodiments, processing circuitry 670 and device readable medium 680 may be integrated.

(163) Interface 690 is used in the wired or wireless communication of signaling and/or data between network node 660, network 606, and/or wireless devices 610, 410b, 610c. As illustrated, interface 690 comprises port(s)/terminal(s) 694 to send and receive data, for example to and from network 606 over a wired connection. Interface 690 also includes radio front end circuitry 692 that may be coupled to, or in certain embodiments a part of, antenna 662. Radio front end circuitry 692 comprises filters 698 and amplifiers 696. Radio front end circuitry 692 may be connected to antenna 662 and processing circuitry 670. Radio front end circuitry may be configured to condition signals communicated between antenna 662 and processing circuitry 670. Radio front end circuitry 692 may receive digital data that is to be sent out to other network nodes or wireless devices via a wireless connection. Radio front end circuitry 692 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters 698 and/or amplifiers 696. The radio signal may then be transmitted via antenna 662. Similarly, when receiving data, antenna 662 may collect radio signals which are then converted into digital data by radio front end circuitry 692. The digital data may be passed to processing circuitry 670. In other embodiments, the interface may comprise different components and/or different combinations of components.

(164) In certain alternative embodiments, network node 660 may not include separate radio front end circuitry 692, instead, processing circuitry 670 may comprise radio front end circuitry and may be connected to antenna 662 without separate radio front end circuitry 692. Similarly, in some embodiments, all or some of RF transceiver circuitry 672 may be considered a part of interface 690. In still other embodiments, interface 690 may include one or more ports or terminals 694, radio front end circuitry 692, and RF transceiver circuitry 672, as part of a radio unit (not shown), and interface 690 may communicate with baseband processing circuitry 674, which is part of a digital unit (not shown).

(165) Antenna 662 may include one or more antennas, or antenna arrays, configured to send and/or receive wireless signals. Antenna 662 may be coupled to radio front end circuitry 690 and may be any type of antenna capable of transmitting and receiving data and/or signals wirelessly. In some embodiments, antenna 662 may comprise one or more omni-directional, sector or panel antennas operable to transmit/receive radio signals between, for example, 2 GHz and 66 GHZ. An omni-directional antenna may be used to transmit/receive radio signals in any direction, a sector antenna may be used to transmit/receive radio signals from devices within a particular area, and a panel antenna may be a line-of-sight antenna used to transmit/receive radio signals in a relatively straight line. In some instances, the use of more than one antenna may be referred to as multiple-input multiple-output (MIMO). In certain embodiments, antenna 662 may be separate from network node 660 and may be connectable to network node 660 through an interface or port.

(166) Antenna 662, interface 690, and/or processing circuitry 670 may be configured to perform any receiving operations and/or certain obtaining operations described herein as being performed by a network node. Any information, data and/or signals may be received from a wireless device, another network node and/or any other network equipment. Similarly, antenna 662, interface 690, and/or processing circuitry 670 may be configured to perform any transmitting operations described herein as being performed by a network node. Any information, data and/or signals may be transmitted to a wireless device, another network node and/or any other network equipment.

(167) Power circuitry 687 may comprise, or be coupled to, power management circuitry and is configured to supply the components of network node 660 with power for performing the functionality described herein. Power circuitry 687 may receive power from power source 686. Power source 686 and/or power circuitry 687 may be configured to provide power to the various components of network node 660 in a form suitable for the respective components (e.g., at a voltage and current level for each respective component). Power source 686 may either be included in, or external to, power circuitry 687 and/or network node 660. For example, network node 660 may be connectable to an external power source (e.g., an electricity outlet) via an input circuitry or interface such as an electrical cable, whereby the external power source supplies power to power circuitry 687. As a further example, power source 686 may comprise a source of power in the form of a battery or battery pack which is connected to, or integrated in, power circuitry 687. The battery may provide backup power should the external power source fail. Other types of power sources, such as photovoltaic devices, may also be used.

(168) Alternative embodiments of network node 660 may include additional components beyond those shown in FIG. 6 that may be responsible for providing certain aspects of the network node's functionality, including any of the functionality described herein and/or any functionality necessary to support the subject matter described herein. For example, network node 660 may include user interface equipment to allow input of information into network node 660 and to allow output of information from network node 660. This may allow a user to perform diagnostic, maintenance, repair, and other administrative functions for network node 660.

(169) As used herein, wireless device refers to a device capable, configured, arranged and/or operable to communicate wirelessly with network nodes and/or other wireless devices. Unless otherwise noted, the term wireless device may be used interchangeably herein with user equipment (UE). Communicating wirelessly may involve transmitting and/or receiving wireless signals using electromagnetic waves, radio waves, infrared waves, and/or other types of signals suitable for conveying information through air. In some embodiments, a wireless device may be configured to transmit and/or receive information without direct human interaction. For instance, a wireless device may be designed to transmit information to a network on a predetermined schedule, when triggered by an internal or external event, or in response to requests from the network. Examples of a wireless device include, but are not limited to, a smart phone, a mobile phone, a cell phone, a voice over IP (VOIP) phone, a wireless local loop phone, a desktop computer, a personal digital assistant (PDA), a wireless cameras, a gaming console or device, a music storage device, a playback appliance, a wearable terminal device, a wireless endpoint, a mobile station, a tablet, a laptop, a laptop-embedded equipment (LEE), a laptop-mounted equipment (LME), a smart device, a wireless customer-premise equipment (CPE). a vehicle-mounted wireless terminal device, etc. A wireless device may support device-to-device (D2D) communication, for example by implementing a 3rd Generation Partnership Project (3GPP) standard for sidelink communication, vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-everything (V2X) and may in this case be referred to as a D2D communication device. As yet another specific example, in an Internet of Things (IoT) scenario, a wireless device may represent a machine or other device that performs monitoring and/or measurements and transmits the results of such monitoring and/or measurements to another wireless device and/or a network node. The wireless device may in this case be a machine-to-machine (M2M) device, which may in a 3GPP context be referred to as an MTC device. As one example, the wireless device may be a UE implementing the 3GPP narrow band internet of things (NB-IoT) standard. Examples of such machines or devices are sensors, metering devices such as power meters, industrial machinery, or home or personal appliances (e.g. refrigerators, televisions, etc.) personal wearables (e.g., watches, fitness trackers, etc.). In other scenarios, a wireless device may represent a vehicle or other equipment that is capable of monitoring and/or reporting on its operational status or other functions associated with its operation. A wireless device as described above may represent the endpoint of a wireless connection, in which case the device may be referred to as a wireless terminal. Furthermore, a wireless device as described above may be mobile, in which case it may also be referred to as a mobile device or a mobile terminal.

(170) As illustrated, wireless device 610 includes antenna 611, interface 614, processing circuitry 620, device readable medium 630, user interface equipment 632, auxiliary equipment 634, power source 636 and power circuitry 637. Wireless device 610 may include multiple sets of one or more of the illustrated components for different wireless technologies supported by wireless device 610, such as, for example, GSM, WCDMA, LTE, NR, Wi-Fi, WiMAX, NB-IoT, or Bluetooth wireless technologies, just to mention a few. These wireless technologies may be integrated into the same or different chips or set of chips as other components within wireless device 610.

(171) Antenna 611 may include one or more antennas or antenna arrays, configured to send and/or receive wireless signals, and is connected to interface 614. In certain alternative embodiments, antenna 611 may be separate from wireless device 610 and be connectable to wireless device 610 through an interface or port. Antenna 611, interface 614, and/or processing circuitry 620 may be configured to perform any receiving or transmitting operations described herein as being performed by a wireless device. Any information, data and/or signals may be received from a network node and/or another wireless device. In some embodiments, radio front end circuitry and/or antenna 611 may be considered an interface.

(172) As illustrated, interface 614 comprises radio front end circuitry 612 and antenna 611. Radio front end circuitry 612 comprises one or more filters 618 and amplifiers 616. Radio front end circuitry 612 is connected to antenna 611 and processing circuitry 620 and is configured to condition signals communicated between antenna 611 and processing circuitry 620. Radio front end circuitry 612 may be coupled to or a part of antenna 611. In some embodiments, wireless device 610 may not include separate radio front end circuitry 612; rather, processing circuitry 620 may comprise radio front end circuitry and may be connected to antenna 611. Similarly, in some embodiments, some or all of RF transceiver circuitry 622 may be considered a part of interface 614. Radio front end circuitry 612 may receive digital data that is to be sent out to other network nodes or wireless devices via a wireless connection. Radio front end circuitry 612 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters 618 and/or amplifiers 616. The radio signal may then be transmitted via antenna 611. Similarly, when receiving data, antenna 611 may collect radio signals which are then converted into digital data by radio front end circuitry 612. The digital data may be passed to processing circuitry 620. In other embodiments, the interface may comprise different components and/or different combinations of components.

(173) Processing circuitry 620 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, DSP, ASIC, FPGA, or any other suitable computing device, resource, or combination of hardware, software, and/or encoded logic operable to provide, either alone or in conjunction with other wireless device 610 components, such as device readable medium 630, wireless device 610 functionality. Such functionality may include providing any of the various wireless features or benefits discussed herein. For example, processing circuitry 620 may execute instructions stored in device readable medium 630 or in memory within processing circuitry 620 to provide the functionality disclosed herein.

(174) As illustrated, processing circuitry 620 includes one or more RF transceiver circuitry 622, baseband processing circuitry 624, and application processing circuitry 626. In other embodiments, the processing circuitry may comprise different components and/or different combinations of components. In certain embodiments processing circuitry 620 of wireless device 610 may comprise a SOC. In some embodiments, RF transceiver circuitry 622, baseband processing circuitry 624, and application processing circuitry 626 may be on separate chips or sets of chips. In alternative embodiments, part or all of baseband processing circuitry 624 and application processing circuitry 626 may be combined into one chip or set of chips, and RF transceiver circuitry 622 may be on a separate chip or set of chips. In still alternative embodiments, part or all of RF transceiver circuitry 622 and baseband processing circuitry 624 may be on the same chip or set of chips, and application processing circuitry 626 may be on a separate chip or set of chips. In yet other alternative embodiments, part or all of RF transceiver circuitry 622, baseband processing circuitry 624, and application processing circuitry 626 may be combined in the same chip or set of chips. In some embodiments, RF transceiver circuitry 622 may be a part of interface 614. RF transceiver circuitry 622 may condition RF signals for processing circuitry 620.

(175) In certain embodiments, some or all of the functionality described herein as being performed by a wireless device may be provided by processing circuitry 620 executing instructions stored on device readable medium 630, which in certain embodiments may be a computer-readable storage medium. In alternative embodiments, some or all of the functionalities may be provided by processing circuitry 620 without executing instructions stored on a separate or discrete device readable storage medium, such as in a hard-wired manner. In any of those embodiments, whether executing instructions stored on a device readable storage medium or not, processing circuitry 620 may be configured to perform the described functionality. The benefits provided by such functionality are not limited to processing circuitry 620 alone or to other components of wireless device 610 but are enjoyed by wireless device 610 as a whole, and/or by end users and the wireless network generally.

(176) Processing circuitry 620 may be configured to perform any determining, calculating, or similar operations (e.g., certain obtaining operations) described herein as being performed by a wireless device. These operations, as performed by processing circuitry 620, may include processing information obtained by processing circuitry 620 by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored by wireless device 610, and/or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination.

(177) Device readable medium 630 may be operable to store a computer program, software, an application including one or more of logic, rules, code, tables, etc. and/or other instructions capable of being executed by processing circuitry 620. Device readable medium 630 may include computer memory (e.g., RAM or ROM), mass storage media (e.g., a hard disk), removable storage media (e.g., CD, DVD), and/or any other volatile or non-volatile, non-transitory device readable and/or computer executable memory devices that store information, data, and/or instructions that may be used by processing circuitry 620. In some embodiments, processing circuitry 620 and device readable medium 630 may be integrated.

(178) User interface equipment 632 may provide components that allow for a human user to interact with wireless device 610. Such interaction may be of many forms, such as visual, audial, tactile, etc. User interface equipment 632 may be operable to produce output to the user and to allow the user to provide input to wireless device 610. The type of interaction may vary depending on the type of user interface equipment 632 installed in wireless device 610. For example, if wireless device 610 is a smart phone, the interaction may be via a touch screen; if wireless device 610 is a smart meter, the interaction may be through a screen that provides usage (e.g., the number of gallons used) or a speaker that provides an audible alert (e.g., if smoke is detected). User interface equipment 632 may include input interfaces, devices and circuits, and output interfaces, devices and circuits. User interface equipment 632 is configured to allow input of information into wireless device 610 and is connected to processing circuitry 620 to allow processing circuitry 620 to process the input information. User interface equipment 632 may include, for example, a microphone, a proximity or other sensor, keys/buttons, a touch display, one or more cameras, a USB port, or other input circuitry. User interface equipment 632 is also configured to allow output of information from wireless device 610, and to allow processing circuitry 620 to output information from wireless device 610. User interface equipment 632 may include, for example, a speaker, a display, vibrating circuitry, a USB port, a headphone interface, or other output circuitry. Using one or more input and output interfaces, devices, and circuits, of user interface equipment 632, wireless device 610 may communicate with end users and/or the wireless network and allow them to benefit from the functionality described herein.

(179) Auxiliary equipment 634 is operable to provide more specific functionality which may not be generally performed by wireless devices. This may comprise specialized sensors for performing measurements for various purposes, interfaces for additional types of communication such as wired communications etc. The inclusion and type of components of auxiliary equipment 634 may vary depending on the embodiment and/or scenario.

(180) Power source 636 may, in some embodiments, be in the form of a battery or battery pack. Other types of power sources, such as an external power source (e.g., an electricity outlet), photovoltaic devices or power cells, may also be used. The wireless device 610 may further comprise power circuitry 637 for delivering power from power source 636 to the various parts of wireless device 610 which need power from power source 636 to carry out any functionality described or indicated herein. Power circuitry 637 may in certain embodiments comprise power management circuitry. Power circuitry 637 may additionally or alternatively be operable to receive power from an external power source; in which case wireless device 610 may be connectable to the external power source (such as an electricity outlet) via input circuitry or an interface such as an electrical power cable. Power circuitry 637 may also, in certain embodiments, be operable to deliver power from an external power source to power source 636. This may be, for example, for the charging of power source 636. Power circuitry 637 may perform any formatting, converting, or other modification to the power from power source 636 to make the power suitable for the respective components of wireless device 610 to which power is supplied.

(181) FIG. 7 illustrates one embodiment of an electronic device 700 in accordance with various aspects described herein. As used herein, device 700 can be a wired device, wireless device or both. Further, device 700 may not necessarily have a user in the sense of a human user who owns and/or operates the relevant device. Instead, device 700 may represent a device that is intended for sale to, or operation by, a human user but which may not, or which may not initially, be associated with a specific human user (e.g., a smart sprinkler controller, IoT device). Alternatively, device 700 may represent a device that is not intended for sale to, or operation by, an end user but which may be associated with or operated for the benefit of a user (e.g., a smart power meter). Device 700 may be UE identified by the 3GPP, including a NB-IoT UE, a machine type communication (MTC) UE, and/or an enhanced MTC (eMTC) UE. Device 700, as illustrated in FIG. 7, is one example of a device configured for wired or wireless communication in accordance with one or more communication standards such as promulgated by the 3GPP, such as 3GPP's GSM, UMTS, LTE, and/or 5G standards.

(182) Device 700 can include any electronic device that has an amplifier. In one example, device 700 can include an audio or music device, home audio system, stereo amplifier, audio or video receiver, home theater system, powered speaker, subwoofer, karaoke machine, musical equipment, guitar amplifier, bass amplifier, keyboard amplifier, public address system, studio monitor, headphone or earbud, noise-canceling headphone, portable audio device, Bluetooth speaker, portable amplifier for headphones or instrument, or the like. In another example, device 700 can include a wireless device, user equipment, network node, base station, broadcast or communication device, radio transmitter, wireless communication equipment, satellite communication system, Wi-Fi router, extended range device, telecommunication device, microwave repeater, radar system, or the like. In yet another example, device 700 can include consumer electronics, televisions, internal audio amplifier for a speaker, external soundbar with built-in amplifier, computer or gaming device, sound card with integrated amplifier, DAC with amplifier, smartphone, tablet, built-in audio amplifier for speaker or headphone, or the like. In yet another example, device 700 can include automotive or transportation device, car audio system, car amplifier, subwoofer amplifier, marine audio system, amplifier for boat or watercraft, aircraft communication system, amplifier for cockpit communication or in-flight entertainment, or the like. In yet another example, device 700 can include industrial and professional equipment, public address system, amplifier for a large venue, school or stadium, concert or event equipment, power amplifier for a loudspeaker, line array system, medical equipment, ultrasound machine, hearing aids, or the like. In yet another example, device 700 can include RF or specialized equipment, RF amplifier, signal booster for a cell tower, satellite uplink or downlink device, test or measurement instrument, oscilloscope, spectrum analyzer, military or aerospace equipment, radar system, communication jammer, or the like. In yet another example, device 700 can include toy or hobby device, radio-controlled car, plane or drone, smart home device, smart speaker, voice assistant device, or the like.

(183) In FIG. 7, device 700 includes processing circuitry 701 that is operatively coupled to input/output interface 705, RF interface 709, network connection interface 711, memory 715 including RAM 717, ROM 719, and storage medium 721 or the like, communication subsystem 731, power source 713, and/or any other component, or any combination thereof. Storage medium 721 includes operating system 723, application program 725, and data 727. In other embodiments, storage medium 721 may include other similar types of information. Certain electronic devices may utilize all of the components shown in FIG. 7, or only a subset of the components. The level of integration between the components may vary from one device to another device. Further, certain electronic devices may contain multiple instances of a component, such as multiple processors, memories, transceivers, transmitters, receivers, etc.

(184) In FIG. 7, processing circuitry 701 may be configured to process computer instructions and data. Processing circuitry 701 may be configured to implement any sequential state machine operative to execute machine instructions stored as machine-readable computer programs in the memory, such as one or more hardware-implemented state machines (e.g., in discrete logic, FPGA, ASIC, etc.); programmable logic together with appropriate firmware; one or more stored program, general-purpose processors, such as a microprocessor or DSP, together with appropriate software; or any combination of the above. For example, the processing circuitry 701 may include two central processing units (CPUs). Data may be information in a form suitable for use by a computer.

(185) In the depicted embodiment, input/output interface 705 may be configured to provide a communication interface to an input device, output device, or input and output device. Device 700 may be configured to use an output device via input/output interface 705. An output device may use the same type of interface port as an input device. For example, a USB port may be used to provide input to and output from device 700. The output device may be a speaker, a sound card, a video card, a display, a monitor, a printer, an actuator, an emitter, a smartcard, another output device, or any combination thereof. Device 700 may be configured to use an input device via input/output interface 705 to allow a user to capture information into device 700. The input device may include a touch-sensitive or presence-sensitive display, a camera (e.g., a digital camera, a digital video camera, a web camera, etc.), a microphone, a sensor, a mouse, a trackball, a directional pad, a trackpad, a scroll wheel, a smartcard, and the like. The presence-sensitive display may include a capacitive or resistive touch sensor to sense input from a user. A sensor may be, for instance, an accelerometer, a gyroscope, a tilt sensor, a force sensor, a magnetometer, an optical sensor, a proximity sensor, another like sensor, or any combination thereof. For example, the input device may be an accelerometer, a magnetometer, a digital camera, a microphone, or an optical sensor.

(186) In FIG. 7, RF interface 709 may be configured to provide a communication interface to RF components such as a transmitter, a receiver, and an antenna. Network connection interface 711 may be configured to provide a communication interface to network 743a. Network 743a may encompass wired and/or wireless networks such as a local-area network (LAN), a wide-area network (WAN), a computer network, a wireless network, a telecommunications network, another like network or any combination thereof. For example, network 743a may comprise a Wi-Fi network. Network connection interface 711 may be configured to include a receiver and a transmitter interface used to communicate with one or more other devices over a communication network according to one or more communication protocols, such as Ethernet, TCP/IP, synchronous optical networking (SONET), asynchronous transfer mode (ATM), or the like. Network connection interface 711 may implement receiver and transmitter functionality appropriate to the communication network links (e.g., optical, electrical, and the like). The transmitter and receiver functions may share circuitry components, software or firmware, or alternatively may be implemented separately.

(187) RAM 717 may be configured to interface via bus 702 to processing circuitry 701 to provide storage or caching of data or computer instructions during the execution of software programs such as the operating system, application programs, and device drivers. ROM 719 may be configured to provide computer instructions or data to processing circuitry 701. For example, ROM 719 may be configured to store invariant low-level system code or data for basic system functions such as basic input and output (I/O), startup, or reception of keystrokes from a keyboard that are stored in a non-volatile memory. Storage medium 721 may be configured to include memory such as RAM, ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), magnetic disks, optical disks, floppy disks, hard disks, removable cartridges, or flash drives. In one example, storage medium 721 may be configured to include operating system 723, application program 725 such as a web browser application, a widget or gadget engine or another application, and data file 727. Storage medium 721 may store, for use by device 700, any of a variety of various operating systems or combinations of operating systems.

(188) Storage medium 721 may be configured to include a number of physical drive units, such as redundant array of independent disks (RAID), floppy disk drive, flash memory, USB flash drive, external hard disk drive, thumb drive, pen drive, key drive, high-density DVD (HD-DVD) optical disc drive, internal hard disk drive, Blu-Ray optical disc drive, holographic digital data storage (HDDS) optical disc drive, external mini-dual in-line memory module (DIMM), synchronous dynamic random access memory (SDRAM), external micro-DIMM SDRAM, smartcard memory such as a subscriber identity module or a removable user identity (SIM/RUIM) module, other memory, or any combination thereof. Storage medium 721 may allow device 700 to access computer-executable instructions, application programs or the like, stored on transitory or non-transitory memory media, to off-load data, or to upload data. An article of manufacture, such as one utilizing a communication system may be tangibly embodied in storage medium 721, which may comprise a device readable medium.

(189) In FIG. 7, processing circuitry 701 may be configured to communicate with network 743b using communication subsystem 731. Network 743a and network 743b may be the same network or networks or different network or networks. Communication subsystem 731 may be configured to include one or more transceivers used to communicate with network 743b. For example, communication subsystem 731 may be configured to include one or more transceivers used to communicate with one or more remote transceivers of another device capable of wireless communication such as another electronic device, wireless device, UE, or base station of a radio access network (RAN) according to one or more communication protocols, such as IEEE 702.11, CDMA, WCDMA, GSM, LTE, UMTS terrestrial radio access network (UTRAN), WiMax, or the like. Each transceiver may include transmitter 733 and/or receiver 735 to implement transmitter or receiver functionality, respectively, appropriate to the RAN links (e.g., frequency allocations and the like). Further, transmitter 733 and receiver 735 of each transceiver may share circuitry components, software or firmware, or alternatively may be implemented separately.

(190) In the illustrated embodiment, the communication functions of communication subsystem 731 may include data communication, voice communication, multimedia communication, short-range communications such as Bluetooth, near-field communication, location-based communication such as the use of the global positioning system (GPS) to determine a location, another like communication function, or any combination thereof. For example, communication subsystem 731 may include cellular communication, Wi-Fi communication, Bluetooth communication, and GPS communication. Network 743b may encompass wired and/or wireless networks such as a LAN, a WAN, a computer network, a wireless network, a telecommunications network, another like network or any combination thereof. For example, network 743b may be a cellular network, a Wi-Fi network, and/or a near-field network. Power source 713 may be configured to provide alternating current (AC) or direct current (DC) power to components of device 700.

(191) The features, benefits and/or functions described herein may be implemented in one of the components of device 700 or partitioned across multiple components of device 700. Further, the features, benefits, and/or functions described herein may be implemented in any combination of hardware, software or firmware. In one example, communication subsystem 731 may be configured to include any of the components described herein. Further, processing circuitry 701 may be configured to communicate with any of such components over bus 702. In another example, any of such components may be represented by program instructions stored in memory that when executed by processing circuitry 701 perform the corresponding functions described herein. In another example, the functionality of any of such components may be partitioned between processing circuitry 701 and communication subsystem 731. In another example, the non-computationally intensive functions of any of such components may be implemented in software or firmware and the computationally intensive functions may be implemented in hardware. The embodiments described by this disclosure can be implemented for the device 700 in the RF interface block 709 or the transmitter block 733 of the communication subsystem 731.

(192) Those skilled in the art will also appreciate that embodiments herein further include corresponding computer programs.

(193) A computer program comprises instructions which, when executed on at least one processor of an apparatus, cause the apparatus to carry out any of the respective processes described above. A computer program in this regard may comprise one or more code modules corresponding to the means or units described above.

(194) Embodiments further include a carrier containing such a computer program. This carrier may comprise one of an electronic signal, optical signal, radio signal, or computer readable storage medium.

(195) In this regard, embodiments herein also include a computer program product stored on a non-transitory computer readable (storage or recording) medium and comprising instructions that, when executed by a processor of an apparatus, cause the apparatus to perform as described above.

(196) Embodiments further include a computer program product comprising program code portions for performing the steps of any of the embodiments herein when the computer program product is executed by a computing device. This computer program product may be stored on a computer readable recording medium.

(197) Additional embodiments will now be described. At least some of these embodiments may be described as applicable in certain contexts for illustrative purposes, but the embodiments are similarly applicable in other contexts not explicitly described.

(198) In one exemplary embodiment, a method of performing decomposition of signals into a sum of truncated Fourier series includes: receiving samples of an input signal and reference clock signals; computing the amplitude and phase of each sample of input signal; restricting to a finite alphabet the possible amplitude value of samples by a quantization with N bits when input signal assumes any value over a dynamic range: decomposing in a mapper with N mapping components the amplitude or the quantized amplitude of the sample as a sum of N values and generating N periodic mapping coefficients according to a mapping table that activate and deactivate periodic mapping components; generating N periodic mapping components or N pairs of in-phase and quadrature periodic mapping components with amplitudes with amplitudes according to a mapping table provided by the mapper; truncating time duration of each periodic mapping component; multiplying each truncated periodic mapping by the corresponding mapping coefficients; or amplifying all active truncated periodic mapping components.

(199) In another exemplary embodiment, the reference clock signals include a sample rate of the input signal f.sub.s, a carrier frequency f.sub.c and/or a clock signal with an intermediate frequency f.sub.i.

(200) In another exemplary embodiment, the reference clock signals include a sample rate of the input signal f.sub.s.

(201) In another exemplary embodiment, the method further includes receiving an input signal includes receiving the samples of baseband signal or receiving the samples of the complex envelope or envelope of a bandpass signal or receiving a baseband signal or a bandpass signal and sampling it in a sampling circuitry or a sample and hold circuitry to generate the samples of the input signal.

(202) In another exemplary embodiment, truncated periodic components are baseband or bandpass components.

(203) In another exemplary embodiment, when received samples of a complex envelope or samples of an envelope of a bandpass signal, the multiplication of truncated periodic mapping components by corresponding mapping coefficients further includes upconverting truncated periodic in-phase and quadrature mapping components to carrier frequency f.sub.c and adding the in-phase and quadrature truncated periodic mapping components.

(204) In another exemplary embodiment, when received samples of a complex envelope or samples of an envelope of a bandpass signal, the multiplication of truncated periodic mapping components by corresponding mapping coefficients further includes upconverting truncated periodic in-phase and quadrature mapping components to intermediate frequency f.sub.i, adding the in-phase and quadrature truncated periodic mapping components and upconverting bandpass truncated periodic mapping components to carrier frequency f.sub.c.

(205) In another exemplary embodiment, the quantization further includes the computation of quantization error and its quantization to obtain a quantized value of the quantization error and a weighted compensation of quantization error on the mapping components.

(206) In another exemplary embodiment, quantization, mapping, periodic components generation, time truncation and generation of mapping coefficients that activate or deactivate periodic truncated components are performed in a single digital block.

(207) In another exemplary embodiment, mapping, periodic components generation, time truncation and generation of mapping coefficients that activate or deactivate periodic truncated components are performed in a single digital block.

(208) In another exemplary embodiment, truncated periodic components are baseband or bandpass components and each baseband truncated periodic mapping component, or each bandpass truncated periodic component is amplified and transmitted without performing a sum of all amplified components.

(209) In another exemplary embodiment, an apparatus includes an input circuitry receiving as input signal the samples of a baseband signal or of a bandpass signal or the samples of complex envelope of a bandpass signal and a set of reference clock signals; a processing block circuitry with quantizers and a mapper that computes amplitude and phase of each sample and uses a quantizer when input signal assumes any value over a dynamic range to restrict to a finite alphabet the possible values of the samples and computes quantization error Q.sub.E and uses a second quantizer to quantize Q.sub.E of first quantizer as Q.sub.EQ, and the mapper decomposes the sample as a sum of periodic mapping components and generates mapping coefficients according to a mapping table that activate and deactivate periodic mapping components; a generator of periodic mapping components that generates periodic mapping components according mapping coefficients and mapping table of the mapper; a circuitry block that truncates time duration of each periodic mapping component; a circuitry that multiplies each truncated periodic mapping by the corresponding mapping coefficients; an output block circuitry with an upconverter circuitry, a set of DACs or mixers, and a set of power DACs or amplifiers that amplify the bandpass truncated periodic components with outputs connected to combiner circuitries or matching networks or transducers; or an output block circuitry with a set of amplifiers that amplify truncated periodic components with outputs connected to combiner circuitries or matching networks or transducers.

(210) In another exemplary embodiment, input circuitry includes a sampling circuitry to sample the input signal.

(211) In another exemplary embodiment, the set of reference clock signals include a reference clock signal with sample rate of the input signal f.sub.s, a reference clock signal with a carrier frequency f.sub.c and/or a reference clock signal with an intermediate frequency f.sub.i.

(212) In another exemplary embodiment, second quantizer receives the quantization error Q.sub.E from first quantizer and quantizes it to generate a quantized quantization error Q.sub.EQ to be used at the mapper.

(213) In another exemplary embodiment, mapper performs a weighted sum of the quantized version of quantization error on the amplitudes of periodic mapping components.

(214) In another exemplary embodiment, processing block circuitry do not have quantizers.

(215) In another exemplary embodiment, the mapper computes the set of N of pairs of mapping coefficients.

(216) In another exemplary embodiment, both quantizer and mapper have several Look up tables with different quantization and mapping rules needed to generate different sets of periodic mapping components associated with different baseband or bandpass signals.

(217) In another exemplary embodiment, quantizer, mapper and generator of periodic mapping components are implemented in a single digital/analog block.

(218) In another exemplary embodiment, input circuitry receives as input signal the samples S.sub.bbs(t.sub.s)=S.sub.bbs=A.sub.ks of a baseband signal assuming any value over a dynamic range; input circuitry receives clock reference signals with a fundamental frequency for the periodic components in which each sample is decomposed and with a reference clock signal with sample rate f.sub.s of the input signal; a quantizer of N bits in processing block circuitry quantizes A.sub.ks as A.sub.qks, to limit the set of possible values to alphabets with dimension of 2.sup.N values, computes quantization error Q.sub.E and uses a second quantizer to quantize Q.sub.E of first quantizer as Q.sub.EQ that is used by the mapper to perform a weighted sum of the quantized version of quantization error to the amplitudes of periodic components; the mapper decomposes A.sub.qks as a sum

(219) $A_{qks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(220) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N} and related with periodic components with same amplitude; the mapper computes the set of N mapping coefficients C.sub.I,ik which are used to activate and truncate periodic mapping components, performs a weighted sum of the quantized version of quantization error to the amplitudes of periodic components and provides info about quantization components and mapping coefficients to circuitry that generates the periodic mapping components; a circuitry that generates periodic components given by

(221) $s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
in which each quantized amplitude is decomposed, where coefficients c.sub.I,n.sup.(i) are related with the periodic components with amplitude A.sub.i; an activation and time truncation block circuitry that uses the coefficients C.sub.I,ik together the sampling pulse duration T.sub.s and pulse r(t) to activate and time truncate periodic mapping components

(222) $s_{I,T_o}^{\left(i\right)}\left(t\right)$
and generate N active truncated versions of these signals given by

(223) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right);$
or an output block circuitry with a set of amplifiers, combiners or matching networks or transducers connected to the amplifier's outputs.

(224) In another exemplary embodiment, input circuitry receives as input signal the samples S.sub.bbs(t.sub.s)=S.sub.bbs=A.sub.ks of a baseband signal, where samples have a finite set of amplitudes; input circuitry receives clock reference signals with a fundamental frequency for the periodic components in which each sample is decomposed and with a reference clock signal with sample rate f.sub.s of the input signal; the mapper decomposes A.sub.ks as a sum

(225) $A_{ks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,$
with

(226) $c_{ik}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N} and related with periodic components with same amplitude; or the mapper computes the set of N mapping coefficients C.sub.I,ik, which are used to activate and truncate periodic mapping components, and provides info about quantization components and mapping coefficients to circuitry that generates the periodic mapping components.

(227) In another exemplary embodiment, the output block circuitry: receives as input N active truncated periodic mapping components; N active truncated periodic mapping components are delivered to a set of N amplifiers with outputs of the N active amplifiers given by g.sub.a.sup.is.sub.k.sup.(i), where g.sub.a.sup.i denotes the amplifier gain of the amplifier associated with the i-th component; a combiner or a matching network circuitry combines the outputs of the N active amplifiers or a set of transducers is connected to the outputs of amplifiers.

(228) In another exemplary embodiment, input circuitry receives as input signal the samples {tilde over (S)}.sub.s of a complex envelope given by

(229) ${\tilde{S}}_S=\tilde{S}\left(t_s\right)=S_{iks}+j{S}_{Qks},$
with

(230) 0$S_{Iks}=E_{ks}\cos \left({}_{ks}\right)=A_{ks}$
and

(231) $S_{Qks}=E_{ks}\cos \left({}_{ks}\right)=B_{\mathrm{ks}},$
where

(232) $E_{ks}=\sqrt{S_{\mathrm{Iks}}^2+S_{Qks}^2}=\sqrt{A_{ks}^2+B_{ks}^2}$
and a.sub.ks=arctan(S.sub.Qks/S.sub.Iks); input circuitry receives reference clock signals with a fundamental frequency for the periodic components in which each sample is decomposed, with a reference clock with the intermediate, a reference clock with carrier frequency and a reference clock signal with sample rate f.sub.s of the input signal; a processing circuitry composed by a quantizer of N bits and a mapper that computes E.sub.ks, A.sub.ks and B.sub.ks, and quantizes as A.sub.qks, B.sub.qks and E.sub.qks, to limit the set of possible values to alphabets with dimension of 2.sup.N values, computes quantization error Q.sub.E and uses a second quantizer to quantize Q.sub.E of first quantizer as Quo that is used by the mapper to perform a weighted sum of the quantized version of quantization error to the amplitudes of periodic components; the mapper decomposes A.sub.qks as a sum

(233) $A_{qks}={.Math.}_{i=1}^{N_b}{C}_{I,\mathrm{ik}}{A}_i,$
with

(234) $C_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N)}, decomposes B.sub.qks i as a sum

(235) $B_{qks}={.Math.}_{i=1}^{N_b}{C}_{Q,ik}{B}_i$
with

(236) $C_{Q,ik}=\{\begin{array}{c}1\\ 0\end{array}$
and amplitudes B.sub.i belonging to a finite alphabet B.sub.i{B.sub.1, . . . , B.sub.N.sub.b)} and decomposes E.sub.qks as

(237) $E_{qks}={.Math.}_{i=1}^{N_b}{C}_{ik}{E}_i,$
with

(238) $C_{ik}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes E.sub.i belonging to a finite alphabet E.sub.i{E.sub.1, . . . , E.sub.N.sub.b}, computes the set of N.sub.b of coefficients C.sub.I,ik, C.sub.Q,ik and C.sub.ik which are used to activate and truncate periodic components, performs a weighted sum of the quantized version of quantization error to the amplitudes of periodic components and provides info about quantization components and mapping coefficients to circuitry that generates the periodic mapping components; a circuitry that generates periodic components given by

(239) $s_{I,T_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{I,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
and

(240) 0$s_{Q{T}_o}^{\left(i\right)}\left(t\right)={.Math.}_{n=-}^{}{c}_{Q,n}^{\left(i\right)}\exp \left(j2{\mathrm{nf}}_{0}t\right)$
in which each quantized amplitude of the in-phase and quadrature components is decomposed, where coefficients c.sub.I,n.sup.(i) and c.sub.Q,n.sup.(i) are related with the periodic components with amplitude A.sub.i and B.sub.i, respectively; an activation and time truncation block circuitry that uses the coefficients C.sub.I,ik, C.sub.Q,ik or C.sub.ik together the sampling pulse duration T.sub.s and pulse r(t) to activate and time truncate periodic s.sub.I,T.sub.0.sup.(i)(t) components and generate N.sub.b truncated versions of these signals given by

(241) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right),s_{Qk}^{\left(i\right)}\left(t\right)=\left[C_{Q,ik}{s}_{Q{T}_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right)\mathrm{and}{s}_k^{\left(i\right)}\left(t\right)=\left[C_{ik}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right),$
respectively; or an output block circuitry includes an upconverter circuitry with a set of DACs or mixers, power DACs or amplifiers, combiners or matching networks or transducers.

(242) In another exemplary embodiment, activation and time truncation block circuitry, uses the coefficients C.sub.ik together the sampling pulse duration T.sub.s and pulse r(t) to activate N time truncated periodic components and generate the N truncated versions of these signals given by

(243) $s_k^{\left(i\right)}\left(t\right)=\left[C_{ik}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right).$

(244) In another exemplary embodiment, the processing circuitry, mapper and generator of periodic mapping components are implemented in a single digital/analog block.

(245) In another exemplary embodiment, input signal is the samples of a complex envelope {tilde over (S)}(t) of bandpass signal with a finite alphabet of amplitudes or a discrete and finite alphabet of amplitudes; processing block has a mapper that computes E.sub.ks, A.sub.ks and B.sub.ks, and decomposes E.sub.ks or A.sub.ks and B.sub.ks and according to a mapping table decomposes A.sub.ks as a sum

(246) $A_{ks}={.Math.}_{i=1}^N{C}_{I,\mathrm{ik}}{A}_i,\mathrm{with}{C}_{I,\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes A.sub.i belonging to a finite alphabet A.sub.i{A.sub.1, . . . , A.sub.N}, decomposes B.sub.ks as a sum

(247) $B_{ks}={.Math.}_{i=1}^N{C}_{Q,ik}{B}_i$
with

(248) $C_{Q,ik}=\{\begin{array}{c}1\\ 0\end{array}$
and amplitudes B.sub.i belonging to a finite alphabet B.sub.i {B.sub.1, . . . , B.sub.N} and decomposes the computed value E.sub.ks of the sample amplitude as

(249) $E_{ks}={.Math.}_{i=1}^N{C}_{ik}{E}_i,$
with

(250) $C_{\mathrm{ik}}=\{\begin{array}{c}1\\ 0\end{array},$
and amplitudes E.sub.i belonging to a finite alphabet E.sub.=i{E.sub.1, . . . , E.sub.N}, computes the set of N.sub.b of coefficients C.sub.I,ik, C.sub.Q,ik and C.sub.ik which are used to activate and truncate periodic components, and provides info about quantization components and mapping coefficients to circuitry that generates the periodic mapping components; activation and time truncation block circuitry uses the coefficients C.sub.I,ik, C.sub.Q,ik or C.sub.ik together the sampling pulse duration T.sub.s and pulse r(t) to activate and time truncate periodic s.sub.I,T.sub.0.sup.(i)(t) components and generate N truncated versions of these signals given by

(251) $s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)=\left[C_{I,\mathrm{ik}}{s}_{I,T_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right),s_{Qk}^{\left(i\right)}\left(t\right)=\left[C_{Q,ik}{s}_{Q{T}_o}^{\left(i\right)}\left(t\right)\right]r\left(t-m{T}_s\right)$
and

(252) $s_k^{\left(i\right)}\left(t\right)=\left[C_{ik}{s}_{T_o}^{\left(i\right)}\left(t\right)\right]e^{j{}_{ks}}r\left(t-m{T}_s\right),$
respectively.

(253) In another exemplary embodiment, the output block circuitry: receives a reference clock signals with the carrier frequency f.sub.c; upconverter circuitry multiplies active truncated signals cos (2f.sub.ct) and sin (2f.sub.ct) to generate a set of N active signals given by

(254) 0$s_{\mathrm{Ik}}^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)$

(255) $s_{Qk}^{\left(i\right)}=-s_{Qk}^{\left(i\right)}\left(t\right)$
sin (2f.sub.ct) and sums active signals of s.sub.Ik.sup.(i) and s.sub.Qk.sup.(i) to generate bandpass truncated periodic components at carrier frequency given by

(256) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}+s_{Qk}^{\left(i\right)};$
a circuitry with a set of amplifiers amplifies each bandpass truncated periodic components; or a combiner or matching impedance network that combines amplified bandpass truncated periodic mapping components.

(257) In another exemplary embodiment, the output block circuitry: receives a reference clock signals with the carrier frequency f.sub.c; N active truncated signals are provided to a set of DACs that generate a set of N active among the N possible ones signals given by

(258) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right),,i=1,.Math.,N;$
or N active signals s.sub.k.sup.(i) are supplied to a set of amplifiers, and the amplified components are combined as the sum of N bandpass truncated periodic components.

(259) In another exemplary embodiment, the output block circuitry: receives reference clock signals with the carrier frequency f.sub.c and the intermediate frequency f.sub.i; N active truncated signals among the N possible ones are provided to a set of DACs to generate a set of N active signals among the possible ones given by

(260) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)-s_{\mathrm{Qk}}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right),i=1,.Math.,N;N^{}$
active signals among

(261) $s_k^{\left(i\right)}\left(i\right),i=1,.Math.,N$
are provided to a set of mixers to upconvert periodic components to carrier frequency; up converted signals are provided to a set of amplifiers that amplify each component; or outputs of the amplifiers are the inputs of a combiner or matching network that generate a bandpass signal as the sum of N active bandpass periodic truncated components or outputs of the amplifiers are inputs of a set of transducers.

(262) In another exemplary embodiment, the output block circuitry: N active truncated signals among the N possible ones are multiplied in mixers by cos (2f.sub.ct) and sin (2f.sub.ct) to generate a set of N active signals among the possible ones given by

(263) $s_{\mathrm{Ik}}^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{c}t\right)$
and

(264) $s_{Qk}^{\left(i\right)}=-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{c}t\right);N^{}$
active signals are summed to generate the truncated periodic components at carrier frequency given by

(265) $s_k^{\left(i\right)}=s_{\mathrm{Ik}}^{\left(i\right)}+s_{Qk}^{\left(i\right)};$
a set of amplifiers where each amplifier amplifies each component; outputs of the amplifiers are the inputs of a combiner or matching impedance network circuitry that combines the amplified components given by

(266) $g_a^i{s}_k^{}\left(i\right),$
where g.sub.a.sup.i denotes the amplifier gain of the amplifiers associated with the i-th component or outputs of the amplifiers are the inputs of a circuitry with transducers.

(267) In another exemplary embodiment, the output block circuitry: N active truncated signals among the N possible ones are multiplied in a set of mixers by cos (2f.sub.it) and sin (2f.sub.it) to generate a set of N active signals given by

(268) 0$s_k^{}\left(i\right)=s_{\mathrm{Ik}}^{\left(i\right)}\left(t\right)\cos \left(2f_{i}t\right)-s_{Qk}^{\left(i\right)}\left(t\right)\sin \left(2f_{i}t\right);N^{}$
active signals among