SUBSTRATE AND SEMICONDUCTOR LASER

Abstract

In one embodiment, the substrate is configured for a semiconductor laser diode and comprises a plurality of substrate layers. The substrate layers include insulating layers and carrier layers, which are thicker. A plurality of electrical contact surfaces, which are configured for the semiconductor laser diode, a laser capacitor and a control chip, are located on an assembling side of a first, uppermost substrate layer, which is an insulating layer. Electrical conductor tracks, which electrically interconnect the contact surfaces, are located on the one hand between the first insulating layer and a second insulating layer, and on the other hand between the second insulating layer and a third substrate layer, which is preferably an insulating layer.

Claims

1. A substrate configured for a semiconductor laser diode having a plurality of substrate layers, wherein the substrate layers comprise a plurality of insulating layers, the substrate layers comprise a plurality of carrier layers which are thicker than the insulating layers, a plurality of electrical contact surfaces for the semiconductor laser diode, for a laser capacitor and for a control chip are located on an assembling side of a first, uppermost insulating layer, and the substrate layers are numbered consecutively starting with the first insulating layer in the direction away from the assembling side, and electrical conductor tracks, which electrically interconnect the electrical contact surfaces for the semiconductor laser diode, the laser capacitor and the control chip, are located on the one hand between the first insulating layer and a second insulating layer and on the other hand between the second insulating layer and a third substrate layer.

2. The substrate according to claim 1, wherein all substrate layers are of the same material, which is a ceramic, wherein a thickness of the insulating layers is each between 40 μm and 0.2 mm inclusive, and wherein a thickness of the carrier layers is each between 0.2 mm and 0.8 mm inclusive and the carrier layers are thicker than the insulating layers by at least a factor of 2 and are configured for mechanical stabilization of the substrate.

3. The substrate according to claim 1, wherein at least one electrical connection surface, which is configured for a supply voltage for the semiconductor laser diode, leads from an outer mounting side of a last one of the carrier layers to at least the second insulating layer, the mounting side is a side of the substrate opposite the assembling side, wherein at least one electrical through-hole for this connection surface being arranged in a central region of the substrate, as seen in plan view of the assembling side.

4. The substrate according to claim 3, wherein the at least one electrical through-hole for the connection surface for the supply voltage for the semiconductor laser diode between the carrier layers is surrounded in each case by at least one shielding conductor track, and the shielding conductor tracks located between the carrier tracks are connected to at least one electrical connection surface on the mounting side for a ground connection.

5. The substrate according to claim 4, wherein there is a plurality of the electrical through-holes for the connection surface for the supply voltage for the semiconductor laser diode, wherein these electrical through-holes run directly and uninterruptedly from precisely one associated connection surface at the mounting side to at least the second insulating layer and, as seen in plan view of the assembling side, are located beyond an electrical connection area for the control chip.

6. The substrate according to claim 1, comprising electrical contact surfaces on the assembling side for a further capacitor, wherein electrical conductor tracks, which electrically interconnect the electrical contact surfaces for the further capacitor and the electrical contact surfaces for the control chip, are located on the one hand between the first insulating layer and the second insulating layer and on the other hand between the second insulating layer and the third substrate layer.

7. The substrate according to claim 6, wherein the electrical conductor tracks, which electrically interconnect the contact surfaces for the further capacitor and for the control chip, run at least partially one above the other as seen in plan view of the assembling side.

8. The substrate according to claim 1, wherein electrical through-holes at the assembly side for electrical contact surfaces for a further capacitor are arranged in an edge region of the substrate, as seen in plan view of the assembling side.

9. The substrate according to claim 1, wherein the carrier layers on the one hand and the insulating layers on the other hand are arranged in blocks, so that none of the carrier layers is located between the insulating layers and vice versa.

10. The substrate according to claim 1, comprising between two and five, inclusive, of said insulating layers and between three and 20, inclusive, of said carrier layers, wherein there are more of the support layers than of the insulating layers.

11. The substrate according to claim 1, wherein due to a smaller thickness of the insulating layers compared with a larger thickness of the carrier layers, a size of conductor loops defined by the electrical conductor tracks, and thus a size of inductances, is reduced compared to a substrate having substrate layers with only one uniform thickness.

12. A semiconductor laser comprising a substrate according to claim 1, a semiconductor laser diode electrically connected to the associated electrical contact surfaces, a laser capacitor on associated contact surfaces, and a control chip on associated contact surfaces, wherein the semiconductor laser is surface mountable.

13. The semiconductor laser according claim 12, further comprising a further capacitor mounted on associated contact surfaces, wherein the further capacitor is located directly adjacent to the control chip as seen in plan view on the assembling side.

14. The semiconductor laser according to claim 12, wherein the electrical contact surfaces of the semiconductor laser diode are located next to an electrical connection area of the semiconductor laser diode as seen in plan view on the assembling side, and wherein the semiconductor laser diode is electrically connected to the associated contact surfaces in each case by means of a plurality of bonding wires.

15. The semiconductor laser according to claim 12, further comprising a cover bonded to the substrate, wherein a laser radiation is emitted from the semiconductor laser diode in operation in a direction away from the substrate through the cover, and the semiconductor laser diode is a surface emitting laser diode having a vertical cavity.

16. The semiconductor laser according to claim 12, wherein a distance between the semiconductor laser diode and the laser capacitor and a distance between the semiconductor laser diode and the drive chip are each at most 0.2 mm.

17. The semiconductor laser according to claim 12, which is configured for a temporary current for the semiconductor laser diode of at least 2 A and for a rise time of a current for the semiconductor laser diode of 1 ns or less.

18. A substrate configured for a semiconductor laser diode having a plurality of substrate layers, wherein the substrate layers comprise a plurality of insulating layers, the substrate layers comprise a plurality of carrier layers which are thicker than the insulating layers, a plurality of electrical contact surfaces for the semiconductor laser diode, for a laser capacitor and for a control chip are located on an assembling side of a first, uppermost insulating layer, and the substrate layers are numbered consecutively starting with the first insulating layer in the direction away from the assembling side, and electrical conductor tracks, which electrically interconnect the electrical contact surfaces for the semiconductor laser diode, the laser capacitor and the control chip, are located on the one hand between the first insulating layer and a second insulating layer and on the other hand between the second insulating layer and a third substrate layer, at least one electrical connection surface, which is configured for a supply voltage for the semiconductor laser diode, leads from an outer mounting side of a last one of the carrier layers to at least the second insulating layer, at least one electrical through-hole for this connection surface being arranged in a central region of the substrate, as seen in plan view of the assembling side, the at least one electrical through-hole for the connection surface for the supply voltage for the semiconductor laser diode between the carrier layers is surrounded in each case by at least one shielding conductor track, and the shielding conductor tracks located between the carrier layers are connected to at least one electrical connection surface on the mounting side for a ground connection, there are at least three electrical through-holes for the connection surface for the supply voltage for the semiconductor laser diode, and these at least three electrical through-holes run directly and uninterruptedly from precisely one associated connection surface at the mounting side to at least the second insulating layer and, as seen in plan view of the assembling side, are located below an electrical connection area for the control chip.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0062] In the following, a substrate described herein and a semiconductor laser described herein are explained in more detail with reference to the drawing by means of exemplary embodiments. Identical reference signs indicate identical elements in the individual figures. The relationships of the elements are not shown to scale, however, but rather individual elements may be shown exaggeratedly large for better understanding.

[0063] In the Figures:

[0064] FIGS. 1 and 2 show schematic perspective views of an embodiment of a semiconductor laser described herein with a substrate described herein,

[0065] FIGS. 3, 6 and 10 show schematic circuit diagrams of the semiconductor laser of FIG. 2,

[0066] FIGS. 4, 7 and 11 show schematic side views of the semiconductor laser of FIG. 2, and

[0067] FIGS. 5, 8 and 9 show schematic perspective views with a substrate drawn transparent of the semiconductor laser of FIG. 2 with focus on different electrical aspects.

DETAILED DESCRIPTION

[0068] FIGS. 1 to 11 illustrate an embodiment of a semiconductor laser 2 in various representations. FIGS. 1 and 2 refer to the semiconductor laser 2 as a whole, and FIGS. 3 to 11 highlight various electrical aspects that are individually or preferably cumulatively realized in semiconductor lasers described herein.

[0069] In the three-dimensional representation of the semiconductor laser 2 according to FIG. 1, it can be seen that the semiconductor laser 2 has a substrate 1. The substrate 1 comprises a plurality of substrate layers 4. The substrate layers 4 are divided into insulating layers 41, 42, 43 on the one hand and carrier layers 44 . . . 50 on the other hand. The insulating layers 41, 42, 43 are designed to be as thin as possible, and the carrier layers 44 . . . 50 serve to mechanically stabilize the substrate 1 and thus the semiconductor laser 2.

[0070] Furthermore, the semiconductor laser 2 comprises a cover 8. The cover 8 is, for example, made of a plastic. Optionally, the cover 8 is attached to the substrate 1 with an adhesive 81. The cover 8 preferably comprises a window 82, for example, made of a glass, of plastic or also of a material that is transparent to a laser radiation L, such as sapphire. In operation of the semiconductor laser 2, the laser radiation L is preferably emitted in the direction away from the substrate 1 through the window 82.

[0071] In the following figures, the cover 8 is not drawn in each case to simplify the illustration.

[0072] In FIG. 2, it can be seen that an assembling side 3 is defined on a topmost substrate layer, which is formed by a first insulating layer 41. Electrical contact surfaces 33 and at least one connection area 35 are located on the assembling side 3. It is possible that the connection area 35, in contrast to the contact surfaces 33, has no further electrical function.

[0073] A control chip 63 and a further capacitor 64 are attached to the contact surfaces 33 on the assembling side 3. A semiconductor laser diode 61 is located on the connection area 35, next to which a laser capacitor 62 is mounted on assigned contact surfaces 33. Optionally, the semiconductor laser 2 further comprises a photodiode 65, for example, for diagnostic purposes and/or for driving the semiconductor laser diode 61.

[0074] The semiconductor laser diode 61 and optionally the photodiode 65 are electrically contacted, for example, via bonding wires 66. The other components 62, 63, 64 are preferably electrically contacted without bonding wires so that these components 62, 63, 64 can be surface mounted.

[0075] Deviating from the exemplary representation of the semiconductor laser 2, other numbers of insulating layers and carrier layers may also be present. For example, there can be only two insulating layers and at least three carrier layers.

[0076] For example, a height of the substrate 1 in the direction perpendicular to the assembling side 3 is at least 1 mm or 2 mm and/or at most 5 mm or 3 mm, for example approximately 2.3 mm. For example, a width of the substrate 1 is at least 1.5 mm or 2.5 mm and/or at most 8 mm or 5 mm, for example about 3.5 mm. A length of the substrate 1 is, for example, at least 2 mm or 3.5 mm and/or at most 10 mm or 8 mm, for example about 5.4 mm. A thickness of the insulating layers 41, 42, 43 is, for example, about 100 μm, whereas the carrier layers 44 . . . 50 have, for example, a thickness of about 350 μm. The aforementioned values may apply individually or cumulatively to all embodiments of the substrate 1 and the semiconductor laser 2.

[0077] FIG. 3 schematically illustrates the electrical interconnection of components 61, 62, 63, 64. These components are connected to each other via electrical conductor tracks 51 and via electrical through-holes 52, which are not explicitly shown in FIG. 3.

[0078] On a mounting side 7 opposite to the assembling side 3, see also FIG. 4, there are several electrical connection surfaces 34 for external electrical contacting of the semiconductor laser 2 and thus of the substrate 1. In the example of FIG. 4, the connection surfaces 34 are located on the tenth substrate layer 4, which, according to the applied counting, is equal to the tenth carrier layer 50.

[0079] Electrical connection areas 34 are provided for a supply voltage VLD for the semiconductor laser diode 61, for a supply voltage VCC for the additional capacitor 64, for ground connections GND and for a trigger connection EN.

[0080] Optionally, further connection areas 34, not explicitly drawn, can be provided, for example for diagnostic purposes for reading out the optional photodiode 65, not drawn in FIG. 3.

[0081] The control chip 63 preferably comprises a driver 67 for a switching element 68. The driver 67 is, for example, an operational amplifier. The switching element 68 is preferably a transistor, in particular a MOSFET.

[0082] In FIGS. 3 and 4, particular attention is paid to a current path when the semiconductor laser diode 61 is turned on and thus when the switching element 68 is activated. Here, the further capacitor 64, which serves as a buffer capacitor, is used. The relevant current paths are highlighted.

[0083] A trigger signal at the terminal EN turns on the semiconductor laser 2. Thereby, the driver 67 draws significant current to charge a gate of the switching element 67 within a few 10 ps. Series resistances and inductances between a voltage supply of the driver 67 and a current source can cause a significant voltage drop of a few 100 mV at the connection surfaces 34 for the associated supply voltage VCC of the further capacitor 64. This can cause problems with the electromagnetic compatibility of the semiconductor laser 2.

[0084] In FIGS. 4 and 5, the associated circuitry of the further capacitor 64 within the substrate 1 is highlighted. That is, in the schematic side view of FIG. 4 and the three-dimensional view of FIG. 5, the current routing is illustrated as highlighted in the circuit diagram of FIG. 3.

[0085] The associated electrical conductor tracks 51a, 51b run between the first insulating layer 41 and the second insulating layer 42 and between the second insulating layer 42 and the third insulating layer 43, respectively. Viewed from above on the assembling side 3, these conductor tracks 51a, 51b run as congruently as possible in order to ensure low parasitic inductances.

[0086] The electrical through-holes 52 for the further capacitor 64 are located in an edge region of the substrate 1, seen in plan view on the assembling side. The same preferably also applies to the further capacitor 64 itself.

[0087] The associated through-holes 52, also referred to as vias, preferably run partially or completely adjacent to the control chip 63, in particular below the further capacitor 64. Further through-holes 52 are provided to create an interconnection between the conductor tracks 51a, 51b in the various planes and the through-holes 52 from the connection surface 34 and towards the further capacitor 64 and the control chip 63.

[0088] Thus, a conduction of a supply voltage of the control chip 63 is realized essentially between the insulating layers 41, 42, 43, with a direct overlap between the conductor tracks 51a, 51b for VCC and GND in order to achieve the lowest possible inductances.

[0089] The substrate 1 thus preferably has a power part for the semiconductor laser diode 61 with thin ceramic layers in the form of the insulating layers 41, 42, 43. The remaining substrate 1 represents a signal part with thicker ceramic layers in the form of the carrier layers 44 . . . 50.

[0090] A typical operating current for the pulsed semiconductor laser 2 is in the range of 3.5 A to 4 A, for example, with a rise time in the range around 0.5 ns. A capacitance of the laser capacitor 62 is in the range around 1 μF, for example. A thickness of the electrical conductor tracks between the substrate layers 4 is, for example, at least 10 μm or 15 μm and/or at most 50 μm or 30 μm. A diameter of the through-holes 52 is, for example, at least 50 μm and/or at most 0.2 mm, for example about 100 μm. A distance between adjacent conductor tracks and/or through-holes in the substrate 1 is preferably at least 50 μm or 0.1 mm to avoid electrical short circuits. The above values may apply individually or cumulatively to all embodiments of the semiconductor laser 2 and the substrate 1.

[0091] FIGS. 6 through 9 illustrate another aspect of the semiconductor laser 2 described herein. When the semiconductor laser 2 is turned on, current pulses of several amperes flow from the supply voltage VLD through the laser, through the control chip 3 and back to the ground connection GND, see the current path highlighted in FIG. 6.

[0092] An area between these components on the assembling side 3 of the substrate 1 towards the connection surfaces 34 on the mounting side 7 can act as an antenna and emit radio radiation, see FIG. 7. This in turn can cause problems with the electromagnetic compatibility of the semiconductor laser 2.

[0093] In particular, it can be seen from FIG. 8 that the through-holes 52 for the supply voltage VLD are arranged in a central region of the substrate 1 as seen in a top view of the assembling side 3. In other words, these through-holes 52 preferably run centrally through the substrate 1. These through-holes 52 extend at least as far as the second insulating layer 42 and may also be partially guided as far as the contact surfaces 33 for the control chip 63.

[0094] In particular in FIG. 9 it can be seen that electrical conductor tracks 51b, . . . 51e between the substrate layers 4 further away from the assembling side 3 are designed as shielding conductor tracks 53, which are connected to GND and, viewed from above the assembling side 3, run all the way around the through-holes 52 for VLD. This ensures efficient shielding of the through-holes 52 for VLD. This results in significantly reduced radio frequency radiation.

[0095] There may be several connection surfaces 34 for GND, for example, on two sides of exactly one connection surface 34 for VLD. The connection surfaces 34 for VLD and GND can be surrounded by smaller connection surfaces 34 for VCC, EN, further GND and for control signals or diagnostic data that are not explicitly drawn, see FIG. 8.

[0096] FIGS. 10 and 11 show another aspect of the substrate 1 described herein. When the semiconductor laser diode 61 is turned on, a series resistance and inductance between the power supply and the semiconductor laser diode 61 limit a rise time of the current to typically a few 10 ns. Therefore, the laser capacitor 62 is used to provide the necessary current to build up the laser emission in the sub-nanosecond range.

[0097] With the substrate 1 described here, an inductance caused by a conductor loop is minimized in the highlighted current path. This is achieved in particular by guiding this current path on both sides of the second insulating layer 42, so that only the thickness of the second insulating layer 42, seen in cross-section, contributes to the size of the conductor loop. The small thickness of the insulating layers 41, 42, 43 can thus reduce the rise time of the laser emission.

[0098] Briefly summarized, the substrate 1 of the semiconductor laser 2 described herein can be used to particularly address the following three aspects: [0099] Low inductances can be achieved in driving the switching element 67 in the region of the further capacitor 64, since the associated electrical conductor tracks can be close together and approximately congruent, see FIGS. 3 to 5. [0100] Radio frequency radiation can be reduced by having through-holes for the supply voltage VLD running centrally through the substrate 1 and laterally shielded via the shielding conductor tracks 53, see FIGS. 6 to 9. [0101] A small rise time of a laser emission can be achieved by having current paths between the laser capacitor 62 and the semiconductor laser diode 61 having low inductances when viewed in cross section, see FIGS. 10 and 11.

[0102] The components shown in the figures preferably follow one another in the sequence indicated, in particular directly one after the other, unless otherwise described. Components not touching each other in the figures are preferably spaced apart. Insofar as lines are drawn parallel to one another, the associated surfaces are preferably likewise aligned parallel to one another. Furthermore, the relative positions of the drawn components to each other are correctly reproduced in the figures, unless otherwise described.

[0103] The invention described herein is not limited by the description based on the embodiments. Rather, the invention encompasses any new feature as well as any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or combination itself is not explicitly stated in the patent claims or embodiments.