Abstract
A turn-off circuit for a semiconductor switch includes an element having a variable resistance coupled to a control input of the semiconductor switch, a circuit for generating a control-input reference signal, and a control circuit coupled to adjust a resistance of the element having a variable resistance in response to the control-input reference signal in a closed control loop in order to turn off the semiconductor switch.
Claims
1. A driver circuit for a switch controller to control a power switch, the driver circuit comprising: an on-state driver coupled to receive an on signal, wherein the on-state driver outputs a first control signal to turn ON the power switch in response to the on signal and the first control signal is substantially equal to a high threshold; an off-state driver coupled to receive an off signal, wherein the off-state driver outputs the first control signal to turn OFF the power switch in response to the off signal and the first control signal is substantially equal to a low threshold; and a soft shutdown circuit coupled to receive the first control signal, wherein the soft shutdown circuit regulates the first control signal in a closed loop in response to a fault condition, wherein the soft shutdown circuit decreases the first control signal to a mid-threshold from the high threshold for a period of time and then decreases the first control signal to the low threshold, wherein the period of time ends in response to an end of a Miller plateau of the power switch, wherein the soft shutdown circuit detects the end of the Miller plateau of the power switch when the off signal reaches a first threshold.
2. The driver circuit of claim 1, wherein the off-state driver further includes a transistor, wherein the soft shutdown circuit is coupled to receive a gate signal representative of a gate current or a gate voltage of the transistor.
3. The driver circuit of claim 2, wherein the end of the Miller plateau of the power switch is detected when the gate signal of the transistor reaches the first threshold after a blanking time.
4. The driver circuit of claim 1, wherein the soft shutdown circuit further comprises: an amplifier coupled to receive the first control signal and a reference signal, wherein the reference signal decreases to the mid-threshold from the high threshold for the period of time and then decreases to the low threshold in response to the fault condition and the end of the Miller plateau of the power switch.
5. The driver circuit of claim 4, wherein the end of the Miller plateau of the power switch is detected when the gate signal of the transistor reaches a first threshold after a blanking time, and wherein the blanking time ends when the reference signal is substantially equal to the mid-threshold.
6. The driver circuit of claim 4, wherein the reference signal is not substantially equal to the mid-threshold for the period of time when there is not an occurrence of the fault condition.
7. The driver circuit of claim 1, wherein the driver circuit is coupled to receive an active clamping signal, and wherein the soft shutdown circuit is disabled when the active clamping signal is between a first threshold and a second threshold.
8. The driver circuit of claim 7, wherein the active clamping signal includes an additional current prior to the first control signal turning OFF the power switch.
9. The driver circuit of claim 1, wherein the fault condition corresponds to an overcurrent condition of the power switch.
10. A method for turning off a semiconductor switch, comprising: generating a control-input reference signal; adjusting a resistance of an element having a variable resistance in response to the control-input reference signal in a closed control loop in order to turn off the semiconductor switch, wherein the element is coupled to a control input of the semiconductor switch; detecting an end of a Miller plateau in a control input voltage or in a control input current of the semiconductor switch; and reducing a level of the control-input reference signal in response to a detection of the end of the Miller plateau at a predetermined rate, wherein the end of the Miller plateau is detected on a basis of a voltage at the control input of the element falling below a predetermined signal level, and wherein the predetermined signal level is determined by a reference current and a second element that is based on a same technology as the element having a variable resistance.
11. The method of claim 10 wherein the predetermined signal level is in a range of 50% to 150% of an expected gate threshold voltage of the element having a variable resistance.
12. The method of claim 10, further comprising: detecting a voltage at the control input of the semiconductor switch, and wherein the resistance of the element having a variable resistance is adjusted in response to the control-input reference signal and the voltage at the control input of the semiconductor switch.
13. The method of claim 12, further comprising: comparing the control-input reference signal with the voltage at the control input of the semiconductor switch to generate an output.
14. The method of claim 13, further comprising: generating a control signal for the element having a variable resistance in response to a comparison of the output with a fault signal, wherein the fault signal is indicative of a fault state of the semiconductor switch.
15. The method of claim 10, wherein the end of the Miller plateau is detected on a basis of a voltage across the element having a variable resistance, a current at the control input of the semiconductor switch, a voltage across the semiconductor switch, or a current through the semiconductor switch.
16. The method of claim 15, further comprising: detecting the resistance of the element having a variable resistance on a basis of the control-input reference signal and the voltage across the element having a variable resistance, the current at the control input of the semiconductor switch, the voltage across the semiconductor switch, or the current through the semiconductor switch.
17. The method of claim 10, further comprising: generating a deactivation signal that prevents the adjusting of the resistance of the element having a variable resistance in response to the control-input reference signal.
Description
BRIEF DESCRIPTION OF THE FIGURES
(1) Non-limiting and non-exhaustive exemplary embodiments of the invention are described with reference to the following figures, wherein the same reference symbols relate to the same components in different figures, where not specified otherwise.
(2) FIG. 1A shows an exemplary apparatus for providing electrical energy to a consumer, said apparatus having a control circuit for semiconductor switches having the turn-off circuits described herein.
(3) FIG. 1B shows exemplary signal profiles of voltages across a control terminal of a semiconductor switch and signal profiles of a voltage across a semiconductor switch during normal operation or in the event of a short circuit.
(4) FIG. 2 shows an exemplary control circuit for a semiconductor switch having a turn-off circuit described herein and an active clamping circuit.
(5) FIG. 3 shows an exemplary turn-off circuit.
(6) FIG. 4 shows exemplary signal profiles in a system which has a control circuit for semiconductor switches having the turn-off circuits described herein.
(7) FIG. 5 shows an exemplary turn-off circuit in combination with an active clamping circuit.
(8) FIG. 6 shows simulated signal profiles in an exemplary turn-off circuit.
(9) FIG. 7 shows an exemplary circuit for generating a threshold voltage in a circuit for detecting an end of a Miller plateau.
DETAILED DESCRIPTION
(10) Numerous details are given in the description below to enable a far-reaching understanding of the present invention. However, it is clear to a person skilled in the art that the specific details are not necessary for implementing the present invention. Known apparatuses and methods are not outlined in detail at another point in order to not unnecessarily hinder understanding of the present invention.
(11) In the present description, a reference to “an implementation”, “a configuration”, “an example” or “example” means that a specific feature, structure or property which is described in conjunction with this embodiment is included in at least one embodiment of the present invention. Thus, the phrases “in one implementation”, “in one embodiment”, “one example” or “in one example” at different points in this description do not necessarily all relate to the same embodiment or the same example.
(12) In addition, the specific features, structures or properties can be combined in any desired suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or properties can be included in an integrated circuit, in an electronic circuit, in circuit logic or in other suitable components which provide the described functionality. Furthermore, reference will be made to the fact that the drawings are used for explanatory purposes for a person skilled in the art and that the drawings are not necessarily illustrated true to scale.
(13) FIG. 1A shows an apparatus 100 (also referred to as power converter) for providing electrical energy to a consumer 110, said apparatus having a control circuit for semiconductor switches having the turn-off circuits described herein. However, the flow of energy can also point in the other direction. In this case, the element 110 is a generating unit. In the other apparatuses, element 110 can operate in different operating states, both as a consumer and as a generating unit. In the following text, only an apparatus for providing energy is discussed, which includes all of the just mentioned cases (the energy can be provided at different outputs). The apparatus comprises two power semiconductor switches 104, 106, which are coupled together. In addition, the apparatus 100 can receive a DC input voltage 102 (UIN). The apparatus is designed to transmit electrical energy, by controlling the power semiconductor switches 104, 106, from the input to an output, to which the consumer 110 is connected (or in the reverse direction). In this case, the apparatus for providing electrical energy can control voltage levels, current levels or a combination of the two variables, which are output to the consumer. In the example shown in FIG. 1A, the power semiconductor switches 104, 106 are IGBTs.
(14) In the text which follows, the apparatuses and methods are explained using the example of IGBTs. However, the turn-off apparatuses described herein are not restricted to use with IGBTs. Instead, they can also be used in combination with other power semiconductor switches. For example, metal-oxide semiconductor field-effect transistors (MOSFETs), bipolar transistors (BJTs), injection-enhancement gate transistors (IEGTs) and gate turn-off thyristors (GTOs) can be used with the turn-off apparatuses described herein. The turn-off apparatuses described herein can also be used with power semiconductor switches which are based on gallium nitride (GaN) semiconductors or silicon carbide (SiC) semiconductors.
(15) A maximum nominal collector-emitter, anode-cathode or drain-source voltage of a power semiconductor switch in the switched-off state can be more than 500 V, preferably more than 2 kV.
(16) In addition, the turn-off apparatuses described herein are not restricted to use with power semiconductor switches. Thus, other semiconductor switches can also be used with the turn-off apparatuses described herein. The effects and advantages which are mentioned here also occur at least partly in systems with other semiconductor switches.
(17) Since IGBTs are discussed below, the terminals of the power semiconductor switch are referred to as “collector”, “gate” and, “emitter”. As already explained above, the apparatuses and methods are not restricted to IGBTs, however. In order to avoid unnecessarily long descriptions, the designation “emitter” herein also includes the terminal of corresponding power semiconductor switches which are denoted by “source” or “cathode”. Equally, the term “collector” herein also includes the terminal denoted by “drain” or “anode”, and the term “gate” denotes the terminal of corresponding power semiconductor switches denoted by “base”. In the text which follows, the term “collector-emitter voltage” also includes a “drain-source voltage” and a “cathode-anode voltage” and the terms “collector voltage” and “emitter voltage” also include a “drain voltage” or “anode voltage” and a “source voltage” or “cathode voltage”, respectively.
(18) The power semiconductor switches 104, 106 are each controlled by a first and second control circuit 118, 120. Said control circuits provide a first and a second gate-emitter driver signal 130, 132 (U.sub.GE1, U.sub.GE2) in order to control the switching times of the first and second IGBTs. Both control circuits 118, 120 can optionally in turn be controlled by a system controller 114. The system controller 114 can have an input for receiving system input signals 116. In the example shown in FIG. 1A, two power semiconductor switches 104, 106 with a half-bridge configuration are illustrated. The turn-off apparatuses can also be used in other topologies, however. For example, a single power semiconductor switch (for example a single IGBT) having an apparatus for detection of a profile of a voltage across a power semiconductor switch or of a control circuit can be coupled. In other examples, in a three-phase system having six power semiconductor switches or twelve power semiconductor switches, each of the power semiconductor switches can have an apparatus for detecting a profile of a voltage across a power semiconductor switch.
(19) In addition to the output of a gate-emitter driver signal, the control circuits 118, 120 receive signals which represent voltages which are present across the power semiconductor switches 104, 106. The signals may be voltage signals or current signals. In the example shown in FIG. 1A, each control circuit 118, 120 has in each case one signal, which is representative of the collector-emitter voltage and is denoted as collector-emitter voltage signal 122, 124 (U.sub.CE1, U.sub.CE2).
(20) FIG. 1A shows the control circuits 118, 120 as separate control circuits. However, the two control circuits 118, 120 can also be combined in a single circuit. In this case, a single control circuit controls two power semiconductor switches 104, 106. Furthermore, the second gate-emitter driver signal 132 (U.sub.GE2) can be an inverted first gate-emitter driver signal 130 (U.sub.GE1).
(21) The two control circuits 118, 120 comprise one of the turn-off apparatuses described herein. In response to the establishment of a short-circuit state and/or overcurrent state, the respective power semiconductor switch 104, 106 can be turned off with the aid of the turn-off apparatuses described herein.
(22) FIG. 1B shows exemplary signal profiles of voltages across a control terminal of a semiconductor switch and signal profiles of a voltage across a semiconductor switch during normal operation and in the event of a short circuit. Signal profiles of a voltage 130 (U.sub.GE) between a gate terminal and an emitter terminal are shown in the upper half of FIG. 1B. The voltage 130 (U.sub.GE) is shown as have a first signal level (V.sub.ON) and a second, different signal level (V.sub.OFF). If the gate terminal is at the first signal level (V.sub.ON), the semiconductor switch is turned on (for a time t.sub.ON 131). Signal profiles of a collector-emitter voltage 125 across the semiconductor switch in the normal case (on the left-hand side) and in an exemplary short-circuit and/or overcurrent case (on the right-hand side) when the semiconductor switch is turned on are shown in the lower half of FIG. 1B. In the short-circuit case shown, the collector-emitter voltage 125 does not decrease rapidly to a relatively low value after turn-on (however, there are still further short-circuit cases in which the collector-emitter voltage assumes other characteristic profiles). This can result in damage in the semiconductor switch and on the load. Therefore, the semiconductor switch should be turned off quickly. However, if this takes place too quickly, overvoltages on the load can occur. In order to prevent this, the turn-off circuits described herein can be used.
(23) FIG. 2 shows an exemplary control circuit 218 for a semiconductor switch comprising a turn-off circuit 242 described herein and an (optional) active clamping circuit 236. The control circuit receives control commands from a system controller 214 (said control commands in turn are generated in response to system input signals 216). At a driver interface 226, these control commands are converted into control signals 250 (U.sub.CMD), which are transmitted to the driver circuit 228 via an isolating transformer 232. The driver circuit 228 controls a semiconductor switch 204 in response to the control signals 250 (U.sub.CMD) received via the isolating transformer 232. For this purpose, the driver circuit 228 is coupled to a control input (for example to a gate input) of the semiconductor switch 204.
(24) The exemplary driver circuit 228 shown in FIG. 2 has a driver for the ON state and a driver for the OFF state of the semiconductor switch 244, 246. Said drivers 244, 246 each generate the driver signal 230 (U.sub.GE) for the semiconductor switch 204. The two drivers 244, 246 are controlled via a driver signal processing unit 238, which receives the control signals 250 (U.sub.CMD) from the isolating transformer 232 (and converts them into an ON signal 254 (U.sub.ON) and an OFF signal 258 (U.sub.OFF) for the respective driver 244, 246).
(25) A turn-off circuit 242 described herein is coupled between the driver signal processing unit 238 and the driver for the OFF state 246. Said turn-off circuit 242 can ensure a turn-off operation in a short-circuit case and/or an overcurrent case, in which during the turn-off operation a drop in the switch current 240 (in this example the collector-emitter current I.sub.CE) through the semiconductor switch is not as steep as during normal operation (a so-called “soft shutdown”). As a result, it is possible to prevent hazardous overvoltages from arising across the output of the semiconductor switch. Details in respect to the properties of various turn-off circuits are discussed in connection with FIG. 3, FIG. 4 and FIG. 5.
(26) The turn-off circuit 242 receives the OFF signal 252 (U.sub.OFF) for the driver for the OFF state 246, a fault signal 248, which indicates the presence of a short-circuit case and/or an overcurrent case, and a signal which is present at the control terminal of the semiconductor switch 230 (for example a gate-emitter voltage U.sub.GE). On the basis of these signals, the turn-off circuit 242 can dynamically control a turn-off operation of the semiconductor switch 204. In one example, a profile of the signal which is present at the control terminal of the semiconductor switch 230 can be adjusted in a closed control loop in order to turn off the semiconductor switch 204. In the example shown in FIG. 2, adjustment can include the generation of a modified OFF signal 256 (U.sub.OFF*), which is transmitted from the turn-off circuit 242 to the driver for the OFF state 246. This modified OFF signal 256 (U.sub.OFF*) can, in one example, vary a variable resistance of an element having a variable resistance in the driver for the OFF state 246 and thus influence the profile of the signal which is present at the control terminal of the semiconductor switch 230 (for example a gate-emitter voltage U.sub.GE). In other words, the modified OFF signal 256 (U.sub.OFF*) can be a manipulated variable of the control loop. In the example shown in FIG. 2, the signal which is present at the control terminal of the semiconductor switch 230 (for example a gate-emitter voltage U.sub.GE) is a feedback parameter of the control loop. However, other parameters can also be used as feedback parameters.
(27) In addition or as an alternative, the driver for the OFF state 246 can be controlled in such a way that a voltage which is present at the control input of the semiconductor switch 230 (for example a gate-emitter voltage U.sub.GE) is reduced after the end of a Miller plateau at a predetermined rate. In this way, the dynamic turn-off circuit 242 can ensure a suitable “soft shutdown” for different semiconductor switches. In one example, an end of the Miller plateau in a control input voltage or in a control input current of the semiconductor switch 204 can be detected on the basis of a profile of a voltage at a control input of an element having a variable resistance 258 (U.sub.G_OFF) in the driver for the OFF state 246.
(28) The control circuit 218 includes a short-circuit and/or overvoltage detection circuit 234, which generates the fault signal 248 (U.sub.FLT). In one example, the short-circuit and/or overvoltage protection circuit 234 can monitor a collector-emitter voltage 222 (U.sub.CE) of the semiconductor switch 204. As mentioned in connection with FIG. 1B, said collector-emitter voltage 222 (U.sub.CE) can assume a characteristic profile in a short-circuit case and/or overcurrent case, and the short-circuit and/or overvoltage protection circuit 234 can detect this characteristic profile.
(29) Optionally, the control circuit 218 can comprise an active clamping circuit 236. This can provide a second circuit for a “soft shutdown” in the event of a fault, which circuit can be used as an alternative to the turn-off circuit 242.
(30) Since an exemplary control circuit for a semiconductor switch having a turn-off circuit 242 described herein and an active clamping circuit 236 have been discussed with respect to FIG. 2, an exemplary turn-off circuit will be explained with respect to FIG. 3.
(31) FIG. 3 shows a driver for the ON state 344, a driver for the OFF state 346, a turn-off circuit 342 and a semiconductor switch 304. The drivers 344, 346 each include an element having a variable resistance 361, 364 (in the example shown in FIG. 3 as an NMOS semiconductor switch, but other switchable semiconductor switches or other elements having a variable resistance can also be used). The elements having a variable resistance 361, 364 are each coupled in series with the optional resistances 362, 363.
(32) The element having a variable resistance 361 (and the resistance 362) of the driver for the ON state 344 are coupled between a control input of the semiconductor switch 304 (the gate input in the example shown in FIG. 3) and a first reference potential 360 (V.sub.DD). In addition, the element having a variable resistance 361 is arranged in such a way that it can receive an ON signal 354 (U.sub.ON) of the control circuit at a control terminal of the element having a variable resistance 361 (for example at a gate input of the NMOS 361). If, therefore, the semiconductor switch is intended to be turned on, a resistance of the element having a variable resistance 361 is reduced (for example the NMOS semiconductor switch 361 is turned on) so that the control input of the semiconductor switch 304 (for example gate terminal of the IGBT 304) is coupled to a potential which is high enough to turn on the semiconductor switch (for example the first reference potential 360 V.sub.DD in FIG. 3).
(33) Similarly, the element having a variable resistance 364 (and the resistance 363) of the driver for the OFF state 346 are coupled between a control input of the semiconductor switch 304 (the gate input of the IGBT in the example shown in FIG. 3) and a second reference potential 312. In addition, the element having a variable resistance 364 is arranged in such a way that it can receive a modified OFF signal 356 (U.sub.OFF*) of the control circuit at a control terminal 364 (shown as the gate terminal of the NMOS 364). If, therefore, the semiconductor switch 304 is intended to be switched off, a resistance of the element having a variable resistance 364 is reduced (for example the NMOS semiconductor switch 364 is turned on) such that the control input of the semiconductor switch 304 (gate terminal of the IGBT 304) is coupled to a potential which is low enough for the semiconductor switch to be switched off (for example the second reference potential 312). The switching off of the semiconductor switch 304 by pulling the control terminal (gate terminal of the IGBT) immediately to the second reference potential results in relatively rapid decrease in the collector-emitter current of the semiconductor switch 304. If, however, a short-circuit case is present, the rapid decrease in the collector-emitter current as a result of parasitic couplings could result in the generation of possibly hazardous overvoltages. In order to prevent the influence thereof, the turn-off circuit 342 can be used in a short-circuit case and/or overcurrent case to implement soft shutdown.
(34) In the example shown in FIG. 3, a switch 366 (S3) is controlled by a fault signal 348 (U.sub.FLT) in such a way that the switch 366 (S3) is open when there is a fault (for example when a corresponding detection circuit has identified a fault). As a result, an (original) OFF signal 352 (U.sub.OFF) is modified by the turn-off circuit 342 in the case of a fault. During normal operation, on the other hand, the switch S3 366 is closed and is coupled to a fixed reference potential 312 so that the turn-off circuit 342 does not influence the element having a variable resistance 364 of the driver for the OFF state 346.
(35) The turn-off circuit 342 includes a circuit for generating a control-input reference signal 370 (U.sub.REF), a detection circuit 369, which is designed to detect an end of a Miller plateau in a control input voltage or in a corresponding control input current of the semiconductor switch and a first comparison circuit 368 in order to compare the control-input reference signal 370 (U.sub.REF) with the voltage at the control input of the semiconductor switch 330 (U.sub.GE).
(36) First, the circuit for generating a control-input reference signal 370 (U.sub.REF) is explained. Said circuit includes a capacitance, wherein the reference signal 370 (U.sub.REF) is formed by a voltage across the capacitance. In the example shown in FIG. 3, the capacitance may be coupled to two current sources 372, 373 (I.sub.1, I.sub.2) and can be discharged through current sources 372, 373 (I.sub.1, I.sub.2) in order to reduce a signal level of the reference signal 370 (U.sub.REF) at a first or second rate. The first and second rate may be proportional to the value of the current sources 372, 373 (I.sub.1, I.sub.2) and the capacitance. First, a first terminal of the capacitance can be coupled to a determined reference potential 360 (V.sub.DD) once the semiconductor switch 304 has been turned on in response to the ON signal 354 (U.sub.ON). This corresponds to the first reference potential 360 to which the control input of the semiconductor switch 304 is coupled to in the ON state, in the example shown in FIG. 3. Since a second terminal of the capacitance is at a lower potential (this corresponds to the second reference potential 312 to which the control input of the semiconductor switch 304 is coupled to in the OFF state, in the example shown in FIG. 3), the capacitance is charged to the determined voltage during the ON state of the semiconductor switch 304 and consequently still just prior to the beginning of the turn-on. As a result, the control-input reference signal 370 (U.sub.REF) “starts” at a predetermined signal level, which corresponds to the determined reference potential 360 (V.sub.DD).
(37) The first current source 373 is coupled to the second reference potential 312 via a switch 377 (S1). When the switch 377 (S1) is closed, the first current source 373 discharges the capacitance at the first rate (corresponding to the current I.sub.1). A control circuit for the switch 377 (S1) can be designed in such a way that the switch 377 (S1) is kept closed from a time at which a short-circuit case and/or overcurrent case is detected (or a predetermined time span after the detection of a short-circuit case and/or overcurrent case) up to a time at which a voltage 330 at the control input of the semiconductor switch 304 reaches a voltage which corresponds to a Miller plateau of the semiconductor switch (shown as signal UM 375). Thus, in this time span, the capacitance is discharged at a first rate.
(38) In the example shown in FIG. 3, the control circuit for the switch 377 (S1) includes a comparison circuit 374, which compares a voltage across the capacitance (i.e. the reference signal 370 (U.sub.REF)) with a threshold value 375 (UM). This threshold value 375 (UM) can be selected in such a way that it reflects a voltage which corresponds to a Miller plateau of the semiconductor switch. For many IGBTs, this voltage can be between 9.5 volts and 11.5 volts. If a signal level of the reference signal 370 (U.sub.REF) reaches the threshold value 375 (UM), the switch 377 (S1) is opened. The capacitance is now no longer discharged by the current source 373. This can result in the signal level of the reference signal 370 (U.sub.REF) remaining substantially (for example with a maximum change of 10% of the initial signal level) constant for a determined time period. This time period is ended by the closing of switch 376 (S2), and as such a discharge operation of the capacitance is again initiated by the second current source 372.
(39) This time of the closing of the further switch 376 (S2) can be determined by the detection circuit 369, which is designed to detect an end of a Miller plateau in a control input current or a control input voltage of the semiconductor switch 304. In the example shown in FIG. 3, an end of the Miller plateau is determined on the basis of a voltage at the control input of the element having a variable resistance 364 of the driver for the OFF state 358 (U.sub.G_OFF) (for example a gate-voltage of the element having a variable resistance 364). If this voltage falls below a predetermined threshold value UTE, this can indicate an end of a Miller plateau (the coincidence of the end of the Miller plateau with the threshold value being undershot cannot be perfect in this case, but the threshold value being undershot provides a good estimation for the time of the end of the Miller plateau).
(40) An exemplary circuit for generating the threshold value UTE is shown in FIG. 7. In one example, the threshold value UTE is in a range of from 50% to 150% of an expected gate threshold voltage of the element having a variable resistance 364. In another example, the threshold value UTE can be in a range of between 0.3 and 2 volts. In the example shown in FIG. 7, the circuit for generating the threshold value U.sub.TH includes a second element having a variable resistance 799 based on the same technology (an NMOS semiconductor switch in the example shown in FIG. 7) as the element having a variable resistance 764 of the driver for the OFF state. A reference current 785 (I.sub.REF) can be coupled to a control input of the second element 799 (for example the gate terminal) and to a first terminal (for example the drain terminal) of the second element 799. An area or a gate width of the second element 799 can be K times an area or a gate width of the element having a variable resistance 764 of the driver for the OFF state, wherein the reference current 785 (I.sub.REF) is selected such that it is K times a threshold value of the output current of the element having a variable resistance 764 which is designed for the end of the Miller plateau. In one example, the reference current 785 (I.sub.REF) is less than 100 microamperes and K is less than 1%. Given such circuitry, the threshold value UTE can correspond to a voltage at the control input of the second element having a variable resistance 799.
(41) In the example shown in FIG. 3, a voltage at the control input of the element having a variable resistance 364 of the driver for the OFF state 346 (gate voltage of the NMOS 364) can be used for detecting the time at the end of the Miller plateau. However, the time can also be determined on the basis of other signals. In other examples, a current at the control input of the element having a variable resistance 364 of the driver for the OFF state is used in order to determine an end of the Miller plateau. For example, the current at the control input of the element having a variable resistance 364 for the driver for the OFF state 346 can tend towards zero when the end of the Miller plateau is reached. In yet further examples, a control voltage or a control current of the semiconductor switch 304 can be used. In further examples, a collector-emitter voltage of the semiconductor switch or a switch current of the semiconductor switch can be detected in order to detect an end of the Miller plateau.
(42) By closing the switch 376 (S2), the capacitance, starting from the end of the Miller plateau, is discharged at a second rate. This discharge operation can last until the capacitance has been completely discharged (or until the capacitance has been discharged up to a predetermined minimum value). Therefore, the reference signal 370 (U.sub.REF) can have the profile shown in FIG. 4 with two regions with a falling signal level. The first and second rates can in this case be set as desired. For example, the second rate can be twice as high or higher than the first rate. In other examples, the first and second rates are the same.
(43) The reference signal 370 (U.sub.REF) generated by the circuit for generating a control-input reference signal shown in FIG. 3 can include two regions with a falling signal level, with a region with a substantially constant signal level being embedded between said regions. This sequence of regions is not essential, however. For example, the first and/or second rate can vary in time. In other examples, the reference signal 370 (U.sub.REF) can have more than two regions with a falling signal level in which the signal decreases at different rates. Further regions with a substantially constant signal level can be embedded between these regions.
(44) Since the generation of the reference signal 370 (U.sub.REF) has been discussed in the preceding paragraphs, the use of this reference signal 370 (U.sub.REF) for achieving a “soft shutdown” will be described below. In this regard, the reference signal 370 (U.sub.REF) can be compared with a voltage at the control input of the semiconductor switch 330 (U.sub.GE) by the first comparison circuit 368. In response to this comparison, a modified control signal 356 (U.sub.OFF*) for the element having a variable resistance 364 of the driver for the OFF state 346 can be generated. In the example shown in FIG. 3, an OFF signal 352 (U.sub.OFF) is converted into a modified OFF signal 356 (U.sub.OFF*) for this purpose. This can take place in a subtraction circuit 365.
(45) In this way, the variable resistance of the element having a variable resistance 364 can be adjusted in a closed control loop in order to achieve a profile of the voltage at the control input of the semiconductor switch 330 (U.sub.GE) which corresponds to the profile of the reference signal 370 (U.sub.REF). In this way, the semiconductor switch is subjected to “soft shutdown”.
(46) In other examples, the feedback variable for the closed control loop can be a different signal than the voltage at the control input of the semiconductor switch 330 (U.sub.GE), on the basis of which a turn-off operation of the semiconductor switch can be monitored (for example a current at the control input of the semiconductor switch or a collector-emitter voltage of the semiconductor switch). In these cases, it may be necessary to give the reference signal 370 (U.sub.REF) a different profile than that shown in the example of FIG. 3. In these examples too, however, the manipulated variable of the closed control loop can be a resistance of the element having a variable resistance 364 of the driver for the OFF state 346 (or a control signal which varies the resistance of the element having a variable resistance 364).
(47) FIG. 4 shows exemplary signal profiles in a system which has a control circuit for semiconductor switches having the turn-off circuits described herein. The signals in FIG. 4 show two exemplary switching cycles of the semiconductor switch. The first switching cycle (curves on the left-hand side of the page) has a normal profile, while a short-circuit case or overcurrent case occurs in the second switching cycle (curves on the right-hand side of the page). The first curve shows control signals 450 (U.sub.CMD), as are transmitted, for example, from a driver interface 226 in FIG. 2 to the control circuit 228. An ON signal 452 (U.sub.ON) and an OFF signal 454 (U.sub.OFF) can be generated from these control signals 450 (U.sub.CMD). The fifth curve shows a profile of a collector-emitter voltage 422 (V.sub.CE) of the semiconductor switch and a profile of a collector-emitter current 423 (I.sub.CE) of the semiconductor switch. Some characteristics of these profiles have already been explained with respect to FIG. 1B. At the beginning of the second ON period, a fault occurs. The collector-emitter voltage 422 (V.sub.CE) does not drop as severely as would be expected in the normal case. In addition, the collector-emitter current 423 (I.sub.CE) increases to a higher value than in the normal case (an increased fault current 449 (I.sub.FT) is flowing). This can be detected by a short-circuit and/or overvoltage detection circuit, which thereupon outputs a fault signal 448 (U.sub.FLT) shown as the sixth curve in FIG. 4. As a result, a turn-off circuit can be activated in order to ensure “soft shutdown”.
(48) For this purpose, a control-input reference signal 470 (U.sub.REF) can be generated. The exemplary reference signal 470 (U.sub.REF) in FIG. 4 first drops from a predetermined level at a first rate, then remains substantially constant for a time period, which is ended by an end of a Miller plateau of the semiconductor switch. Then the signal level of the reference signal 470 (U.sub.REF) drops at a second rate. As shown in FIG. 4, the turn-off circuit adjusts a gate-emitter voltage 430 (U.sub.GE—illustrated as the third curve from the bottom) of the semiconductor switch to the reference signal 470 (U.sub.REF) when an overcurrent and/or a short circuit is detected. This can have the result that a turn-off operation of the semiconductor switch is extended in comparison with the “hard shutdown” during normal operation. This extension can be identified in FIG. 4 by a comparison of the falling edges of the gate-emitter voltage 430 in the first switching cycle and in the second switching cycle. The delay of the turn-off operation is in this case connected to a detection of an end of the Miller plateau of the semiconductor switch: the semiconductor switch is only ultimately turned off when an end of the Miller plateau has been reached. Thus, hazardously high voltages across the load can be avoided.
(49) The fourth curve in FIG. 4 shows an exemplary OFF signal 456 (U.sub.OFF*) modified by a turn-off circuit (for example the turn-off circuit shown in FIG. 3). This signal can be fed to a control input of an element having a variable resistance of a driver for the OFF state of the semiconductor switch in order to adjust the turn-off operation of the semiconductor switch. In the example shown in FIG. 4, a rising edge of the modified OFF signal 456 (U.sub.OFF*) is longer than a rising edge of the OFF signal 454 (U.sub.OFF). This can result in a turn-on operation of a semiconductor switch in a driver for the OFF state (for example NMOS 364 in FIG. 3) and therefore a turn-off operation of the semiconductor switch (for example IGBT 304 in FIG. 3) being temporally stretched in order to enable a “soft shutdown”. The lowermost curve in FIG. 4 shows a detection signal 458 (U.sub.G_OFF) for a detection circuit 369 which is designed to detect an end of a Miller plateau in a control input voltage or in a corresponding control input current of the semiconductor switch. The detection signal 458 (U.sub.G_OFF) can correspond to the modified OFF signal 456 (U.sub.OFF*) or be generated on the basis of the modified OFF signal 456 (U.sub.OFF*).
(50) FIG. 6 shows simulated signal profiles for a turn-off circuit corresponding to the signals in FIG. 4. In particular, it can be seen in the fourth curve from the top how the profile of a voltage at the gate of the power semiconductor switch (U.sub.GE) to be switched is adjusted to a gate reference signal (V.sub.Gref) by an exemplary turn-off circuit.
(51) FIG. 5 shows an exemplary turn-off circuit 542 in combination with an active clamping circuit. The elements of the turn-off circuit and the driver for the ON state and the OFF state in this case correspond to the respective elements shown in FIG. 3. The turn-off circuit 542 further includes a switch S3 566 which is coupled to the non-inverting input of comparator 568 and the capacitance 570 with control-input reference signal (U.sub.REF). When there is no fault detected (fault signal U.sub.FLT 548 is logic low and the inverted fault signal is logic high), the switch S3 566 is closed and the voltage at the non-inverting input of comparator 568 is substantially equal to return 512. As such, similar to FIG. 3, the modified OFF signal 556 (U.sub.OFF*) is substantially the OFF signal 552 (U.sub.OFF). When a fault is detected (fault signal U.sub.FLT 548 is logic high and switch S4B 576 is on), the control-input reference signal 570 (U.sub.REF) “starts” at a predetermined signal level, which corresponds to the determined reference potential 560 (V.sub.DD). The control-input reference signal 570 (U.sub.REF) is charged to the determined reference potential 560 (V.sub.DD) when switch S4A is on (i.e. when U.sub.ON 554 is logic high). In addition, the turn-off circuit in FIG. 5 can be deactivated, however, when a corresponding signal 560 (U.sub.ACL) indicates this. This means, using the example of FIG. 5, that an active clamping circuit ensures a “soft shutdown” so that the turn-off circuit does not need to become active.
(52) In the example shown in FIG. 5, a signal level of the signal 560 (U.sub.ACL) of approximately zero means that the active clamping circuit is inactive. If an active clamping circuit is active, the signal 560 (U.sub.ACL) has a positive or negative level. This state is detected by the comparison circuits 578, 579 (for example by comparison of the signal level of the signal 560 (U.sub.ACL) with a first (lower) threshold value (E1) and a second (upper) threshold value (E2)). The comparison circuits are coupled to a NOR circuit 580 so that it is detected that the signal level of the signal 560 (U.sub.ACL) is neither above the second threshold value (E2) nor below the first threshold value (E1). Thereupon, a corresponding activation signal 577 (SSD_EN) for the turn-off circuit can be generated. For example, an output of the NOR circuit 580 can be coupled to a data input of a D flipflop 581, in response to the output of which the activation signal 566 (SSD_EN) is generated. The fault signal 548 (U.sub.FLT) can in this case be coupled to the clock input of the D flipflop 581. This is linked to the output signal of the first comparison circuit 568 of the turn-off circuit. If, therefore, the activation signal 566 (SSD_EN) has a high signal level, the turn-off circuit engages in the turn-off operation as described further above. If, on the other hand, the activation signal 566 (SSD_EN) has a low signal level (which indicates operation of an active clamping circuit), the influence of the turn-off circuit is suppressed. In this case, the active clamping circuit ensures a “soft shutdown”. The apparatuses for activating the turn-off apparatus can be provided independently of the existence of an active clamping circuit. If, in a determined control circuit, an active clamping circuit is then provided, the apparatuses for activating the turn-off apparatus can have corresponding circuitry.
(53) In other examples, a selection circuit for selecting between a turn-off circuit and an active clamping circuit can comprise further elements. For example, a current can be fed to the input for the signal 560 (U.sub.ACL) prior to each turn-off operation. The additional current provided by the internal circuit and sourced to the same net (i.e. U.sub.ACL in FIG. 5) may be used to test if a current provided to this net would lead to a voltage at the net. If that is the case, an active clamping signal may be effective. In addition, a duration of an output pulse of the flipflop 581 in response to which the activation signal 566 (SSD_EN) is generated can be extended to a predetermined minimum duration. Alternatively, a duration of an output pulse of the comparison circuits 578, 579 can be extended to a predetermined minimum duration. With these measures, a susceptibility to faults of the selection circuit can be reduced. The above description of the examples illustrated of the present invention is not intended to be exhaustive or restricted to the examples. While specific embodiments and examples of the invention are described herein for illustrative purposes, various modifications are possible without departing from the present invention. The specific examples of voltage, current, frequency, power, range values, times, etc., are merely illustrative such that the present invention can also be implemented with other values for these variables.
(54) These modifications can be implemented using examples of the invention in the light of the above-detailed description. The terms which are used in the claims which follow should not be interpreted as restricting the invention to the specific embodiments which are disclosed in the description and claims. The present description and the figures are to be regarded as illustrative and not as restrictive.
