Chip electronic component and board having the same
11469030 · 2022-10-11
Assignee
Inventors
Cpc classification
H01F2017/048
ELECTRICITY
H01F2017/0073
ELECTRICITY
International classification
H01F27/29
ELECTRICITY
Abstract
There are provided a chip electronic component and a board having the same. The chip electronic component includes: a substrate; a first internal coil part disposed on one surface of the substrate; a second internal coil part disposed on the other surface of the substrate opposing one surface thereof; a via penetrating through the substrate to connect the first and second internal coil parts to each other; and first and second via pads disposed on one surface and the other surface of the substrate, respectively, to cover the via, wherein the first and second via pads are extended in a direction toward portions of the first and second internal coil parts adjacent thereto.
Claims
1. A chip electronic component comprising: a substrate; a first internal coil part disposed on a first surface of the substrate; a second internal coil part disposed on a second surface of the substrate opposing the first surface thereof; a via penetrating through the substrate to connect the first and second internal coil parts to each other; first and second via pads disposed on the first surface and the second surface of the substrate, respectively, to cover the via; and a magnetic body enclosing the first and second internal coil parts, wherein a portion of the first or second internal coil part disposed directly adjacent to the respective first or second via pad includes a first side having a recess accommodating the respective first or second via pad, and a second side opposing the first side, and the second side has a curvature that remains substantially the same as a curvature of a neighboring area in the first or second internal coil part disposed directly adjacent to the respective first or second via pad.
2. The chip electronic component of claim 1, wherein the portion of the first or second internal coil part is insulated from the first or second via pad.
3. The chip electronic component of claim 2, wherein a center of the recess and a center of the first or second via pad coincide with each other.
4. The chip electronic component of claim 1, wherein the first via pad is formed by extending one end portion of the first internal coil part, and the second via pad is formed by extending one end portion of the second internal coil part.
5. The chip electronic component of claim 1, wherein the first and second internal coil parts and the first and second via pads are formed by plating.
6. The chip electronic component of claim 1, wherein the first or second via pad and the portion of the first or second internal coil part have an interval of 3 μm or more therebetween.
7. A chip electronic component comprising: a substrate; a first internal coil part disposed on a first surface of the substrate; a second internal coil part disposed on a second surface of the substrate opposing the first surface thereof in a direction; a via penetrating through the substrate to connect the first and second internal coil parts to each other; first and second via pads disposed on the first surface and the second surface of the substrate, respectively, to cover the via; and a magnetic body enclosing the first and second internal coil parts and overlapping the via in said direction, wherein a portion of the first or second internal coil part disposed directly adjacent to the respective first or second via pad includes a first side having a recess accommodating the respective first or second via pad, and a second side opposing the first side, and both neighboring areas, with respect to a winding direction of the first or second internal coil part, of said portion of the first or second internal coil part directly adjacent to the respective first or second via pad are disposed radially farther than the respective first or second via pad.
8. The chip electronic component of claim of 7, wherein the second side has a curvature that remains substantially the same as a curvature of a neighboring area in the first or second internal coil part disposed directly adjacent to the respective first or second via pad.
9. The chip electronic component of claim of 7, wherein the portion of the first or second internal coil part is insulated from the first or second via pad.
10. The chip electronic component of claim of 9, wherein a center of the recess and a center of the first or second via pad coincide with each other.
11. The chip electronic component of claim 7, wherein the first via pad is formed by extending one end portion of the first internal coil part, and the second via pad is formed by extending one end portion of the second internal coil part.
12. The chip electronic component of claim 7, wherein the first and second internal coil parts and the first and second via pads are formed by plating.
13. The chip electronic component of claim 7, wherein the first or second via pad and the portion of the first or second internal coil part have an interval of 3 μm or more therebetween.
14. A chip electronic component comprising: a substrate; a first internal coil part disposed on a first surface of the substrate; a second internal coil part disposed on a second surface of the substrate opposing the first surface thereof in a direction; a via penetrating through the substrate to connect the first and second internal coil parts to each other; first and second via pads disposed on the first surface and the second surface of the substrate, respectively, to cover the via; and a magnetic body enclosing the first and second internal coil parts and overlapping the via in said direction, wherein a portion of the first or second internal coil part disposed directly adjacent to the respective first or second via pad includes a first side having a recess accommodating the respective first or second via pad, and a second side opposing the first side, and a shape of the second side is similar to a shape of a neighboring area in the first or second internal coil part disposed directly adjacent to the respective first or second via pad.
15. The chip electronic component of claim 14, wherein the second side has a curvature that remains substantially the same as a curvature of a neighboring area in the first or second internal coil part disposed directly adjacent to the respective first or second via pad.
16. The chip electronic component of claim of 14, wherein the portion of the first or second internal coil part is insulated from the first or second via pad.
17. The chip electronic component of claim of 16, wherein a center of the recess and a center of the first or second via pad coincide with each other.
18. The chip electronic component of claim 14, wherein the first via pad is formed by extending one end portion of the first internal coil part, and the second via pad is formed by extending one end portion of the second internal coil part.
19. The chip electronic component of claim 14, wherein the first and second internal coil parts and the first and second via pads are formed by plating.
20. The chip electronic component of claim 14, wherein the first or second via pad and the portion of the first or second internal coil part have an interval of 3 μm or more therebetween.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1) The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
(2)
(3)
(4)
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DETAILED DESCRIPTION
(7) Exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.
(8) The disclosure may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
(9) In the drawings, the shapes and dimensions of elements may be exaggerated for clarity, and the same reference numerals will be used throughout to designate the same or like elements.
(10) Chip Electronic Component
(11) Hereinafter, a chip electronic component according to an exemplary embodiment of the present disclosure will be described. Particularly, a thin film type inductor will be described, but the present disclosure is not limited thereto.
(12)
(13) Referring to
(14) The chip electronic component 100 according to an exemplary embodiment of the present disclosure may include a magnetic body 50, internal coil parts 41 and 42 buried in the magnetic body 50, and first and second external electrodes 81 and 82 disposed on an outer portion of the magnetic body 50 to thereby be electrically connected to the internal coil parts 41 and 42.
(15) In the chip electronic component 100 according to an exemplary embodiment of the present disclosure, a ‘length’ direction refers to an ‘L’ direction of
(16) The magnetic body 50 may form the exterior of the chip electronic component 100 and may be formed of any material capable of exhibiting magnetic characteristics. For example, the magnetic body 50 may be formed by filling ferrite or magnetic metal powder.
(17) Examples of the ferrite may include Mn—Zn based ferrite, Ni—Zn based ferrite, Ni—Zn—Cu based ferrite, Mn—Mg based ferrite, Ba based ferrite, Li based ferrite, or the like.
(18) The magnetic metal powder may contain any one or more selected from the group consisting of Fe, Si, Cr, Al, and Ni. For example, the magnetic metal powder may contain Fe-Si-B-Cr-based amorphous metal, but the present disclosure is not necessarily limited thereto.
(19) The magnetic metal powder may have a particle diameter of 0.1 μm to 30 μm and be contained in a form in which the magnetic metal powder is dispersed in a thermosetting resin such as an epoxy resin, polyimide, or the like.
(20) A first internal coil part 41 having a coil shape may be formed in one surface of a substrate 20 disposed in the magnetic body 50, and a second internal coil part 42 having a coil shape may be formed on the other surface opposing one surface of the substrate 20.
(21) The first and second internal coil parts 41 and 42 may be formed in a spiral shape and be formed by performing an electroplating method.
(22) Examples of the substrate 20 may include a polypropylene glycol (PPG) substrate, a ferrite substrate, a metal-based soft magnetic substrate, and the like.
(23) A central portion of the substrate 20 may be penetrated to thereby form a hole, and the hole is filled with a magnetic material to thereby form a core part 55.
(24) As the core part 55 filled with the magnetic material is formed, inductance Ls may be improved.
(25)
(26) Referring to
(27) First and second via pads 43 and 44 may be formed on one surface and the other surface of the substrate 20, respectively, to cover the via 45.
(28) The first via pad 43 may be formed by extending one end portion of the first internal coil part 41, and the second via pad 44 may be formed by extending one end portion of the second internal coil part 42.
(29) The first and second via pads 43 and 44 may be formed by performing an electroplating method similarly to the first and second internal coil parts 41 and 42.
(30) In general, a via is positioned on a straight line with an internal coil portion, and an open defect due to misalignment of the via may occur.
(31) In the case of forming a via pad in order to prevent the open defect as described above, there is a tendency to increase an area of the via pad, which limits implementation of miniaturization and high inductance of a chip electronic component.
(32) Meanwhile, as the via pad having a large area as described above is also disposed in a direction toward a core implementing inductance (Ls), an area of an internal core part is decreased, such that inductance may be decreased in a process of miniaturizing the chip electronic component.
(33) That is, as the area of the via pad is increased, the area of the core part may be decreased, and a magnetic material filled in the core part may be decreased, such that inductance (Ls) characteristics may be decreased.
(34) According to an exemplary embodiment of the present disclosure, in order to solve the above-mentioned problems, the first and second via pads 43 and 44 may be extended in a direction toward portions of the first and second internal coil parts 41 and 42 adjacent thereto.
(35)
(36) Referring to
(37) Shapes of the first and second via pads 43 and 44 are not limited, but generally, the first and second via pads 43 and 44 may have a circular shape to be equal to a shape of the via.
(38) The first and second via pads 43 and 44 may be disposed to be biased towards the first and second internal coil parts 41 and 42, unlike a disposition shape of a general product.
(39) Since the first and second via pads 43 and 44 are disposed as described above, the area of the core part 45 may be increased as compared to the related art, and the magnetic material filled in the core part is increased, such that inductance (Ls) characteristics may be improved.
(40) In addition, the open defect that electric connection is cut due to the via 45 and the via pads 43 and 44 that are not aligned to coincide with each other but are misaligned may be prevented, and the area of the core part 55 in which the magnetic material is filled may be secured as much as possible, such that high inductance (Ls) may be secured.
(41) The portions of the first and second internal coil parts 41 and 42 adjacent to the first and second via pads 43 and 44 are formed as recessed portions to be insulated from the first and second via pads 43 and 44.
(42) That is, according to an exemplary embodiment of the present disclosure, the first and second via pads 43 and 44 are extended in the direction toward the portions of the first and second internal coil parts 41 and 42 adjacent thereto in order to implement high inductance (Ls) of the chip electronic component, such that a short-circuit defect may occur. Therefore, in order to prevent the short-circuit defect, the recessed portions may be formed in the portions of the first and second internal coil parts 41 and 42 adjacent to the first and second via pads 43 and 44.
(43) The shapes of the recessed portions are not particularly limited as long as the recessed portions are formed to insulate the first and second internal coil parts 41 and 42 and the first and second via pads 43 and 44 from each other.
(44) According to an exemplary embodiment of the present disclosure, the centers of the recessed portions and the centers of the first and second via pads 43 and 44 may coincide with each other.
(45) That is, the recessed portions may have a shape in which the recessed portions are equally divided based on the first and second via pads 43 and 44.
(46) Meanwhile, according to an exemplary embodiment of the present disclosure, an interval d between the first and second via pads 43 and 44 and the first and second internal coil parts 41 and 42 adjacent thereto may be 3 μm or more, but is not necessarily limited thereto.
(47) The first and second internal coil parts 41 and 42 adjacent to the first and second via pads 43 and 44 may be insulated from the first and second via pads 43 and 44 by adjusting the interval d between the first and second via pads 43 and 44 and the first and second internal coil parts 41 and 42 adjacent thereto to be 3 μm or more.
(48) In the case in which the interval d between the first and second via pads 43 and 44 and the first and second internal coil parts 41 and 42 adjacent thereto is less than 3 μm, a short-circuit defect may occur.
(49) According to an exemplary embodiment of the present disclosure, since the first and second via pads 43 and 44 are disposed to be biased toward the first and second internal coil parts 41 and 42, the area of the core part 55 may be increased as compared to the related art, and accordingly, the magnetic material filled in the core part may be increased, thereby improving inductance (Ls) characteristics.
(50) That is, even though the chip electronic component is miniaturized, the area of the core part may be secured to be large due to the disposition of the via pad as described above, such that the filled magnetic material may be increased, and accordingly, high inductance chip electronic component may be implemented.
(51) The first and second internal coil parts 41 and 42, the via 45, and the first and second via pads 43 and 44 may be formed of a metal having excellent electric conductivity. For example, the first and second internal coil parts 41 and 42, the via 45, and the first and second via pads 43 and 44 may be formed of silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu), platinum (Pt), an alloy thereof, or the like.
(52)
(53) Referring to
(54) However, the present disclosure is not necessarily limited thereto, but the first and second lead portions 46 and 47 may be exposed to at least one surface of the magnetic body 50.
(55) The first and second external electrodes 81 and 82 may be disposed on both end surfaces of the magnetic body 50 in the length (L) direction to be connected to the first and second lead portions 46 and 47 exposed to both end surfaces of the magnetic body 50 in the length (L) direction, respectively.
(56) The first and second external electrodes 81 and 82 may be formed of a metal having excellent electric conductivity. For example, the first and second external electrodes 81 and 82 may be formed of one of nickel (Ni), copper (Cu), tin (Sn), silver (Ag), and the like, an alloy thereof, or the like.
(57) Board Having Chip Electronic Component
(58)
(59) Referring to
(60) In this case, the chip electronic component 100 may be electrically connected to the printed circuit board 210 by solders 230 in a state in which first and second external electrodes 81 and 82 are positioned on the first and second electrode pads 211 and 212 to contact the first and second electrode pads 221 and 222, respectively.
(61) Internal coil parts 41 and 42 of the mounted chip electronic component 100 may be disposed horizontally with respect to amounting surface of the printed circuit board 210.
(62) Except for the description described above, a description of features overlapped with those of the above-mentioned chip electronic component according to an exemplary embodiment of the present disclosure will be omitted.
(63) As set forth above, according to exemplary embodiments of the present disclosure, the area of the core may be sufficiently secured by disposing the via pad in the direction toward the coil adjacent to the via, such that a loss of the inductance caused by the area of the via pad may be prevented.
(64) While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present invention as defined by the appended claims.