REAR JUNCTION BIFACIAL POLY-SI/SIOX PASSIVATED CONTACT SOLAR CELLS AND METHOD OF MANUFACTURING THE SAME

Abstract

Disclosed is a highly efficient rear junction Tunnel oxide passivated contact (TOPCon) solar cell photovoltaic cell with TOPCon on both sides. Further disclosed are laser etching and screen printing methods for patterning the TOPCon. Further disclosed is a tandem cell having a TOPCon cell as a bottom cell. Low-cost, manufacturable screen printed TOPCon on both sides of a solar cell to exploit the full potential of this technology and concept. The TOPCon can be fabricated on the front side to be selectively placed under a metal grid with 5% area coverage, while the remaining 95% area on the front has an undiffused Si wafer passivated with AI2O3/SiN dielectric.

Claims

1.-59. (canceled)

60. A method of forming a double-sided (DS) tunnel oxide passivated contact (TOPCon) photovoltaic cell device comprising: a) growing an intrinsic i-poly-Si on top of a tunnel oxide on a first (front) and a second (back) side of a substrate simultaneously; b) depositing a boron doped glass on the second side of the substrate; c) depositing an undoped silicon glass (USG) on the boron doped glass; and d) simultaneously forming a n-TOPCon on the first side and a p-TOPCon on the second side of the substrate by a single step high temperature treatment comprising exposing the substrate formed in c) to (i) a first temperature for a first predefined time and then to (ii) a second temperature for a second predefined time.

61. The method of claim 60, wherein the substrate formed in step c) at the first temperature is exposed to a nitrogen gas for the first predetermined time, wherein the first temperature is 810 C.-950 C. and the first time is 30-60 min, thereby diffusing boron into poly-Si and forming the p-TOPCon on the second side of the substrate.

62. The method of claim 61, exposing the substrate to a POCl.sub.3 at the second temperature for the second predefined time, wherein the second temperature is 840 C.-950 C. and the second predefined time is 30 min, thereby diffusing phosphorus into poly-Si and forming the n-TOPCon on the first side of the substrate.

63. The method of claim 60, wherein the first side is textured or planar.

64. The method of claim 60, wherein the method further comprises forming an asymmetric thickness DS TOPCon by exposing the substrate formed in step d) to an etch solution configured to etch the n-TOPCon at a higher rate than the p-TOPCon for a third time sufficient to obtain a first thickness of n-TOPCon and a second thickness of the p-TOPCon, wherein the first thickness is smaller than the second thickness.

65. The method of claim 64, wherein the first thickness is 20 nm and the second thickness is 100-200 nm, and wherein the third time is 2 min.

66. The method of claim 64, further comprising depositing a dielectric material on the n-TOPCon and/or p-TOPCon.

67. The method of claim 66, further comprising forming ohmic contacts on the first and/or second side of the DS TOPCon photovoltaic cell device.

68. The method of claim 64, further comprising forming a back junction double side TOPCon cell architecture.

69. The method of claim 68, wherein the back junction double side TOPCon cell architecture exhibits a metalized recombination current density (J.sub.0) of 10 fA/cm.sup.2.

70. The method of claim 60, further comprising: selectively etching the n-TOPCon formed in step d) by a) exposing the n-TOPCon to an ultraviolet source in a predetermined pattern to form a masked portion; and b) etching a non-mask portion to form a patterned portion of the n-TOPCon.

71. The method of claim 70, wherein the patterned portion of the n-TOPCon is less than or equal to 5% of the n-TOPCon formed in step d).

72. The method of claim 70, wherein a thickness of the n-TOPCon and p-TOPCon is substantially the same.

73. The method of claim 70, wherein the ultraviolet source is a laser.

74. The method of claim 70, further comprising deposing a dielectric material on the patterned portion of the n-TOPCon.

75. The method of claim 74, further comprising forming metal contacts on the patterned portion of the n-TOPCon.

76. The method of claim 70, further comprising forming a back junction double side TOPCon cell architecture.

77. The method of claim 76, wherein the back junction double side TOPCon cell architecture exhibits a metalized recombination current density (J.sub.0) of 10 fA/cm.sup.2.

78. An apparatus comprising: a tunnel oxide passivated contact (TOPCon) photovoltaic cell device which is a double-sided (DS) TOPCon that comprises: a substrate having a first side and a second side; a first tunnel oxide selective passivating contact on the first side of the substrate comprising a n-doped poly-Si/SiO.sub.x contact layer (n-TOPCon); and a second tunnel oxide selective passivating contact on the second side of the substrate comprising a p-doped poly-Si/SiO.sub.x contact layer (p-TOPCon); wherein the n and p-doped poly-Si/SiO.sub.x contact layers have metalized recombination current density (J.sub.0) of 10 fA/cm.sup.2, and wherein the n and p-doped poly-Si/SiO.sub.x contact layers are simultaneously formed in a single high-temperature treatment.

79. The apparatus of claim 78, wherein the n-doped poly-Si/SiO.sub.x contact layer has a thickness of 20 nm and the p-doped poly-Si/SiO.sub.x contact layer has a thickness of 100-200 nm.

80. The apparatus of claim 78, wherein the n-doped poly-Si/SiO.sub.x contact layer has a thickness of 100-200 nm and the p-doped poly-Si/SiO.sub.x contact layer has a thickness of 100-200 nm, and wherein the n-doped poly-Si/SiO.sub.x contact layer is selectively etched to cover less than or equal to 5% of the first side of the substrate.

81. The apparatus of claim 80, further comprising a metal grid deposited on the n-doped poly-Si/SiO.sub.x contact layer and wherein a remaining area on the first side has an undiffused Si wafer passivated with a dielectric such that the device exhibits no diffusion in between metal grid lines.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying figures, which are incorporated herein and form part of the specification, illustrate Poly-Si/SiOx passivated contact solar cells and method of making the same. Together with the description, the figures further serve to explain the principles of the Poly-Si/SiOx passivated contact solar cells and method of making the same described herein and thereby enable a person skilled in the pertinent art to make and use the Poly-Si/SiOx passivated contact solar cells and method of making the same.

[0017] FIG. 1 illustrates an example DS-TOPCon cell structure and efficiency.

[0018] FIG. 2 shows computer modeling parameters for a DS-TOPCon cell according to principles described herein.

[0019] FIG. 3 illustrates an advantage of an exemplary rear junction cell over the traditional front junction cell.

[0020] FIG. 4 shows a simulated technology roadmap developed for proposed DS-TOPCon cell according to principles described herein.

[0021] FIG. 5 illustrates development of Recipe for ex-situ doped n- and p-TOPCon using APCVD B glass and POCl.sub.3 diffusion.

[0022] FIG. 6 illustrates a process sequence for co-diffused DS-TOPCon structure and final cell precursor.

[0023] FIG. 7 illustrates selective laser oxidation technology for pattering poly-Si fingers according to principles described herein.

[0024] FIG. 8 shows a demonstration of Oxide Growth using UV lasersubpart 8(a), shows passivation quality after SiNx, subpart 8(b) shows a simulated firing process, and subpart 8(c) shows pattering ability of the oxide mask.

[0025] FIG. 9 shows another example DS-TOPCon Cell Structure and Efficiency

[0026] FIG. 10 computer modeling parameters for a DS-TOPCon cell according to principles described herein.

[0027] FIG. 11 shows the advantage of the exemplary rear junction cell over the traditional front junction cell.

[0028] FIG. 12 shows a simulated technology roadmap developed for proposed DS-TOPCon Cell according to principles described herein.

[0029] FIG. 13 shows a cell structure and process flow, and cell performance with 35 nm n-TOPCon according to principles described herein.

[0030] FIG. 14 illustrates process flow of DS-TOPCon precursor (left) and cross-sectional schematic diagrams of DS-TOPCon precursor in process (right) according to principles described herein.

[0031] FIG. 15 illustrates development of receipt for ex-situ Doped N- and P-TopCon using APCVD B glass and POCL.sub.3 diffusion.

[0032] FIG. 16 shows the measured iV.sub.oc and iFF of finished DS-TOPCon precursor with there different pre-annealing temperatures.

[0033] FIG. 17 shows a comparison of etching rate between n-poly-Si and p-poly-Si.

[0034] FIG. 18 shows a comparison of etching rate between n-poly-Si and p-poly-Si.

[0035] FIG. 19 shows schematic images from symmetric DS-TOPCon to asymmetric n-TOPCon with 200 nm p-TOPCon on back and only 20 nm textured n-poly on front after selective etching.

[0036] FIG. 20 is a schematic diagram illustrating a selective DS-TOPCon solar cell featuring patterned front iOx/n+ poly-Si and rear iOx/p+ poly-Si.

[0037] FIGS. 21(a)-(d) are schematic diagrams of symmetric test structures;

[0038] FIG. 21(e) shows a summary of measured J.sub.0 before and after high temperature firing

[0039] FIG. 22 shows simulated cell efficiency of RJ selective DS-TOPCon cell structure as a function of front J.sub.0, field.

[0040] FIG. 23 is a schematic of another cell structure according to principles described herein.

[0041] FIG. 24 is a schematic of a fabricated cell structure.

[0042] FIG. 25 shows a Quokka 2 simulation of the effect of poly-finger width and thickness on cell efficiency.

[0043] FIG. 26 is a plan view scanning electron micrograph showing obtained widths of laser marked lines.

[0044] FIG. 27(a) is a plan view photograph of a laser patterned sample capped with silicon nitride showing multiple poly-fingers and a busbar. FIG. 27(b) is cross-section image of a single texturing pyramid in the field region. FIG. 27(c) is a rounded pyramid in the poly-finger region showing presence of Poly-Si after KOH etching.

[0045] FIG. 28 shows an ECV active dopant profile of phosphorus in the front n poly-Si.

DETAILED DESCRIPTION

[0046] To facilitate an understanding of the principles and features of various embodiments of the present invention, they are explained hereinafter with reference to their implementation in illustrative embodiments.

[0047] A DS-TOPCon cell design is first disclosed with selective poly-Si contacts on the front, only below the metal contacts. The TOPCon area coverage on the front may be only 5% to prevent absorption in poly-Si. The remaining 95% area may be a bare Si wafer coated with Al.sub.2O.sub.3/SiN coating, which provides as good passivation, like TOPCon. This resulted in J.sub.0 or Voc comparable to full area DS-TOPCon but with no appreciable absorption in front poly-Si. It also allows the use of thick poly on the front without risking the J.sub.0 degradation due to screen-printed contacts. The modeling shows this cell structure can produce 25% efficiency cells. Parameters to achieve an approximately >25% cell efficiency may be specified by detailed computer modeling. One advantage of the presently disclosed devices and methods of manufacturing is lowered production costs, but such is not the only motivation, advantage or innovation. Cell efficiency and streamlined production are significant advantages over prior devices and methods.

[0048] Experimental formation of a low-cost DS-TOPCon precursor is described herein using only one high-temperature step and no masking steps. In this process B is diffused into the back intrinsic poly using boronsilicate glass (BSG) and Phosphorus P is diffused into the front intrinsic poly by POCL.sub.3 diffusion during the same high-temperature cycle without any cross doping. We demonstrated that this low-cost process also gives excellent J.sub.0 and implied Voc values consistent with 25% efficiency.

[0049] Patterning of front poly is demonstrated by selective UV laser oxidation, followed by KOH etching of poly. A 1-4 nm laser-grown oxide was found to be sufficient for masking during the KOH etching, resulting in well-defined poly-Si fingers. Screen-printed contacts are formed on top of these poly fingers by firing through a SiN coating. It was shown that SiN deposition restores the laser-induced degradation of J.sub.0. This unique process was successfully demonstrated.

[0050] Examples of various cell structures according to principles described herein are provided throughout this specification.

Example #1: Cell Structure, Modelling and Design to Attain Screen Printed 25% Efficiency Bifacial Selective Area DS-TOPCon Cell

[0051] The concepts, detailed computer modeling, and understanding of example solar cells as provided herein are summarized in FIGS. 1-4, which show that the proposed selective area double side TOPCon cell structure with rear junction design on n-base Si can produce 25% efficiency at a low-cost. Figure land 2 show that the proposed cell structure with 100-200 nm full area p-TOPCon on the rear and 100-200 nm textured selective area n-TOPCon underneath the metal grid on the front with screen-printed contacts on both sides can produce 25% efficiency. Modeling in FIG. 2 shows that this can use total recombination current J.sub.0 of 27 fA/cm.sup.2, with 5 fA/cm.sup.2 coming from the front side n-TOPCon, 13 fA/cm.sup.2 from bulk Si, and 9 fA/cm.sup.2 from the rear p-TOPCon. These are quite achievable using DS-TOPCon concept and n-base solar cell.

[0052] Detailed modeling in FIG. 2 also reveals a list of all the practically achievable parameters to achieve 25% efficiency with this cell design, although the parameters may be varied without departing from the spirit and scope of the invention. In fact, most material parameters for each layer have already been achieved in our lab. The technologies used may be conducive to mass production at a low cost. The design feature involves a rear junction formed with p-TOPCon on n-Si on the backside. FIG. 3 shows the advantage of an exemplary rear junction cell over the traditional front junction cell. Note that the front junction design will prevent the use of thinner poly-Si to avoid significant absorption and resistive losses in the front poly-Si layer. However, in a rear junction device, efficiency becomes insensitive to the thickness and sheet resistance of front n-poly Si, without any penalty in carrier transport and collection of electrons on the front of the device. FIG. 3 shows that the rear junction device can produce, perhaps, >1% higher efficiency than a front junction device.

[0053] FIG. 4 gives a step-by-step technology roadmap to achieve approximately 25% efficiency from this cell design by quantifying the benefit of each proposed technology enhancement and innovation.

[0054] Thus, the disclosed structure and modeling can potentially achieve; 25% efficiency in a cell design. Accordingly, the present disclosure describes systems and methods to (1) Develop n+ and p+ doped poly-Si/SiOx contact layers with metalized recombination current density (J.sub.0) of <10 fA/cm.sup.2; (2) Reduce bulk defects, optimize lifetime (>3 ms) and resistivity to achieve J.sub.0 bulk of 10 fA/cm.sup.2; (3) reduce parasitic absorption by depositing selective area thick TOPCon under the metal grid with 5% coverage and no diffusion in between the grid lines on the front; (4) Develop advanced screen-printing paste and firing conditions to make ohmic contacts to 200 nm poly-Si without compromising J.sub.0 and fill-factor (FF>82.5%); and (5) Implement back junction cell design to desensitize the cell performance with respect to the front poly sheet resistance.

[0055] Modeling described herein demonstrates that fabrication of low-cost double side selective area TOPCon back junction (n+np+) cell with the design and material parameters above can produce low-cost fully screen-printed bifacial cells with Voc 726 mV, Jsc 42 mA/cm.sup.2, FF 0.82 and 25%.

Example #2. Process to Fabricate High-Quality Double Side TOPCon Prior to Patterning the Front Side

[0056] Besides the proposed cell design, modelling, and efficiency potential of this cell structure, provided is a novel way to produce a low-cost DS-TOPCon precursor. This involves growing a 100-200 nm undoped intrinsic i-poly-Si layer on top of a tunnel oxide on both sides of the wafer by LPCVD (low-pressure chemical vapor deposition) at 580 C. As demonstrated, 15 thick tunnel oxide is grown by chemical oxidation of Si in HNO.sub.3 at 100 C. prior to LPCVD of intrinsic poly on both sides. Next, we deposit APCVD grown borosilicate glass (BSG) is deposited only on the backside and then capped with APCVD grown thick SiOx (FIG. 6). This sample is then heat-treated for 30 min in a POCL.sub.3 ambient in a tube furnace to form n-TOPCon on the front at 850 C. by diffusing P into the intrinsic front poly-Si. Note that Phosphorus diffusion on the back is blocked by thick APCVD SiOx on the rear side. We found that 850 C. is not sufficient to drive enough B from APCVD BSG on the backside. 950 C./30 min heat treatment may be applied to achieve desired sheet resistance of 150 ohms/.

[0057] This led to the development of a heat treatment profile shown in FIG. 5 involving 950 C./1 hour heat treatment in N2 first to drive sufficient B on the backside followed by lowering the temp to 840 C. followed by POCl.sub.3 diffusion for 30 min to form n-TOPCon during the same thermal cycle. Thus, in a single high temperature step, both n and p type TOPCons are formed without any auto doping or cross diffusion due to the presence of thick oxide on the back. Thick oxide not only blocks P diffusion on the backside but also prevents B from diffusing out onto the front side. Thus, there are no masking steps required, which makes the process very simple, elegant, and inexpensive. FIG. 6 shows that a DS-TOPCon precursor formed by this unique process resulted in an excellent J.sub.0 value of 20 fA/cm.sup.2 with an implied Voc of 725 mV, appropriate for a 25% efficiency cell.

Example #3: Low-Cost Process to Pattern Poly-Si to Form Selective Front TOPCon for DS-TOPCon Cell Fabrication

[0058] This section describes a method to form selective n-TOPCon on front. FIG. 7 shows that this concept uses a UV laser (530 nm) of appropriate power to rapidly oxidize poly-Si with a thickness of 1-4 nm, which is sufficient to mask poly-Si during etching in dilute KOH solution.

[0059] A study has successfully demonstrated both the oxidation and masking operations. In addition, the study found that after laser oxidation, the J.sub.0 of TOPCon is degraded appreciably. However, when the study coat the poly-Si with a nitrite coating for screen print firing, the degraded J.sub.0 or TOPCon passivation is restored dramatically to a level appropriate for 25% cells. These results are shown in FIG. 8. To our knowledge, this has never been done for solar cell applications.

Experimental Results and Examples

[0060] Additional experimental results and examples are provided herein in Appendix An and Appendix B, each of which is incorporated by reference herein in its entirety.

Discussion

[0061] Compared to the 19-22% efficient lower cost full Al-BSF and PERC cells, which account for 95% of the market share today, double side TOPCon cells can achieve much higher efficiency (25%) because all the doped and metalized regions are displaced outside the Si absorber. On the other hand, compared to the current 25% HIT and IBC cells, the disclosed TOPCon cell technology is very simple with low capex because of the inexpensive metallization and elimination of all the processing steps that are often used to remove, pattern, or etch deposited layers. The disclosed low-cost double side TOPCon cell can open the pathways for low-cost Si/perovskite type tandem solar cells with an efficiency potential of over 30%.

[0062] Poly-Si/SiO.sub.x carrier selective passivating contacts are an ideal candidate for next-generation solar cells because heavily doped regions, as well as metal contacts, are physically decoupled from the Si substrate via an ultra-thin tunnel oxide (15 , similar to the role of intrinsic a-Si layer in the >25% efficient HIT cells). However, poly-Si/SiO.sub.x contacts are much more thermally stable than a-Si-based HIT contacts and can withstand high firing temperatures (>700 C.) required for the lowest-cost high-throughput screen-printed contacts. When n.sup.+ poly-Si is deposited on top of tunnel oxide, it becomes electron selective contact (n-TOPCon) and vice versa for p-TOPCon. This is because heavily doped n.sup.+-poly-Si on top of tunnel oxide accumulates electrons and repels the minority carrier holes at the tunnel oxide/n-Si interface due to appropriate n.sup.+n band bending. These electrons are easily able to tunnel through the oxide from n-Si into the n.sup.+-poly while holes are blocked from entering the n.sup.+ poly, making it an electron selective contact and virtually eliminating hole recombination in the n.sup.+ region and metal contact. Similarly, p-TOPCon allows only the holes to tunnel through, making it a hole selective contact and reducing the electron recombination in the p.sup.+ region and metal contact. The interface recombination at the tunnel oxide-Si interface defects is also reduced due to the presence of an accumulation layer. Because of this dramatic reduction of minority carrier recombination in the heavily doped regions, metal contacts, and interface, extremely low J.sub.0 values (<5 fA/cm.sup.2) and high cell efficiency can be achieved.

[0063] Several groups have reported efficiencies exceeding 25% on laboratory-scale TOPCon cells employing single side poly-Si based passivated contacts (Fraunhofer ISE and ISFH). Two cell manufacturers, Trina Solar and Jolywood, have started pilot production of single side n-TOPCon cells with an efficiency of 22.5%. Some prominent examples of high-efficiency R&D cells with passivated contacts in the literature include 26.7% Si heterojunction IBC cells by Kaneka (Yoshikawa et al. Nature Energy 2017), 25.2% tunnel layer passivated IBC cell by SunPower (Smith et al. IEEE PVSC 2016), 26.1% poly-Si on oxide (POLO) IBC cell by ISFH (Haase et al. Solmat 2018), and 25.7% single side rear n-TOPCon cell by Fraunhofer ISE (Richter et al. Solmat 2017) with conventional B diffusion on the front, evaporated and photolithography contacts. The 26% TOPCon cells were realized on a small area (<16 cm.sup.2) with non-manufacturable technologies, but they provide the existence proof of the potential of this concept for achieving very high efficiency even with a single side TOPCon.

[0064] Even though Poly-Si based passivated contact technology offers a solution to reducing diffusion and metal contact-induced recombination losses in bulk Si, so far it has primarily been confined to the rear of the cell because of high parasitic absorption losses in poly-Si [Yang et al. APL 2018] and inability to make good screen-printed contacts to very thin front poly-Si layers without compromising passivation quality and J.sub.0 (Padhamnath et al. Solmat 2019).

[0065] Young et al. [1] attempted to fabricate selective area TOPCon contacts by reactive ion etching (RIE), but reported a loss of performance due to non-uniform etching and etching-induced loss of surface passivation. Attempts have also been made to fabricate selective area TOPCon using shadow masks for deposition of poly [2] and lithography-defined [3] patterns, but they are not industrially compatible.

[0066] In contrast, the instant method and system can be employed in a very simple low-cost way to passivate front and back surfaces of silicon wafers with opposite doping polarity (n and p). The approach, in some embodiments, involves only one high-temperature step with no masking step. The process can also include a simple and rapid method to pattern poly-Si using laser-induced selective oxidation, which can give much higher solar cell efficiency by increasing the voltage without losing current due to absorption in front side poly-Si.

[0067] The exemplary double-sided (DS) TOPCon cell device and method provide a unique opportunity to meet the cost and efficiency targets simultaneously. Compared to the lower cost full AlBSF and PERC cells, which account for 95% of the market share today, the exemplary DS-TOPCon cells can achieve much higher efficiency (25%) because all the doped and metalized regions are displaced outside the Si absorber. Compared to the current 25% cells, the exemplary method of fabrication of DS-TOPCon cells is very straightforward with low capex that can employ inexpensive metallization and elimination of all the processing steps that are often used to remove, pattern, or etch deposited layers.

[0068] The exemplary method and device comprising low-cost DS-TOPCon cell can facilitate the development of low-cost Si/perovskite type tandem solar cells with an efficiency potential of 30%.

[0069] Poly-Si/SiO.sub.x carrier selective passivating contacts are an ideal candidate for next-generation solar cells because heavily doped regions, as well as metal contacts, are physically decoupled from the Si substrate via an ultra-thin tunnel oxide (15 ), similar to the role of intrinsic a-Si layer in the >25% efficient HIT cells. However, poly-Si/SiO.sub.x contacts are much more thermally stable than a-Si-based HIT contacts and can withstand high firing temperatures (>700 C.) used for implementing the lowest-cost high throughput screen-printed contacts. When n+ poly-Si is deposited on top of tunnel oxide, it becomes electron selective contact (n-TOPCon) and vice versa for p-TOPCon. This is because heavily doped n+-poly-Si on top of tunnel oxide accumulates electrons and repels the minority carries holes at the tunnel oxide/n-Si interface due to appropriate n+n band bending. These electrons are easily able to tunnel through the oxide from n-Si into the n+-poly while holes are blocked from entering the n+-poly, making it an electron selective contact and virtually eliminating hole recombination in the n+ region and metal contact. Similarly, p-TOPCon allows only the holes to tunnel through, making it a hole selective contact and reducing the electron recombination in the p+ region and metal contact. The interface recombination at the tunnel oxide-Si interface defects is also reduced due to the accumulation layer. Because of this dramatic reduction of minority carrier recombination in the heavily doped regions, metal contacts, and interface, extremely low J.sub.0 values (<5 fA/cm.sup.2) and high cell efficiency can be achieved.

Example #4

Example Cell Structure, Modeling and Design to Attain Screen Printed 25% Efficiency Bifacial Full Area DS-TOPCon Cell

[0070] FIGS. 9-12 show a full area double side TOPCon cell structure with rear junction design on n-base Si can produce 25% efficiency at low-cost. FIG. 9 shows the exemplary cell structure with 100-200 nm full area p-TOPCon on the rear, and 20 nm textured full area n-TOPCon on the front with screen-printed contacts on both sides can produce 25% efficiency. Modeling below also supports and shows that this will require total recombination current J.sub.0 of 33 fA/cm.sup.2, with 13 fA/cm.sup.2 coming from the front side n-TOPCon, 15 fA/cm.sup.2 from bulk Si and 9 fA/cm.sup.2 from the rear p-TOPCon. These are quite achievable using DS-TOPCon concept and n-base solar cell.

Example #5

Design and Development of Rear Junction Bifacial 25% Efficient Double Side Screen Printed Poly-Si/SiO.SUB.x .Passivated Contact Solar Cells

[0071] FIG. 10 shows detailed modeling with a list of all the practically achievable parameters to achieve 24% efficiency with this cell design. In fact, most parameters for each layer have been achieved in an experiment and are possible in mass production at a low cost. One design feature involves a rear junction cell with p-TOPCon on n-Si on the backside. FIG. 11. Rear junction DS-TOPCon device can give 25.0% efficiency with greater than 1% efficiency enhancement over front junction DS-TOPCon cell. FIG. 12 gives a step-by-step technology roadmap to achieve 25% efficiency for this cell design by quantifying the benefit of each technology enhancement and innovation.

[0072] FIG. 11 shows an advantage of the exemplary rear junction cell over the traditional front junction cell. The front junction design may prevent the use of thin poly-Si to avoid significant absorption loss in the front poly-Si layer. However, in a rear junction device, efficiency becomes insensitive to the thickness and sheet resistance of front n-poly Si, without any penalty in carrier transport and collection of electrons on the front of the device. FIG. 3 also shows that a rear junction device can produce >1% higher efficiency than a front junction device.

[0073] Thus, the modeling and subsequent analysis reveal that to get to 25% efficiency for the cell design, the exemplary method may 1) provide defect-free n+ and p+ doped poly-Si/SiO.sub.x contact layers with metalized recombination current density (J.sub.0) of 10 fA/cm.sup.2; 2) reduce bulk defects and optimize lifetime (>3 ms) and resistivity to achieve J.sub.0 bulk of 10 fA/cm.sup.2; 3) significantly reduce parasitic absorption by depositing very thin poly-Si (20 nm thickness) on the front layer; 4) develop advanced screen-printing paste and firing conditions to make ohmic contacts to 20 nm poly-Si without compromising J.sub.0 and fill-factor (FF>82.5%). It is possible to make screen-printed contacts to 35 nm TOPCon; and 5) implement a back junction cell design that desensitizes the cell performance with respect to the front poly sheet resistance, enabling the use of very thin poly-Si on the front. The modeling demonstrates that fabrication of low-cost DS-TOPCon back junction (n+np+) cell with the above design and parameters can produce low-cost, fully screen-printed bifacial cells with Voc 720 mV, Jsc 41.5 mA/cm.sup.2, FF 0.825 and 25%.

Example #6

An Initial Attempt and Demonstration of the Concept of Screen Printed Asymmetric TOPCon Cell (Thin Front n-TOPCon and Thick Rear p-TOPCon by Traditional Ex Situ Doping with Multiple Masking and High-Temperature Steps)

[0074] The exemplary device has achieved very low 1-2 fA/cm.sup.2 J.sub.0 on un-metalized textured n-TOPCon coated with Al.sub.2O.sub.3/SiN dielectric on the front and 5 fA/cm.sup.2 J.sub.0 for screen-printed n-TOPCon with 5% metal coverage. Similarly, on the rear side, the exemplary device has so far achieved 5 fA/cm.sup.2 for unmetallized planar p-TOPCon and 15 fA/cm.sup.2 for a metalized p-TOPCon on the back with 10% metal coverage. These are close to what is needed in a final device. The exemplary method can be employed to make reasonably good screen-printed contact to 35 nm n-poly-Si on the front by choosing the right paste and firing condition. Based on current results, it is believed that this can be improved further, and it is possible to successfully implement screen printed 20 nm poly-Si contact on the front. A study recently made the first prototype to make such a device to test its viability. The method grew 15 A tunnel oxide by chemical oxidation of Si in heated HNO.sub.3 solution and deposited doped poly-Si layers by LPCVD followed 850 C./30 min anneal in inert ambient to activate dopants for making n and p-TOPCon. The method has also produced n and p-TOPCon by growing intrinsic poly first and then doing ex-situ doping of front with P diffusion and back using B diffusion. Front n-TOPCon was coated with Al.sub.2O.sub.3/SiNx stack, and rear TOPCon was coated with SiNx prior to screenprint metallization. Front and back contacts were screen printed and fired simultaneously. FIG. 13 shows the cell structure and process flow, and cell performance with 35 nm n-TOPCon. Further optimization of contacts, bulk lifetime, and TOPCon can get to 25% efficiency.

[0075] FIG. 13 is a schematic of DS-TOPCon cell (left), and process flow for cell fabrication (right).

Example #7

Novel and Simple Method to Fabricate High Quality Double Side TOPC by Ex Situ Doping of B and P in a Single High Temperature Step Prior to Selectively Thinning the Front Side

[0076] Besides the exemplary cell design, modelling, and efficiency potential of this cell structure, a method is disclosed to produce low-cost DS-TOPCon precursor. This involves growing 200 nm undoped intrinsic i-poly-Si on top of a tunnel oxide on both sides of the wafer by LPCVD (low-pressure chemical vapor deposition) at 580 C. In an experiment, 15 thick tunnel oxide is grown by chemical oxidation of Si in HNO.sub.3 at 100 C. prior to LPCVD of intrinsic poly on both sides. Next, the exemplary method deposited APCVD grown borosilicate glass (BSG) only on the backside and then capped it with APCVD grown thick undoped SiO.sub.x (USG) (FIG. 14). FIG. 14 shows a process flow of DS-TOPCon precursor (left) and cross-sectional schematic diagrams of DS-TOPCon precursor in process (right)

[0077] FIG. 15. Development of receipt for ex-situ Doped N- and P-TopCon using APCVD B glass and POCL.sub.3 diffusion. FIG. 16 shows the measured iV.sub.oc and iFf of finished DS-TOPCon precursor with there different pre-annealing temperatures.

[0078] This sample is then heat-treated for 30 min in a POCl.sub.3 ambient in a tube furnace to form n-TOPCon on the front at 850 C. by diffusing P into the intrinsic front poly-Si. Note that Phosphorus diffusion on the back is blocked by thick undoped APCVD SiO.sub.x on the rear side. The study found that 850 C. was not sufficient to drive enough B from APCVD BSG on the backside, which requires 950 C./30 min heat treatment to achieve desired sheet resistance of 150 ohms/. This led to the development of a heat treatment profile shown in FIG. 7 involving 950 C./1 hour heat treatment in N2 first to drive sufficient B on the backside followed by lowering the temp to 840 C. followed by POCL.sub.3 diffusion for 30 min to form n-TOPCon during the same thermal cycle. Thus, in a single high temperature step, both n and p TOPCons are formed without any auto doping or cross-diffusion due to the presence of thick oxide on the back. Thick oxide not only blocks P diffusion on the backside but also prevents B out diffusion onto the front side. Thus, there are no masking steps required, which makes the process very simple, elegant, and inexpensive. FIG. 16 shows that a DS-TOPCon precursor formed by this unique process resulted in excellent implied Voc of 725 mV with implied FF of 86%, appropriate for 25% cell.

Example #8

A Selective Chemical Etching Method of Converting DS-TOPCon with Symmetric Thickness to Asymmetric DS-TOPCon with 200 nm p Poly on Back and 20 nm n-Poly on Front

[0079] Once the method has provided a thick 200 nm n-TOPCon on the front and a 200 nm p-TOPCon on the rear, the exemplary method may include a selective etch process, which in less than 2 min can convert the above symmetric DS-TOPCon to asymmetric n-TOPCon with 200 nm p-TOPCon on the back and only 20 nm textured n-poly on the front. This is a very dilute KOH solution (20% at 40 C. for <2 min). This solution n-poly about 5-10 times faster than p-poly-Si as experimentally demonstrated in FIG. 17 without degrading the quality of J.sub.0 and iVoc of the DS-TOPCon structure (FIG. 18). FIG. 17 Comparison of etching rate between n-poly-Si and p-poly-Si. FIG. 18 Comparison of etching rate between n-poly-Si and p-poly-Si. FIG. 19. Schematic images from Symmetric DS-TOPCon to asymmetric n-TOPCon with 200 nm p-TOPCon on back and only 20 nm textured n-poly on front after selective etching. This is the structure can potentially achieve 25% Si solar cells based on the exemplary modeling.

[0080] Thus, not only has the design of a manufacturable DS-TOPCon cell been demonstrated to achieve 25% efficiency, but it is also revealed that the exemplary method can be used to produce such structure by ex-situ doping of intrinsic thick symmetric poly followed by <2 min chemical etching in a specific KOH solution.

[0081] Several groups have reported efficiencies exceeding 25% on laboratory-scale TOPCon cells employing single side poly-Si based passivated contacts (Fraunhofer ISE and ISFH). Two cell manufacturers, Trina Solar and Jolywood, have started pilot production of single side n-TOPCon cells with an efficiency of 22.5%. Some prominent examples of high-efficiency R&D cells with passivated contacts in the literature include 26.7% Si heterojunction IBC cells by Kaneka (Yoshikawa et al. Nature Energy 2017), 25.2% tunnel layer passivated IBC cells by SunPower (Smith et al. IEEE PVSC 2016), 26.1% poly-Si on oxide (POLO) IBC cell by ISFH (Haase et al. Solmat 2018), and 25.7% single side rear n-TOPCon cell by Fraunhofer ISE (Richter et al. Solmat 2017) with conventional B diffusion on the front, evaporated and photolithography contacts. The 26% TOPCon cells were realized on a small area (<16 cm.sup.2) with non-manufacturable technologies, but they provide the existence proof of the potential of this concept for achieving very high efficiency even with a single side TOPCon.

[0082] Even though Poly-Si based passivated contact technology offers a solution to reducing diffusion- and metal contact-induced recombination losses in bulk Si, so far it has primarily been confined to the rear of the cell because of high parasitic absorption losses in poly-Si [Yang et al. APL 2018] and inability to make good screen-printed contacts to very thin front poly-Si layers without compromising passivation quality and J.sub.0 (Padhamnath et al Solmat 2019). Therefore, an industry-feasible approach is disclosed herein to deploy low-cost, manufacturable screen printed TOPCon on both sides to exploit the full potential of this technology and concept. This will not only enhance the efficiency but also reduce the cell processing cost by eliminating traditional diffusion technology. It is shown that the modeling, design, and a fabrication sequence can achieve commercial ready fully screen printed 25% bifacial DS-TOPCon cells by incorporating thin electron selective n+-poly-Si/SiO.sub.x passivated contact on the textured front and 200 nm thick hole selective p+-poly-Si/SiO.sub.x passivated contact on the planar rear surface. In addition to the cell architecture and its efficiency potential, it is shown that the low-cost method of making a thick DS-TOPCon in a single high temperature step can be performed with no additional masking steps to achieve 250 nm planar thick b-TOPCon on the back and textured thick 200 nm n-TOPCon on the front. This involved ex situ doping of intrinsic poly silicon on both sides using APCVD B on the back and POCL diffusion on the front side without any cross doping and contamination. Finally, the exemplary method can be employed in manufacturing operations to convert the above thick (200 nm) double side TOPCon to an asymmetric DS-TOPCon in less than 2 min by a novel selective chemical etch which attacks n-TOPCon faster (5 times) than p-TOPCon, resulting in the desirable 200 nm planar p-TOPCon on the back and 20 nm textured n-TOPCon on front. This is exactly what is needed to achieve 25% DS-TOPCon cells if good quality screen-printed contacts can be made on both sides. Screen printed contacts and can achieved efficiency of 21% and even 25%, as predicted by the computer modeling described herein. To the best of the inventor's knowledge, this has never been done before.

[0083] In addition, the exemplary cell structure will be bifacial with a much lower temperature coefficient that will further increase energy harvesting and lower LCOE. Finally, most PERC manufacturing lines today can be easily transformed into TOPCon lines by addition of poly-Si deposition tools, enabling the rapid and low-cost adaptation/transfer of this technology. In addition to the exemplary concept, cell design, and efficiency potential, it is demonstrated an apparatus that can achieve 21% large area screen printed double side TOPCon cell with screen-printed contact on 35 nm poly on front. Based on modeling and results, it is possible to reduce this front poly thickness to 20 nm and optimize other material parameters to get to; 25% efficiency.

[0084] Accordingly, provided is a quantitative understanding and requirements of making high efficiency screen-printed RJ selective DS-TOPCon solar cells (FIG. 20). This cell structure is composed of full-area iOx/p+ poly-Si (p-TOPCon) on the back, but selective-area iOx/n+ poly-Si (n-TOPCon) on the front side to minimize the parasitic light absorption losses in poly-Si layer.

[0085] Focusing on the requirement and challenges in passivating the front field region of selective DS-TOPCon cell to achieve high cell efficiency, two different passivation schemes, Al.sub.2O.sub.3/SiNX:H and SiNX:H, were investigated to minimize the recombination current density (J.sub.0) in the field region. Various symmetric test structures were fabricated to assess the J.sub.0 values of the passivated field regions. In addition, we fabricated the selective DS-TOPCon cell using two different front surface passivation schemes.

[0086] After saw damage etching (SDE) in 20% wt potassium hydroxide (KOH) solution at 80 C. for 9 minutes, both sides of the wafers were textured using the standard texturing process. A stack of ultra-thin interfacial oxide (iOx) and intrinsic poly-Si of desired thickness were deposited on both planar and textured samples in a single step two-stage process in low pressure chemical vapor deposition (LPCVD) system. The ex-situ doping of the poly-Si layers was performed in an atmospheric tube diffusion furnace), using liquid phosphorus oxychloride (POCl.sub.3) and boron-tribromide (BBr3) as dopant sources, resulting in symmetric n-type and p-type poly-Si structures, respectively. Up to this process stage, a batch of symmetric textured n-TOPCon (90 nm) and planar p-TOPCon (250 nm) samples were fabricated and ready for the next process.

[0087] A proportion of these symmetric textured n-TOPCon samples were dipped in 9% wt KOH solution at 40 C. to etch off the n+ poly-Si. This etching process removed the entire n+ poly-Si, but was stopped its reaction exactly at iOx interface, which was demonstrated in our previous work [4]. Due to the etch protection by iOx, a weakly phosphorus (P) in-diffused layer under the iOx, formed during the ex-situ doping process, was preserved, which imitates the field region of selective DS-TOPCon cell (FIG. 20). Then, for the fabrication of structure (c) in FIG. 21, a 30 of Al.sub.2O.sub.3 film was deposited using plasma-enhanced atomic layer deposition (ALD) system. Finally, both sides of all the samples were passivated with SiNX:H using plasma-enhanced chemical vapor deposition (PECVD) system. High temperature firing process was performed in an industrial belt furnace.

[0088] The recombination current density (J.sub.0) of all test structures was measured at an injection level of 510.sup.15 cm.sup.3 using a contactless photoconductance decay measurement tool (WCT-120) [5]. The current-voltage (J-V) characteristics of the fabricated selective DS-TOPCon solar cells were measured using a flash tester (FCT-450).

[0089] Impact of front J.sub.0, field on efficiency of selective DS-TOPCon cell

[0090] To start with, a 2D device simulation was performed for selective DS-TOPCon cell structure using Quokka 2 [6] with practically achievable device parameters to find out the target J.sub.0 value for the front field region, which can attain 25.0% cell efficiency. As shown in Figure, the front J.sub.0, field should not exceed 5 fA/cm.sup.2 to cross the 25.0% cell efficiency with selective DS-TOPCon cell structure. Also, it shows that the cell efficiency of rear junction device is extremely sensitive to the front field passivation, projecting nearly 1.3% absolute efficiency degradation as the J.sub.0, field rises from 5 to 30 fA/cm.sup.2.

Investigation of Passivation Property of Each Region of Selective DS-TOPCon Solar Cells

[0091] To evaluate the feasibility of the proposed selective DS-TOPCon cell structure (FIG. 20) and identify the potential performance-limiting factors, the passivation property of each region of the cell was individually monitored. As summarized in FIG. 21, the J.sub.0 of each test samples were measured before and after high temperature screen-printed contact firing step (740 C.). The symmetric textured n-TOPCon (structure (a)) and planar p-TOPCon (structure (d)) samples showed excellent passivation quality after simulated firing, resulting in full-area passivated J.sub.0 values of 9 fA/cm.sup.2 and 4 fA/cm.sup.2 respectively.

[0092] Since, in a real device, textured n-TOPCon is replaced by dielectric passivated textured n-type c-Si, therefore, we also studied dielectric passivated fields region on the front. We investigated and compared the passivation quality of SiNX:H layer and Al.sub.2O.sub.3/SiNX:H stack. FIG. 21 shows that Al.sub.2O.sub.3/SiNX:H stack passivated the surface extremely well, resulting in textured field J.sub.0 value as low as 4 fA/cm.sup.2, which is comparable to n-TOPCon and is consistent with the requirement for 25.0% cell efficiency (FIG. 22). This excellent passivation is attributed to the large negative fixed charge density (110.sup.13/cm.sup.2) in Al.sub.2O.sub.3 layer which provides excellent passivation via formation of inversion layer at interface of AlO.sub.3/n-Si. On the other hand, SiNX:H passivation resulted in a relatively high J.sub.0 of 18-22 fA/cm.sup.2. This may be due to the poor chemical passivation at the SiNX:H/n-Si interface and the positive fixed charge density in SiNX:H is not enough to create strong accumulation layer to lower the J.sub.0 to the desired value of <5 fA/cm.sup.2.

J-V Characteristic of Fabricated Selective DS-TOPCon Cell

[0093] After monitoring the recombination behaviors of each layer (J.sub.0 assessment), we made an attempt to fabricate the selective DS-TOPCon cell. Error! Reference source not found. TABLE 1, below, summarizes J-V characteristics of fabricated selective DS-TOPCon solar cell with above two different front field surface passivation schemes. Contrary to our expectation, we found that the performance of the cell passivated with SiNX layer was superior to the cell passivated with Al.sub.2O.sub.3/SiNX stack. Further C-V analysis revealed that Al.sub.2O.sub.3 layer provided superior surface passivation quality because it has larger negative fixed charge density (11013/cm.sup.2) than the positive charge density (110.sup.12/cm.sup.2) in the SiNX:H. However, the cell performance of Al.sub.2O.sub.3/SiNX:H stack passivated cell was relatively inferior because the depletion and inversion layers underneath the dielectric layer attracts minority carriers to the surface, which aggravated the carrier collection. In addition, the positively charged p+ inversion layer in the field and the n+ region underneath the metal contacts form a tunnel junction to trigger tunneling or leakage of minority carriers. This causes a substantial drop in the cell VOC and FF, as seen in TABLE 1Error! Reference source not found. Thus, neither SiNX:H nor Al.sub.2O.sub.3/SiNX:H passivation schemes are sufficient for very high efficiency solar cells. Recently we have conducted the experiment with 15 nm thermal SiO.sub.2 capped with SiNX:H on the field region. A preliminary optimization on this passivation scheme has given J.sub.0 values of 10 fA/cm.sup.2, which getting close to the target J.sub.0, field value. Further dielectric optimization and cell fabrication is in progress and will be reported at the conference.

TABLE-US-00001 TABLE 1 Passivation VOC JSC FF pFF J.sub.02 stack [mV] [mA/cm.sup.2] [%] [%] [%] [nA/cm2] SiNX 687 38.7 79.3 21.1 82.2 8 passivation Al.sub.2O.sub.3/SiNX 675 37.5 78.5 19.8 80.6 18 passivation

Summary of J-V Parameters of Fabricated Selective DS-TOPCon Solar Cells

[0094] Thus, the performance of selective DS-TOPCon cell structure is largely dependent on the front surface passivation since vast majority of carriers are photo-generated near the top surface and the collecting junction is located at the back. A 2D device simulation showed that in order to cross the 25.0% cell, the passivated J.sub.0, field should be below 5 fA/cm.sup.2. From the symmetric test sample, it can be seen that Al.sub.2O.sub.3/SiNX:H passivation stack can achieve the J.sub.0 value as low as 4 fA/cm.sup.2, which satisfies the high efficiency requirement from the basis of J.sub.0 value. To demonstrate and verify the feasibility of Al.sub.2O.sub.3/SiNX:H passivation stack, a selective DS-TOPCon cells were fabricated and passivated its front surface with Al.sub.2O.sub.3/SiNX:H stack. However, due to the existence of P in-diffusion on the front field region, this passivation stack formed strong inversion layer in the field region, which detrimentally affected the J-V parameters of the finished cells. Both Al.sub.2O.sub.3/SiNX:H and SiNX:H passivation schemes investigated in this work were not sufficiently satisfy the requirement for high efficiency solar cell. Finding out the passivation scheme which can achieve J.sub.0, field <5 fA/cm2 and at the same time induce the strong accumulation layer on the field region will be a key to cross the 25.0% cell efficiency with selective DS-TOPCon cell structure.

[0095] Utilizing a poly-Si/SiO.sub.2 contact on the front as well as the rear of the solar cell can further improve the passivation and mitigate metal-induced recombination on both sides. Patterning the front poly-Si such that it is present only under the metal grid can help minimize parasitic absorption while reaping the benefits of a front passivated contact under the metal grid [7]. While there are several traditional methods of patterning the poly-Si ([8], [9]), laser-oxidation is a unique, fast, and simple process to achieve this [4]. In addition, it can pattern quite narrow lines. This method forms an ultra-thin SiO.sub.x mask on the laser-processed regions that allows etching the poly-Si selectively between the metal fingers using KOH, thereby achieving the desired patterned structure on the front side of the solar cell as shown in FIG. 1. The patterned poly-Si lines will hereafter be referred to as poly-fingers.

[0096] Tunnel-oxide passivated contact (TOPCon) solar cells are quickly replacing conventional PERC-like structures in commercial production [10]. These contacts utilize a doped poly-Si/SiO.sub.2 stack to physically isolate the metal contacts from the absorber while providing the appropriate band bending to enhance charge carrier collection. This enables solar cells utilizing a TOPCon stack to achieve significantly higher open circuit voltages (Voc) [11]. However, due to the high absorptance of poly-Si, the application of the TOPCon stack is restricted to the rear of the solar cells while utilizing a conventional diffused layer on the front.

[0097] The ability to form narrow poly-Si fingers using a laser-oxidation process. Is described herein. Microscopic evidence that the laser-grown oxide can protect the underlying polysilicon from KOH etching is presented herein. The impact of the laser-oxidation process on the electrical performance of the device is assessed through electrochemical capacitance-voltage (ECV) doping profile measurements. In addition, we fabricated aluminum rear junction PhosTop solar cells with a full-area thick n+ poly-Si layer on the front surface, with and without laser irradiation (FIG. 24).

Fabrication and Characterisation of Patterned Poly-Si Structures

[0098] Both cell structures and microscopy samples were fabricated on random pyramid textured 1 cm n-type Cz-Si wafers. The wafers were then RCA cleaned and immersed in HNO.sub.3 at 100 C. for 15 min, growing about 15 of SiO2. Next, 200 nm in-situ phosphorus-doped poly-Si was grown using LPCVD in a Tystar system at 588 C., followed by a crystallization and dopant activation anneal at 875 C. for 30 min in a Centrotherm tube furnace.

[0099] For the microscopy samples, after the poly-Si was grown, 150 m wide poly-fingers were processed on the front side of the wafer using a Coherent Avia UV (355 nm) nanosecond-pulsed laser at a power of 4 W (measured before the focusing optics) and a scan speed of 400 mm/s. Following this, the wafers were immersed in 9% wt KOH at 40 C. for two minutes. This was found to be enough to etch the 200 nm thick poly-Si in the field region between the patterned laser lines, probably without damaging the tunnel oxide. These patterned samples were then observed in a Thermo Helios 5 CX SEM

[0100] To assess laser damage without introducing complexities of metal alignment, the cell structures were fabricated (FIG. 23) with the entire front surface of the wafer laser exposed using the process described earlier. Then, the front surface was masked with PECVD SiNx and immersed in 20% wt KOH at 65 C. for 10 min to remove the poly-Si wrap-around and planarize the rear surface of the wafer. Following that, the wafers were RCA cleaned, the SiNx mask was removed in 10% wt HF, and a double layer antireflection coating with 45 nm SiNx capped with 90 nm SiO.sub.x was grown through PECVD. For metallization, the cell was screen-printed with an H pattern (100 fingers, 35 m) using Ag pastes on the front and full area Al on the back. Finally, the samples were fired in a belt furnace at a peak temperature of 760 C. The completed cells were measured on a Sinton FCT-450 flash tester.

Effects of Poly-Finger Geometry on Cell Performance

[0101] For brevity, the regions of the poly-fingers not covered by metal are referred to as the wing area. The exposed poly-Si in the wing area incurs parasitic light absorption. FIG. 25 shows Quokka 2 device simulations were performed to quantify the impact of poly-finger thickness and width on solar cell performance, using experimental details of samples and an optical model developed earlier [4]. The results of these simulations are summarized in FIG. 25. Note that the wing area fraction is calculated after subtracting the width of the metal lines (30 m) from the width of the poly-finger, and then calculating the ratio of the exposed poly-Si area for 100 lines on a 156 mm wafer.

[0102] It was found that thicker and narrower poly-fingers are detrimental to solar cell performance. While thicker poly-Si fingers cause increased parasitic absorption, they are beneficial for minimizing loss in VOC with fire-through metallization. On the other hand, having wider poly-fingers increases parasitic absorption while increasing its contribution to the J.sub.0. Additionally, we find that for narrower poly-Si fingers, the efficiency is less sensitive to poly-Si thickness, allowing the use of thicker poly-Si for lower metal-induced damage. This suggests that narrow, thick poly-Si fingers could help improve the performance of the double-side passivated contact solar cells. Poly-Si patterning with laser oxidation is ideally suited for that.

Micrography Analysis of Laser Patterning

[0103] FIG. 26 shows that our laser can be used to pattern poly-Si fingers as narrow as 35 m. The measured width obtained after patterning was found to exceed the target width of the pattern by approximately 10-15 m. This is likely due to the output of the laser spot being a gaussian beam. Additionally, due to the spot-size limitations of our laser, the narrowest line that can be patterned is about 35 m wide. This is close to the state of the art for the width of screen-printed grid metallization [10]. However, patterning of poly-Si by screen print resist will require several additional steps.

Protection of Poly-Si from KOH Etch Due to Laser-Oxide

[0104] FIG. 27(a) is a plan view photograph of a laser patterned sample capped with silicon nitride showing multiple poly-fingers and a busbar. FIG. 27(b) is a cross-section image of a single texturing pyramid in the field region. FIG. 27(c) is rounded pyramid in the poly-finger region showing presence of Poly-Si after KOH etching. In the proposed device structure, after the laser patterning on the front, the poly-Si in the field region is etched in KOH (40 C., 9% wt). Subsequently, the anti-reflection dielectric is deposited rendering the wafer ready for metallization. FIG. 27(b) shows that 2 min of etching in KOH is sufficient to remove the poly-Si without affecting the textured morphology of the wafer in the field region. Further, in FIG. 27(c), it can be seen that in the patterned poly-finger region, poly-Si is indeed present under the anti-reflection coating. However, we observe that the texturing in the laser-oxidized region is rounded, causing the poly-Si to redistribute, thereby resulting in non-uniform thickness. The rounding of the pyramids and resultant laser damage is consistent with prior observations [4].

Effect of Laser Processing on Poly-Si Doping

[0105] Due to the morphological changes seen after laser processing, we investigated the change in the doping profile in the poly-Si and Si before and after laser irradiation. Electrochemical capacitance-voltage (ECV) measurements show the concentration of electrically active dopants in the sample as a function of depth from the surface. In FIG. 28 it can be seen that for the reference sample (no laser irradiation), the concentration of active phosphorus is constant until nearly 200 nm after which it falls rapidly. This shows that the activation of phosphorus in the poly-Si is uniform with depth (410.sup.20 cm.sup.3) and that there is a minimal in-diffusion into the Si wafer through the tunnel oxide. For the sample irradiated with the UV laser, the surface concentration increased to 10.sup.21 cm.sup.3. This suggests the activation of inactive dopants that were trapped in regions of low crystallinity. This is consistent with the decrease in sheet resistance of the layer due to laser irradiation observed in previous work [4]. Furthermore, after laser irradiation, the phosphorus concentration begins to decrease earlier and the change in concentration is more gradual. We hypothesize that this could be due to disruption or damage to the tunnel oxide layer causing the dopants to drive into the c-Si substrate.

Simplified Solar Cells

[0106] The morphological and electrical changes in the poly-Si layer could impact solar cell performance. Laser irradiation may cause a substantial deterioration in Jo, which may be partially recovered after PECVD SiNx deposition.

[0107] To further understand the impact of the laser patterning process on solar cell performance, a full area laser irradiated solar cell (No patterning or KOH etching) with a full area Al contact on the rear side was fabricated to compare with an otherwise identical non-laser processed solar cell (reference). Table II shows the lighted IV data under AM1.5 g illumination.

TABLE-US-00002 TABLE II LIV data of the fabricated cells. Voc (V) Jsc (mA/cm2) FF (%) Efficiency (%) No Laser 650.43 33.11 77.99 16.80 4 W Laser 634.15 29.86 78.23 14.81

[0108] Both solar cells have very low short-circuit current densities. This is expected due to the significant parasitic absorption loss in the 200 nm of full-area poly-Si on the front side. Additionally, the laser-irradiated solar cell has an even lower JSC due to increased reflection and worse light trapping arising from the rounded pyramids. Furthermore, the open circuit voltage of the lasered cell is 16 mV lower than the reference cell. This is likely due to the deterioration of passivation arising from laser damage. For the proposed device (FIG. 23), the area fraction of the laser-damaged region will be significantly lower (<5%) than it is in this device. As a result, the detrimental effect of the laser on VOC would also be commensurately lower. Importantly, the fill factors for the two cells are comparable. This shows that the laser damage does not deteriorate metallization or contact formation. Cell fabrication with selective poly-Si fingers on the front is in progress and the cell results and analysis will be presented at the conference.

[0109] Narrow poly-fingers may be pattern with an objective of minimizing parasitic absorption and the effects of laser damage on the passivation of the cell. To this end, it is shown that using laser oxidation, lines as narrow as 35 m can be patterned. Further, more precise laser systems can pattern significantly narrower lines allowing for minimal wing area exposed to light. Therefore, in practice, the line width of the poly-finger would be limited by the width of the metal fingers and the precision of alignment for metallization. It is also shown that while the laser-oxide can protect poly-Si from etching, it is at the expense of significant morphological and electrical changes, which reflects as a deterioration of passivation in the completed solar cell. While ECV results suggest damage to the SiO.sub.2 layer in the TOPCon stack, this can be verified using TEM imaging. Despite this, due to the very small overall area fraction of the lasered region in the proposed selective area front contact, the effect of this damage could be minimized. Additionally, for narrower poly-fingers, it is possible to use thicker poly-Si to mitigate damage without incurring significant parasitic absorption losses. These results advocate for the use of laser-oxidation for patterning poly-Si contacts, a fast, scalable, and tunable alternative to traditional patterning techniques.

[0110] In another aspect, a DS-TOPCon cell design is disclosed with selective poly-Si contacts on the front, only below metal contacts. The TOPCon area coverage on the front is only 5% to prevent absorption in poly-Si. The remaining 95% area is a bare Si wafer coated with Al.sub.2O.sub.3/SiN coating, which provides excellent passivation. This resulted in J.sub.0 or Voc comparable to full area DS-TOPCon but with no appreciable absorption in front poly-Si. It also allows the use of thick poly-Si on front without risking the J.sub.0 degradation due to screen-printed contacts. Modelling shows this cell structure can produce 25% cells at a low-cost.

[0111] In another aspect, an experimental formation is also disclosed of a low-cost DS-TOPCon precursor using only one high-temperature step without masking steps. In this process, Boron (B) is diffused in the back intrinsic poly using BSG glass, and Phosphorus (P) is diffused on the front intrinsic poly by POCL.sub.3 diffusion during the same high-temperature cycle without any cross doping. It is demonstrated that this unique, low-cost process gives excellent J.sub.0 and iv.sub.oc values consistent with 25% efficiency.

[0112] Another aspect of the disclosure involves patterning of front poly by selective UV laser oxidation, followed by KOH etching of poly. A 1-4 nm laser-grown oxide was found to be sufficient for masking KOH etching, resulting in well-defined polyfingers. Screen-printed contacts are formed on top of these poly fingers by firing through a SiN coating. It is shown herein that SiN deposition restores the laser-induced degradation of J.sub.0. This unique process was successfully demonstrated.

[0113] The exemplary system and method may be employed for silicon cell manufacturing. Solar cell manufacturers can employ equipment such as LPCVD or PECVD to their TOPCon production lines for such silicon cell fabrication.

[0114] Some references, which may include various patents, patent applications, and publications, are cited in a reference list and discussed in the disclosure provided herein. The citation and/or discussion of such references is provided merely to clarify the description of the present disclosure and is not an admission that any such reference is prior art to any aspects of the present disclosure described herein. In terms of notation, [n] corresponds to the nth reference in the list. All references cited and discussed in this specification are incorporated herein by reference in their entireties and to the same extent as if each reference was individually incorporated by reference.

[0115] Although example embodiments of the present disclosure are explained in some instances in detail herein, it is to be understood that other embodiments are contemplated. Accordingly, it is not intended that the present disclosure be limited in its scope to the details of construction and arrangement of components set forth in the following description or illustrated in the drawings. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0116] It must also be noted that, as used in the specification and the appended claims, the singular forms a, an, and the include plural referents unless the context clearly dictates otherwise. Ranges may be expressed herein as from about or 5 approximately one particular value and/or to about or approximately another particular value. When such a range is expressed, other exemplary embodiments include the one particular value and/or to the other particular value.

[0117] By comprising or containing or including is meant that at least the name compound, element, particle, or method step is present in the composition or article or method, but does not exclude the presence of other compounds, materials, particles, method steps, even if the other such compounds, material, particles, method steps have the same function as what is named.

[0118] In describing example embodiments, terminology will be resorted to for the sake of clarity. It is intended that each term contemplates its broadest meaning as understood by those skilled in the art and includes all technical equivalents that operate in a similar manner to accomplish a similar purpose. It is also to be understood that the mention of one or more steps of a method does not preclude the presence of additional method steps or intervening method steps between those steps expressly identified. Steps of a method may be performed in a different order than those described herein without departing from the scope of the present disclosure. Similarly, it is also to be understood that the mention of one or more components in a device or system does not preclude the presence of additional components or intervening components between those components expressly identified.

[0119] The term about, as used herein, means approximately, in the region of, roughly, or around. When the term about is used in conjunction with a numerical range, it modifies that range by extending the boundaries above and below the numerical values set forth. In general, the term about is used herein to modify a numerical value above and below the stated value by a variance of 10%. In one aspect, the term about means plus or minus 10% of the numerical value of the number with which it is being used. Therefore, about 50% means in the range of 45%.sup.55%. Numerical ranges recited herein by endpoints include all numbers and fractions subsumed within that range (e.g., 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.90, 4, 4.24, and 5).

[0120] Similarly, numerical ranges recited herein by endpoints include subranges subsumed within that range (e.g., 1 to 5 includes 1-1.5, 1.5-2, 2-2.75, 2.75-3, 3-3.90, 3.90-4, 4-4.24, 4.24-5, 2-5, 3-5, 1-4, and 2-4). It is also to be understood that all numbers and fractions thereof are presumed to be modified by the term about.

[0121] The following patents, applications, and publications as listed below and throughout this document are hereby incorporated by reference in their entirety herein. [0122] [1]D. L. Young, K. Chen, S. Theingi, V. Lasalvia, D. Diercks, H. Guthrey, W. Nemeth, M. Page, and P. Stradins, Reactive ion etched, self-aligned, selective area poly-Si/SiO.sub.2 passivated contacts, Solar Energy Materials and Solar Cells, vol. 217, p. 110621, 2020, doi: 10.1016/j.solmat.2020.110621. [0123] [2]T. Dullweber, M. St&ouml; hr, C. Kruse, F. Haase, M. Rudolph, B. Beier, P. J&auml; ger, V. Mertens, R. Peibst, and R. Brendel, Evolutionary PERC+ solar cell efficiency projection towards 24% evaluating shadow-mask-deposited poly-Si fingers below the Ag front contact as next improvement step, Solar Energy Materials and Solar Cells, vol. 212, p. 110586, 2020, doi: 10.1016/j.solmat.2020.110586. [0124] [3]A. Ingenito, G. Limodio, P. Procel, G. Yang, H. Dijkslag, O. Isabella, and M. Zeman, Silicon Solar Cell Architecture with Front Selective and Rear Full Area Ion-Implanted Passivating Contacts, Solar RRL, vol. 1, no. 7, p. 1700040, 2017, doi: 10.1002/solr.201700040. [0125] [4]S. Dasgupta et al., Novel Process for Screen-Printed Selective Area Front Polysilicon Contacts for TOPCon Cells Using Laser Oxidation, IEEE J. Photovoltaics, vol. 12, no. 6, pp. 1282-1288, November 2022, doi: 10.1109/JPHOTOV.2022.3196822. [0126] [5]R. A. Sinton, A. Cuevas, and M. Stuckings, Quasi-steady-state photoconductance, a new method for solar cell material and device characterization, 1996, pp. 457-460. [0127] [6]A. Fell, A Free and Fast Three-Dimensional/Two-Dimensional Solar Cell Simulator Featuring Conductive Boundary and Quasi-Neutrality Approximations, IEEE Transactions on Electron Devices, vol. 60, no. 2, pp. 733-738, 2013. [0128] [7]Y.-Y. Huang, A. Jain, W.-J. Choi, K. Madani, Y.-W. Ok, and A. Rohatgi, Modeling and Understanding of Rear Junction Double-Side Passivated Contact Solar Cells with Selective Area TOPCon on Front, in 2021 IEEE 48th Photovoltaic Specialists Conference (PVSC), June 2021, pp. 1971-1976, doi: 10.1109/PVSC43889.2021.9518628. [0129] [8]K. Chen et al., Self-Aligned Selective Area Front Contacts on Poly Si/SiO.sub.x Passivating Contact c-Si Solar Cells, IEEE J. Photovoltaics, vol. 12, no. 3, pp. 678-689, May 2022, doi: 10.1109/JPHOTOV.2022.3148719. [0130] [9]A. Ingenito et al., Silicon Solar Cell Architecture with Front Selective and Rear Full Area Ion-Implanted Passivating Contacts, Sol. RRL, vol. 1, no. 7, p. 1700040, 2017, doi: 10.1002/solr.201700040. [0131] [10] ITRPV, International Technology Roadmap for Photovoltaic 2022, 2022. [0132] [11]M. A. Green et al., Solar cell efficiency tables (Version 60), Prog. Photovoltaics Res. Appl., vol. 30, no. 7, pp. 687-701, July 2022, doi: 10.1002/PIP.3595. [0133] [12]S. W. Glunz et al., Passivating and Carrier-selective ContactsBasic Requirements and Implementation, in 2017 IEEE 44th Photovoltaic Specialist Conference (PVSC), 25-30 Jun. 2017, pp. 2064-2069.

[0134] While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the present invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.