Method for producing a radiation-emitting semiconductor chip, and radiation-emitting semiconductor chip

Abstract

Disclosed is a method for producing a radiation-emitting semiconductor chip including the steps: providing a semiconductor layer sequence having an active region which is designed for generating electromagnetic radiation, producing a first recess in the semiconductor layer sequence, which fully penetrates the active region, producing a first structure in the first recess, whereinat least a lateral surface of the first structure facing the active region extends obliquely to at least a first lateral surface of the semiconductor layer sequence, andthe first structure is spaced apart in lateral directions from the active region. Also disclosed is a radiation-emitting semiconductor chip.

Claims

1. A method for producing a radiation-emitting semiconductor chip comprising: providing a semiconductor layer sequence comprising an active area, which is designed to generate electromagnetic radiation, creating a first recess in the semiconductor layer sequence, which completely penetrates the active area, creating a first structure in the first recess, and applying a first dielectric mirror over the first structure, wherein at least one lateral surface of the first structure facing toward the active area extends obliquely to at least one first lateral surface of the semiconductor layer sequence, the first structure is spaced apart in lateral directions from the active area, the first dielectric mirror extends along a main extension plane of the semiconductor chip, the first dielectric mirror is made partially reflective for the electromagnetic radiation, and the lateral directions are aligned in parallel to the main extension plane of the semiconductor chip.

2. The method as claimed in claim 1, wherein the first structure predetermines a propagation direction for the electromagnetic radiation.

3. The method as claimed in claim 1, wherein the lateral surface of the first structure encloses an angle of 451 with the first lateral surface of the semiconductor layer sequence.

4. The method as claimed in claim 1, wherein the semiconductor layer sequence comprises a first semiconductor area and a second semiconductor area, the first recess exposes the second semiconductor area, and the first structure is created on the exposed second semiconductor area.

5. The method as claimed in claim 1, wherein the semiconductor layer sequence is arranged on a substrate, the first recess completely penetrates the semiconductor layer sequence, and the first structure is created on an exposed substrate.

6. The method as claimed in claim 1, wherein the first structure comprises a dielectric material, an index of refraction of the first structure is less than an index of refraction of the semiconductor layer sequence.

7. The method as claimed in claim 1, wherein a dielectric layer is applied to the lateral surface of the first structure, an index of refraction of the dielectric layer is less than an index of refraction of the semiconductor layer sequence.

8. The method as claimed in claim 1, wherein a filler material is applied between the first structure and the semiconductor layer sequence, and an index of refraction of the filler material deviates by not more than n=0.2 from an index of refraction of the semiconductor layer sequence.

9. The method as claimed in claim 1, wherein a passivation layer is applied to the first lateral surface of the semiconductor layer sequence.

10. The method as claimed in claim 1, wherein the first structure has a shape of a triangle or trapezoid in cross section in a vertical direction.

11. The method as claimed in claim 10, wherein the semiconductor layer sequence is isolated to form the semiconductor chip by means of a cut in the vertical direction.

12. The method as claimed in claim 1 further comprising: creating a second recess in the semiconductor layer sequence, which completely penetrates the active area, creating a second structure in the second recess, wherein at least one lateral surface of the second structure facing toward the active area extends obliquely to at least one second lateral surface of the semiconductor layer sequence, the second structure is spaced apart in lateral directions from the active area, and the active area is arranged between the first recess and the second recess.

13. The method as claimed in claim 12, wherein a second dielectric mirror is applied over the second structure, the second dielectric mirror extends along the main extension plane, and the second dielectric mirror is made highly reflective for the electromagnetic radiation.

14. The method as claimed in claim 1, wherein the first dielectric mirror completely covers the first recess.

15. A radiation-emitting semiconductor chip comprising: a semiconductor layer sequence comprising an active area designed to generate electromagnetic radiation, a first recess in the semiconductor layer sequence, which completely penetrates the active area, and a first structure, which is arranged in the first recess, and a first dielectric mirror, which is arranged over the first structure, wherein at least one lateral surface of the first structure facing toward the active area extends obliquely to at least one first lateral surface of the semiconductor layer sequence, the first structure is spaced apart in lateral directions from the active area, the first dielectric mirror extends along a main extension plane of the semiconductor chip, the first dielectric mirror is made partially reflective for the electromagnetic radiation, and the lateral directions are aligned in parallel to the main extension plane of the semiconductor chip.

16. The radiation-emitting semiconductor chip as claimed in claim 15 further comprising: a second recess in the semiconductor layer sequence, which completely penetrates the active area, a second structure in the second recess, wherein a lateral surface of the second structure facing toward the active area extends obliquely to a second lateral surface of the semiconductor layer sequence, the second structure is spaced apart in lateral directions from the active area, and the active area is arranged between the first recess and the second recess.

17. The radiation-emitting semiconductor chip as claimed in claim 15, wherein the semiconductor chip is a surface-emitting laser diode.

18. The radiation-emitting semiconductor chip as claimed in claim 15, wherein the semiconductor chip is a surface-emitting superluminescent diode.

19. A method for producing a radiation-emitting semiconductor chip comprising: providing a semiconductor layer sequence comprising an active area, which is designed to generate electromagnetic radiation, creating a first recess in the semiconductor layer sequence, which completely penetrates the active area, creating a first structure in the first recess, and applying a first dielectric mirror over the first structure, wherein at least one lateral surface of the first structure facing toward the active area extends obliquely to at least one first lateral surface of the semiconductor layer sequence, the first structure is spaced apart in lateral directions from the active area, the first dielectric mirror extends along a main extension plane of the semiconductor chip, and the first dielectric mirror is made partially reflective for the electromagnetic radiation, wherein a dielectric layer is applied to the lateral surface of the first structure, wherein an index of refraction of the dielectric layer is less than an index of refraction of the semiconductor layer sequence and/or wherein a filler material is applied between the first structure and the semiconductor layer sequence, and an index of refraction of the filler material deviates by not more than n=0.2 from an index of refraction of the semiconductor layer sequence.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the Figures:

(2) FIGS. 1, 2, 3, 4, 5, 6, 7, and 8 show schematic sectional illustrations of method steps in the production of a semiconductor chip according to one exemplary embodiment,

(3) FIG. 9 shows a schematic sectional illustration of a method step in the production of a semiconductor chip according to one exemplary embodiment,

(4) FIGS. 10, 11, 12, and 13 show schematic sectional illustrations of method steps in the production of a semiconductor body according to one exemplary embodiment,

(5) FIGS. 14, 15, 16, 17, and 18 show schematic sectional illustrations of method steps in the production of a semiconductor body according to one exemplary embodiment,

(6) FIGS. 19 and 20 show schematic sectional illustrations of method steps in the production of a semiconductor body according to one exemplary embodiment,

(7) FIG. 21 shows a schematic sectional illustration of a method step in the production of a semiconductor chip according to one exemplary embodiment,

(8) FIGS. 21, 22, and 23 show schematic sectional illustrations of a radiation-emitting semiconductor chip according to one exemplary embodiment in each case, and

(9) FIGS. 24 and 25 show schematic sectional illustrations of first structures.

DETAILED DESCRIPTION

(10) Identical, equivalent, or identically acting elements are provided with identical reference signs in the figures. The figures and the size relationships of the elements shown in the figures to one another are not to scale. Rather, individual elements can be shown exaggeratedly large for better representability and/or for better comprehension.

(11) In the method according to the exemplary embodiment of FIGS. 1 to 8, a substrate 10 is provided according to FIG. 1. The substrate 10 is, for example, a GaN substrate.

(12) In a further method step according to FIG. 2, a semiconductor layer sequence 2 is epitaxially deposited on the substrate 10. The semiconductor layer sequence 2 comprises a first semiconductor area 8, an active area 3, and a second semiconductor area 9. The active area 3 is designed to generate electromagnetic radiation.

(13) According to FIG. 3, in a next method step a first recess 4 and a second recess 15 are created in the semiconductor layer sequence 2, which each completely penetrate the second semiconductor area 9 and the active area 3. The first recess 4 and the second recess 15 each expose the second semiconductor area 9, so that the second semiconductor area 9 is freely accessible in each case in the first recess 4 and in the second recess 15.

(14) Two mutually opposite lateral surfaces of the first recess 4 and two mutually opposite lateral surfaces of the second recess 15 each extend essentially in the vertical direction.

(15) The active area 3 is arranged between the first recess 4 and the second recess 15. A first lateral surface of the semiconductor layer sequence 7 is formed by one of the lateral surfaces of the first recess 4, which faces toward the active area 3. A second lateral surface of the semiconductor layer sequence 18 is formed by one of the lateral surfaces of the second recess 15, which faces toward the active area 3. The active area 3 extends from the first lateral surface of the semiconductor layer sequence 7 to the second lateral surface of the semiconductor layer sequence 18.

(16) The active area 3 comprises, for example, InGaN having an index of refraction of n.sub.HL=2.4.

(17) In a further method step, as shown in FIG. 4, a dielectric material 21 is introduced in each case into the first recess 4 and the second recess 15. In this exemplary embodiment, the first recess 4 and the second recess 15 are each completely filled using the dielectric material 21.

(18) The dielectric material 21 comprises, for example, SiO having an index of refraction of n.sub.s1=n.sub.s2=1.5 or SiON having an index of refraction of n.sub.s1=n.sub.s2=1.7.

(19) The dielectric material 21 is then structured in a next method step, as schematically shown in FIG. 5, by means of an etching process to form the first structure 5 and the second structure 16.

(20) A lateral surface of the first structure 6 facing toward the active area 3 extends obliquely to the first lateral surface of the semiconductor layer sequence 7. Furthermore, a lateral surface of the second structure 17 facing toward the active area 3 extends obliquely to the second lateral surface of the semiconductor layer sequence 18.

(21) Moreover, the first structure 5 completely covers a further first lateral surface of the semiconductor layer sequence 23 facing away from the active area 3. Furthermore, the second structure 16 completely covers a further second lateral surface of the semiconductor layer sequence 24 facing away from the active area 3.

(22) The first structure 5 has a shape of a triangle in cross section in the vertical direction. The triangle is an isosceles triangle. A right angle of the isosceles triangle is in the area of an edge between a bottom surface of the first recess 4 and the further first lateral surface of the semiconductor layer sequence 23 facing away from the active area 3.

(23) Moreover, the second structure 16 has the shape of an isosceles triangle in cross section in the vertical direction. A right angle of the isosceles triangle is in the area of an edge between a bottom surface of the second recess 15 and a further second lateral surface of the semiconductor layer sequence 24 facing away from the active area 3.

(24) The lateral surface of the first structure 6 facing toward the active area 3 encloses an angle of 451 with the first lateral surface of the semiconductor layer sequence 7. Furthermore, the lateral surface of the second structure 17 facing toward the active area 3 encloses an angle of 451 with the second lateral surface of the semiconductor layer sequence 18.

(25) In a further method step, as shown in FIG. 6, a filler material 12 is applied between the first structure 5 and the semiconductor layer sequence 2. The filler material 12 completely fills the first recess 4. Furthermore, the filler material 12 is applied between the second structure 16 and the semiconductor layer sequence 2. The filler material 12 completely fills the second recess 15.

(26) The filler material 12 comprises, for example, NiO having an index of refraction of n.sub.F=2.3 or AlN having an index of refraction of n.sub.F=2.2.

(27) Moreover, in a further method step, shown in FIG. 7, a first dielectric mirror 13 is applied over the first structure 5 and the filler material 12. Furthermore, in this method step a second dielectric mirror 19 is applied over the second structure 16 and the filler material 12.

(28) The first dielectric mirror 13 is made partially reflective for the electromagnetic radiation. The second dielectric mirror 19, in contrast to the first dielectric mirror 13, is made highly reflective for the electromagnetic radiation.

(29) As schematically shown in FIG. 8, the semiconductor layer sequence 2 is isolated in a further method step by means of a cut 20 in the vertical direction to form the radiation-emitting semiconductor chip 1.

(30) In contrast to the exemplary embodiment of FIGS. 1 to 8, in the semiconductor layer sequence 2 according to the exemplary embodiment of FIG. 9, a plurality of first recesses 4 each having a first structure 5 and a plurality of second recesses 15 each having a second structure 16 are created. The first recesses 4 and the second recesses 15 are arranged alternating.

(31) In this exemplary embodiment, one of the first recesses 4 structures the semiconductor layer sequence 2 into two areas, which each have an active area 3.

(32) Furthermore, the first structures 5 and the second structures 16 each have the shape of an isosceles triangle in cross section in the vertical direction. The right angles of the triangles of the first structures 5 are in this case each located in a central area between two mutually opposite lateral surfaces of the semiconductor layer sequence 2, thus the first lateral surface of the semiconductor layer sequence 7 and the further first lateral surface of the semiconductor layer sequence 23.

(33) Furthermore, the right angles of the triangles of the second structures 16 are each located in a central area between two mutually opposite lateral surfaces of the semiconductor layer sequence 2, thus the second lateral surface of the semiconductor layer sequence 18 and the further first lateral surface of the semiconductor layer sequence 24.

(34) Due to such a shape, the first structures 5 each have two lateral surfaces, which extend obliquely to the first lateral surface of the semiconductor layer sequence 7 and the further first lateral surface of the semiconductor layer sequence 23. Furthermore, the two structures 16 each have two lateral surfaces, which extend obliquely to the second lateral surface of the semiconductor layer sequence 18 and the further first lateral surface of the semiconductor layer sequence 24.

(35) In this exemplary embodiment, the semiconductor layer sequence 2 is isolated by means of cuts 20 in the vertical direction through the first structures 5 and the second structures 16 into a plurality of radiation-emitting semiconductor chips 1.

(36) In the method according to the exemplary embodiment of FIGS. 10 to 13, the material of the first structure 5 and the material of the second structure 16, as shown in FIG. 10, are introduced into the first recess 4 in such a way that the first structure 5 and the second structure 16 are created upon the introduction.

(37) The first structure 5 and the second structure 16 are created simultaneously.

(38) The material of the first structure 5 is identical to the material of the second structure 16 and comprises, for example, InGaN. The first structure 5 and the second structure 16 are generated by means of an ELO (epitaxial lateral overgrowth, abbreviated ELO) process.

(39) The first structure 5 has two lateral surfaces in this exemplary embodiment. One of the lateral surfaces of the first structure 6 encloses an angle of 451 with a first lateral surface of the semiconductor layer sequence 7. Furthermore, another of the lateral surfaces of the first structure 6 encloses an angle of 451 with a further first lateral surface of the semiconductor layer sequence 23. Furthermore, the second structure 16 has at least two lateral surfaces. One of the lateral surfaces of the second structure 17 encloses an angle of 451 with a second lateral surface of the semiconductor layer sequence 18. Furthermore, another of the lateral surfaces of the second structure 17 encloses an angle of 451 with a further second lateral surface of the semiconductor layer sequence 24.

(40) According to FIG. 11, a dielectric layer 11 is applied to the lateral surfaces of the first structure 5 and to the lateral surfaces of the second structure 16. The dielectric layer 11 follows the course of the inclinations of the lateral surfaces of the first structure 5 and the course of the inclinations of the lateral surfaces of the second structure 16.

(41) The dielectric layer 11 comprises, for example, SiON having an index of refraction of n.sub.s=1.7 or AlO having an index of refraction of n.sub.s=1.77.

(42) In further method steps according to FIGS. 12 and 13, the first recess 4 and the second recess 15 are each completely filled using a filler material 12. A first dielectric mirror 13 is applied to the filler material 12 over the first structure 5. Furthermore, a second dielectric mirror 19 is applied to the filler material 12 over the second structure 16.

(43) The semiconductor layer sequence 2 is then isolated by means of a cut 20 in the vertical direction through the first structure 5, the first dielectric mirror 13, the filler material 12, the dielectric layer, the first semiconductor area 8, and the substrate 10 and through the second structure 16, the second dielectric mirror 19, the filler material 12, the dielectric layer, the first semiconductor area 8, and the substrate 10 to form the radiation-emitting semiconductor chip 1.

(44) In the method according to the exemplary embodiment of FIGS. 14 to 18, a material of the first structure 5 and the material of the second structure 16, as shown in FIG. 14, is introduced completely into the first recess 4 and into the second recess 15. The material comprises, in contrast to the method step of FIG. 4, for example, Si.

(45) The material is then structured according to FIG. 15 by means of a wet chemical etching process to form the first structure 5 and the second structure 16. A dielectric layer 11 is applied to a lateral surface of the first structure 5 facing toward the active area 3 and to a lateral surface of the second structure 16 facing toward the active area 3, as shown in FIG. 16.

(46) The first recess 4 and the second recess 15 are then each completely filled using a filler material 12. A first dielectric mirror 13 is applied to the filler material 12 over the first structure 5. Furthermore, a second dielectric mirror 19 is applied to the filler material 12 over the second structure 16, as shown in conjunction with FIGS. 17 and 18.

(47) In the method according to the exemplary embodiment of FIGS. 19 and 20, the filler material 12 comprises, in contrast to FIG. 6, for example, GaN and/or InGaN. The filler material 12 is, for example, introduced epitaxially into the first recess 4 and the second recess 15. Alternatively, the filler material 12 is introduced by sputtering into the first recess 4 and the second recess 15.

(48) In the method step according to the exemplary embodiment of FIG. 21, before the application of the filler material 12 to a first lateral surface of the semiconductor layer sequence 7 and a second lateral surface of the semiconductor layer sequence 18, a passivation layer 14 is applied. The passivation layer 14 completely covers the first lateral surface of the semiconductor layer sequence 7 and the second lateral surface of the semiconductor layer sequence 18.

(49) The passivation layer 14 comprises, for example, AlN having an index of refraction of n=2.2.

(50) The radiation-emitting semiconductor chip 1 according to the exemplary embodiment of FIG. 22 comprises a semiconductor layer sequence 2. The semiconductor layer sequence 2 comprises a first semiconductor area 8, a second semiconductor area 9, and an active area 3 arranged in between. The active area 3 is designed to generate electromagnetic radiation.

(51) Furthermore, the semiconductor chip 1 comprises a first recess 4 and a second recess 15 in the semiconductor layer sequence 2, which each completely penetrate the active area 3. A first structure 5 is arranged in the first recess 4 and a second structure 16 is arranged in the second recess 15.

(52) A lateral surface of the first structure 6 facing toward the active area 3 extends obliquely to a first lateral surface of the semiconductor layer sequence 7. Furthermore, a lateral surface of the second structure 17 facing toward the active area 3 extends obliquely to a second lateral surface of the semiconductor layer sequence 18. The first structure 5 and the second structure 16 are each spaced apart in lateral directions from the active area 3.

(53) Furthermore, the active area 3 is arranged between the first lateral surface of the semiconductor layer sequence 7 and the second lateral surface of the semiconductor layer sequence 18. Furthermore, a passivation layer 14 is arranged in each case on the first lateral surface of the semiconductor layer sequence 7 and the second lateral surface of the semiconductor layer sequence 18.

(54) A filler material 12 is arranged in each case on the first structure 5 and the second structure 16, which completely fills the first recess 4 and the second recess 15. A first dielectric mirror 13 is arranged on the filler material 12 over the first structure 5 and a second dielectric mirror 19 is arranged on the filler material 12 over the second structure 16.

(55) According to the exemplary embodiment of FIG. 23, the electromagnetic radiation generated by the active area 3 can be decoupled via the first dielectric mirror 13 from the radiation-emitting semiconductor chip 1. A propagation direction of the electromagnetic radiation, which is shown in FIG. 23 as the arrow, extends in the vertical direction.

(56) The first structure 5 according to FIG. 24 has a shape of an isosceles triangle, as described in conjunction with FIG. 10, for example.

(57) The first structure 5 according to FIG. 24 has a shape of a trapezoid. In this case, the trapezoid comprises at least two lateral surfaces, which each enclose an angle of 451 with a base surface of the trapezoid. The second structure 16 can also have such a shape.

(58) The radiation-emitting semiconductor chip 1 comprises, for example, a resonator 22, which is formed between the first dielectric mirror 11 and the second dielectric mirror 12. The resonator 22 furthermore comprises the active area 3.

(59) The priority of German patent application DE 102020122210.6 is claimed, the disclosure of which is hereby expressly incorporated by reference.

(60) The features and exemplary embodiments described in conjunction with the figures can be combined with one another according to further exemplary embodiments, even if all combinations are not explicitly described. Furthermore, the exemplary embodiments described in conjunction with the figures can alternatively or additionally have further features according to the description in the general part.

(61) The invention is not restricted to the exemplary embodiments by the description on the basis thereof. Rather, the invention comprises every novel feature and every combination of features, which includes in particular every combination of features in the claims, even if this feature or this combination is not explicitly specified in the claims or exemplary embodiments.