FERROELECTRIC QUATERNARY III-NITRIDE ALLOY-BASED DEVICES
20250338534 ยท 2025-10-30
Inventors
Cpc classification
H10D30/475
ELECTRICITY
H10D30/015
ELECTRICITY
International classification
H10D30/47
ELECTRICITY
H10D30/01
ELECTRICITY
Abstract
A device includes a substrate and a heterostructure supported by the substrate. The heterostructure includes a III-nitride layer and a ferroelectric layer supported by the III-nitride layer. The ferroelectric layer includes a quaternary III-nitride alloy. The quaternary III-nitride alloy includes a Group IIIB element. The ferroelectric layer has a lattice constant greater than a lattice constant of gallium nitride (GaN).
Claims
1. A device comprising: a substrate; and a heterostructure supported by the substrate, the heterostructure comprising: a III-nitride layer; and a ferroelectric layer supported by the III-nitride layer; wherein: the ferroelectric layer comprises a quaternary III-nitride alloy; the quaternary III-nitride alloy comprises a Group IIIB element; and the ferroelectric layer has a lattice constant greater than a lattice constant of gallium nitride (GaN).
2. The device of claim 1, wherein the ferroelectric layer is in contact with the III-nitride layer.
3. The device of claim 1, wherein the III-nitride layer has a lattice constant greater than the lattice constant of GaN.
4. The device of claim 1, wherein the III-nitride layer is doped with a Group IIIB element.
5. The device of claim 4, wherein: the III-nitride layer comprises scandium; and the quaternary III-nitride alloy comprises gallium.
6. The device of claim 1, wherein the ferroelectric layer has an energy bandgap greater than an energy bandgap of GaN.
7. The device of claim 1, wherein: the III-nitride layer comprises a ternary alloy; the III-nitride layer and the ferroelectric layer are lattice-matched.
8. The device of claim 1, wherein the III-nitride layer is ferroelectric.
9. The device of claim 1, further comprising an electrode supported by the ferroelectric layer, wherein: the ferroelectric layer is configured as a cap layer for the III-nitride layer in an active area of the device; and the electrode is disposed in the active area.
10. The device of claim 1, wherein: the heterostructure comprises a multiple quantum well or short-period superlattice structure; the multiple quantum well or short-period superlattice structure comprises a stack of quantum well layers and barrier layers; the III-nitride layer is one of the quantum well layers; and the ferroelectric layer is one of the barrier layers.
11. The device of claim 10, wherein the quantum well layers comprise AlGaN.
12. The device of claim 10, wherein the quantum well layers and the barrier layers are lattice matched to one another.
13. The device of claim 10, wherein the quantum well layers and the barrier layers are configured such that the multiple quantum well or short-period superlattice structure has intersubband transitions at a mid-infrared frequency or a far-infrared frequency.
14. A device comprising: a substrate; and a heterostructure supported by the substrate, the heterostructure comprising: a ferroelectric base layer comprising a first III-nitride alloy; and a ferroelectric cap layer supported by the ferroelectric base layer, the ferroelectric cap layer comprising a second III-nitride alloy; wherein: the first III-nitride alloy comprises scandium; and the second III-nitride alloy comprises gallium.
15. The device of claim 14, wherein the second III-nitride alloy is a quaternary III-nitride alloy.
16. The device of claim 14, wherein the ferroelectric cap layer is patterned such that a layout of the ferroelectric cap layer corresponds with an active area of the device.
17. The device of claim 16, further comprising an electrode supported by the ferroelectric cap layer and disposed in the active area.
18. The device of claim 14, wherein the ferroelectric base layer and the ferroelectric cap layer are in contact with one another.
19. A device comprising: a substrate; and a heterostructure supported by the substrate, the heterostructure comprising a multiple quantum well or short-period superlattice structure; wherein: the multiple quantum well or short-period superlattice structure comprises a stack of alternating barrier layers and quantum well layers; each barrier layer of the stack comprises a quaternary III-nitride alloy; the quaternary III-nitride alloy comprises a Group IIIB element; and each quantum well layer of the stack comprises a III-nitride layer.
20. The device of claim 19, wherein each barrier layer is ferroelectric.
21. The device of claim 19, wherein the barrier layers and the quantum well layers are lattice matched to one another.
22. A method of fabricating a device, the method comprising: growing a first ferroelectric layer supported by a substrate, the first ferroelectric layer comprising a first III-nitride alloy; and growing a second ferroelectric layer supported by the ferroelectric base layer, the second ferroelectric layer comprising a second III-nitride alloy; wherein: the second ferroelectric layer comprises a quaternary III-nitride alloy; the quaternary III-nitride alloy comprises a Group IIIB element; and the second ferroelectric layer has a lattice constant greater than a lattice constant of gallium nitride (GaN).
23. A method of fabricating a device, the method comprising: growing a first ferroelectric layer supported by a substrate, the first ferroelectric layer comprising a first III-nitride alloy; and growing a second ferroelectric layer supported by the ferroelectric base layer, the second ferroelectric layer comprising a second III-nitride alloy; wherein: the first III-nitride alloy comprises scandium; and the second III-nitride alloy comprises gallium.
24. The method of claim 23, further comprising forming an electrode in an active area of the device, the electrode being supported by the ferroelectric cap layer.
Description
BRIEF DESCRIPTION OF THE DRAWING FIGURES
[0011] For a more complete understanding of the disclosure, reference should be made to the following detailed description and accompanying drawing figures, in which like reference numerals identify like elements in the figures.
[0012]
[0013]
[0014]
[0015]
[0016]
[0017]
[0018]
[0019]
[0020]
[0021] The embodiments of the disclosed devices and methods may assume various forms. Specific embodiments are illustrated in the drawing and hereafter described with the understanding that the disclosure is intended to be illustrative. The disclosure is not intended to limit the invention to the specific embodiments described and illustrated herein.
DETAILED DESCRIPTION OF THE DISCLOSURE
[0022] Devices and heterostructures with one or more layers of a quaternary III-nitride alloy (e.g., ScAlGaN) are described. In some cases, the layers may be ferroelectric. As described herein, the quaternary III-nitride alloy provides an additional degree of material tunability. For instance, ranges of material parameters such as bandgap, band alignment, lattice parameter, and piezoelectric constant may be realized through the quaternary alloys described herein. Methods for fabricating such devices are also described.
[0023] The tunability of material parameters such as bandgap, band alignment, lattice parameter, and piezoelectric constant, are useful for electronic, optoelectronic, and acoustic devices. The materials Sc.sub.xAl.sub.1-xN and Sc.sub.xGa.sub.1-xN offer some tunability through the adjustment of Sc compositions. However, films with high Sc compositions often suffer from degraded material quality, accompanied by significant increases in leakage currents and degeneration of desirable ferroelectric and piezoelectric properties. As described herein, the quaternary alloy Sc.sub.xAl.sub.yGa.sub.1-x-yN may be used to bridge the tunability gap between Sc.sub.xAl.sub.1-xN and Sc.sub.xGa.sub.1-xN. The material quality of Sc.sub.xAl.sub.1-xN may also be improved by incorporating Ga into Sc.sub.xAl.sub.1-xN, thus forming Sc.sub.xAl.sub.yGa.sub.1-x-yN.
[0024] The layers of Sc.sub.xAl.sub.yGa.sub.1-x-yN may also be ferroelectric. Examples of ferroelectricity in Sc.sub.xAl.sub.yGa.sub.1-x-yN grown on Mo via plasma-assisted MBE are described herein, along with details regarding ferroelectric switching behavior. For instance, examples of monocrystalline Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N with readily acquired ferroelectricity were investigated systematically through a diverse array of characterization techniques, revealing a coercive field of about 5.5 MV cm.sup.1 and high remanent polarization of about 150 C cm.sup.2. Furthermore, the examples establish that polarization reversal in Sc.sub.xAl.sub.yGa.sub.1-x-yN follows a scheme of domain nucleation and growth, which is confirmed through piezoresponse force microscopy (PFM). The availability of ferroelectric Sc.sub.xAl.sub.yGa.sub.1-x-yN supports the fabrication of wurtzite nitride-based heterostructures for a vast variety of devices and systems.
[0025] Example heterostructures including a layer of Sc.sub.xAl.sub.yGa.sub.1-x-yN on Mo were grown using a Veeco GENxplor MBE system. Active nitrogen species with 6N purity was provided through a Veeco radio frequency UNI-Bulb plasma source. Aluminum (6N5 purity), gallium (7N purity), and scandium (99.99% purity) were supplied using Knudsen effusion cells. The employed template included 40 nm Mo on 20 nm Sc.sub.2O.sub.3 on silicon (111). 90 nm of Sc.sub.xAl.sub.yGa.sub.1-x-yN was then grown under moderately nitrogen rich conditions. The alloy content was tunable by adjusting the Al and Ga beam equivalent pressures, with the composition determined by energy dispersive x-ray spectroscopy (EDX). In these examples, Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N was chosen to ensure a crack-free film with good surface morphology, offering greater stability in characterization and minimizing the formation of leakage current paths. The corresponding beam equivalent pressures were about 2.210.sup.8 torr for Sc, 4.510.sup.8 torr for Al, and 4.510.sup.8 torr for Ga. The epitaxial process was monitored using an in-situ reflection high energy electron diffraction (RHEED) system. Following growth, the surface morphology was characterized ex-situ using a Bruker Dimension Icon atomic force microscope (AFM). A Rigaku SmartLab x-ray diffractometer (XRD) with a Cu K source (wavelength of 1.5406 ) was used to characterize the XRD pattern of the grown samples. A Thermo Fisher Scientific Talos F200X STEM equipped with Super-X EDX was used to measure the sample thickness and composition and to perform elemental distribution mapping. Circular contact pads with diameters 10-150 m, serving as drive electrodes, included 20 nm Ti followed by 150 nm Al, and were patterned on the Sc.sub.xAl.sub.yGa.sub.1-x-yN film via standard photolithography, with the underlying Mo layer serving as the bottom electrode, thereby forming example capacitors. All electrical and ferroelectric measurements were performed with a B1500 semiconductor analyzer and a Radiant Precision Multiferroic II system at room temperature. To explore the domain evolution within Sc.sub.xAl.sub.yGa.sub.1-x-yN during polarity switching, a Burker Icon AFM was applied for PFM. In preparation for PFM, aqueous hydrogen fluoride (HF) was used to remove the electrodes from samples following poling.
[0026] Although described in connection with examples of epitaxially grown Sc.sub.xAl.sub.yGa.sub.1-x-yN layers, the disclosed methods and devices may be applied to a variety of quaternary III-nitride alloys. The disclosed methods and devices may thus include or involve the incorporation of scandium into other III-nitride wurtzite structures. For instance, the disclosed methods and devices may include or involve one or more epitaxially grown Sc.sub.xIn.sub.yGa.sub.1-x-yN layers. The configuration, construction, fabrication, and other characteristics of the heterostructures may also vary from the examples described. For instance, the heterostructures may include any number of epitaxially grown layers of ferroelectric and non-ferroelectric nature. The disclosed methods and devices are not limited to III-nitride alloys including scandium. For instance, the III-nitride alloys may include additional or alternative group IIIB elements, such as yttrium (Y) and lanthanum (La).
[0027] Although described in connection with examples having compositions of Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N, the compositions of the III-nitride alloys of the disclosed devices and heterostructures may vary. Indeed, varying the compositions may be used for lattice matching and/or other tuning, e.g., as described herein.
[0028] Although described in connection with MBE growth procedures, additional or alternative non-sputtered epitaxial growth procedures may be used. For instance, metal-organic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE) growth procedures may be used. Still other procedures may be used, including, for instance, pulsed laser deposition procedures.
[0029] Further details on the epitaxial growth conditions, procedures, and related parameters that may be used to form the structures and heterostructures described herein are set forth in WO 2023/022768 (Epitaxial Nitride Ferroelectronics), International Application No. PCT/US23/13727 (Epitaxial Nitride Ferroelectronic Devices filed Feb. 23, 2023), P. Wang, et al., Fully epitaxial ferroelectric ScAlN grown by molecular beam epitaxy, Applied Physics Letters, vol. 118, p. 223504 (2021), D. Wang et al., An Epitaxial Ferroelectric ScAlN/GaN Heterostructure Memory, Advanced Electronic Materials, p. 2200005 (2022), D. Wang, et al., Fully epitaxial ferroelectric ScGaN grown on GaN by molecular beam epitaxy, Appl Phys Lett 119 (11), 111902 (2021), D. Wang et al., Impact of dislocation density on the ferroelectric properties of ScAlN grown by molecular beam epitaxy, Appl Phys Lett 121 (4), 042108 (2022), P. Wang et al., Quaternary alloy ScAlGaN: A promising strategy to improve the quality of ScAlN, Appl Phys Lett 120 (1), 012104 (2022), and P. Wang et al. Ferroelectric Nitride Heterostructures on CMOS Compatible Molybdenum for Synaptic Memristors, ACS Appl. Mater. Interfaces 2023, 15, 14, 18022-18031 (2023), the entire disclosures of which are hereby incorporated by reference.
[0030]
[0031] To examine the ferroelectricity of Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N, P-E (polarization versus electric field), C-V (capacitance versus voltage), and PUND (positive-up-negative-down) measurements were carried out on the fabricated example capacitors. Similar to Sc.sub.xGa.sub.1-xN grown by MBE, the Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N example exhibited noticeable wake-up behavior. Therefore, all example devices tested were pre-stressed with 100 cycles of a triangular AC waveform to exclude wake-up effects. A representative P-E loop, measured using a triangular waveform input at 10 kHz, is presented in
[0032]
[0033] To analyze the ferroelectric switching behavior of Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N, the dependence of polarity reversal on the width of an applied pulse is quantified. Polarization switching within a monocrystalline ferroelectric has been described by Ishibashi et al. in the Kolmogorov-Avrami-Ishibashi (KAI) model: P=1exp [(t/t.sub.0).sup.n], where P is the polarization inversion fraction, to is the characteristic switching time, and n is an exponential factor. Ishibashi et al. proposed that n equals the growth dimensionality of the polarity reversal domains during ferroelectric switching. For thin film ferroelectrics, the KAI model predicts that n=2, where the polarity inversion is achieved through nucleation and subsequent growth of the inversion domains. Other models, such as the nucleation-limited switching (NLS) model, proposed by Tagantsev et al., have been applied to textured PbZr.sub.xTi.sub.1-xO.sub.3 films. However, such films are often polycrystalline and contain grains of various orientations, rendering the KAI model unsuitable. On the other hand, because the wurtzite structure possesses spontaneous polarization only along the c-axis, wurtzite nitride ferroelectrics are limited to 180 domains. As such, the KAI model is considered useful for the monocrystalline Sc.sub.xAl.sub.yGa.sub.1-x-yN films described herein.
[0034] The time dependence of polarization reversal was measured using a pulse sequence consisting of a positive conditioning pulse, a negative writing pulse, and two positive reading pulses. The maximum electric field during the conditioning and reading pulses is set to about 5.5 MV cm.sup.1 to ensure complete switching.
[0035] The evolution of polarity inversion domains with polarization was investigated via PFM. Following the results in
[0036]
[0037]
[0038] The heterostructure includes a III-nitride layer 506 and the ferroelectric layer 502 supported by the III-nitride layer 506. In this example, the ferroelectric layer 502 includes a quaternary III-nitride alloy. The quaternary III-nitride alloy includes a Group IIIB element, such as Sc, but alternative or additional Group IIIB elements may be used. The ferroelectric layer 502 may be in contact with the III-nitride layer 506 as shown.
[0039] In this example, the ferroelectric layer 502 has a lattice constant greater than a lattice constant of gallium nitride (GaN). The composition of the quaternary III-nitride alloy may be configured to realize a desired lattice constant. For instance, the desired lattice constant may correspond with a lattice constant of the underlying III-nitride layer 506. In some cases, the III-nitride layer 506 has a lattice constant greater than the lattice constant of GaN. For instance, the III-nitride layer 506 may be composed of AlGaN. In such cases, the quaternary III-nitride alloy may be configured to be lattice-matched to AlGaN. Achieving such lattice matching would be challenging with III-nitride alloys, such as ScAlN, without sacrifices in, e.g., material quality due to undesirably high Sc content. Lattice matching to other III-nitride alloys may also be achieved, including, for instance, InGaN.
[0040] The lattice matching made possible by the quaternary III-nitride alloy may be used to realize heterostructures (e.g., superlattice structures) that allow various electronic, optical, and/or non-linear optical properties to be achieved without worrying about lattice mismatch. For instance, the heterostructures may be configured to offer a tunable energy bandgap while still maintaining lattice matched layers.
[0041]
[0042] The method 600 may begin with an act 602 in which a substrate is prepared and/or otherwise provided. In some cases, the act 602 includes providing a sapphire substrate in an act 604. Alternative or additional materials may be used, including, for instance, silicon, bulk GaN, bulk AlN, or other semiconductor material. Still other materials may be used, including, for instance, silicon carbide. The substrate may be cleaned in an act 606. In some cases, a native or other oxide layer may be removed from a substrate surface in an act 608. Additional or alternative processing may be implemented in other cases, including, for instance, doping or deposition procedures. The substrate thus may or may not have a uniform composition. The substrate may be a uniform or composite structure.
[0043] In an act 610, one or more growth templates or other layers are formed. The layer(s) are thus formed on, or otherwise supported by, the substrate. The layer(s) may or may not be in contact with the substrate. In some cases, the layer(s) are composed of, or otherwise include, a semiconductor material. For instance, the act 610 may include an act 612 in which a semiconductor layer is formed. For example, a III-nitride layer, such as a GaN layer, may be grown or otherwise formed on the substrate. Other compound or other semiconductor materials may be used, including, for instance, AlN or AlGaN. The act 612 may thus be implemented before (e.g., in preparation for) implementing an epitaxial growth procedure in which a wurtzite structure is formed. The ferroelectric layer(s) may thus be formed on the semiconductor layer. The semiconductor layer may be configured or used as a growth template for the ferroelectric layer(s) and/or other elements of the heterostructure. In some cases, the act 612 may include growing the semiconductor layer in an epitaxial growth chamber in which the epitaxial growth procedure for the ferroelectric layer(s) is implemented. As a result, the substrate may remain within, e.g., is not removed from, the epitaxial growth chamber between forming the semiconductor layer and implementing the epitaxial growth procedure for growing the ferroelectric layer(s).
[0044] Alternatively or additionally, the act 610 includes an act 614 in which one or more metal or other conductive layers are deposited and patterned. For example, an aluminum layer may be deposited on a silicon substrate in preparation for the epitaxial growth of the ferroelectric layer(s).
[0045] The method 600 may include an act 616 in which one or more contacts are formed. In the example of
[0046] In an act 622, a non-sputtered epitaxial growth procedure is implemented to form ferroelectric layer(s) supported by the substrate. As described herein, one of the ferroelectric layer(s) may composed of, or otherwise includes, a quaternary III-nitride alloy. For instance, the alloy may be ScAlGaN. Additional or alternative quaternary III-nitride materials may be grown, including, for instance, ScInGaN. As also described herein, the epitaxial growth procedure is configured to incorporate scandium and/or another group IIIB element into the alloy of the III-nitride material. In some cases, the act 622 includes an act 624 in which an MBE procedure is implemented. In other cases, an MOCVD or other non-sputtered epitaxial growth procedure is implemented in an act 626.
[0047] The act 622 may constitute a continuation, or part of a sequence, of growth procedures. The growth procedures may be implemented in a common, or same, growth chamber. The act 622 may thus include an act 628 in which epitaxial growth is continued in the same chamber. Sequential layers of the heterostructure may thus be grown without exposure to the ambient. The quality of the interface between the layers may accordingly be improved.
[0048] The growth temperature may be at a level such that the ferroelectric layer exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the material. Ferroelectric switching and other behavior may thus be achieved. Growth of a single crystal of the scandium-including alloy (e.g., a monocrystalline layer of the alloy) is also achieved. For example, in some cases, a quaternary III-nitride alloy may be epitaxially grown at a growth temperature of about 600 degrees Celsius or less. The quaternary III-nitride alloy may be grown at other growth temperatures, e.g., as described herein. In some cases, a nitrogen-to-metal flux ratio higher than 1 may be used.
[0049] The growth temperature may correspond with the temperature measured at a thermocouple in the growth chamber. The growth temperature at the epitaxial surface may be slightly different. The growth temperature is accordingly approximated via the temperature measurement at the thermocouple.
[0050] At each level within the range of suitable growth temperatures, the resulting wurtzite structure is monocrystalline. The resulting wurtzite structure is monocrystalline to a degree not realizable via, for instance, sputtering-based procedures for forming the III-nitride alloy layers. Such procedures are only capable of producing structures with x-ray diffraction rocking curve line widths on the order of a few degrees at best. In contrast, the structures grown by the disclosed methods exhibit x-ray diffraction rocking curve line widths on the order of a few hundred arc-seconds or less, well over an order of magnitude less. In this manner, leakage current paths are minimized or otherwise sufficiently reduced so that the resulting wurtzite structure has a suitably high breakdown field strength level, e.g., sufficiently greater than the ferroelectric coercive field strength.
[0051] The above-noted differences in crystal quality evidenced via x-ray diffraction rocking curve line widths may also be used to distinguish between monocrystalline and polycrystalline structures. As used herein, the term polycrystalline refers to structures having x-ray diffraction rocking curve line widths on the order of a few degrees or higher. As used herein, the term monocrystalline refers to structures having x-ray diffraction rocking curve line widths at least one order of magnitude lower than the order of a few degrees.
[0052] Comparing the wurtzite structures of the layers grown by MBE or other non-sputtered techniques (e.g., MOCVD or HVPE) with sputtering deposition techniques, the microstructure of the former techniques is more uniform with highly ordered stacking sequence of atoms. In sputter deposited layers, domains with cubic phase or domains with in-plane mis-orientation are readily observed. The existence of these mis-aligned domains suppresses the complete switching of polarization, and further results in the fast loss of polarization during fatigue testing. Regarding phase purity, the highly crystallographic orientation of layers grown by MBE or other non-sputtered techniques exhibits more repeatable ferroelectric switching, which is useful in a number of device applications.
[0053] In some cases, the act 622 includes the growth of multiple ferroelectric layers. For instance, the act 622 may include an act 630 in which a ferroelectric base layer and a ferroelectric cap layer are grown. The ferroelectric cap layer may be used to prevent oxidation of the ferroelectric base layer without sacrificing the ferroelectric (or piezoelectric) functionality of the ferroelectric base layer.
[0054] The multiple ferroelectric layers may be configured to form the alternating stacked layers of a multiple quantum well or short-period superlattice structure. The act 622 may include an act 632 in which the alternating stacked layers are grown.
[0055] The method 600 may include an act 634 in which one or more layers (e.g., semiconductor layers) are formed after growth of the wurtzite structure. As a result, the layer(s) may be in contact with the wurtzite structure. For instance, one or more III-nitride (e.g., GaN or AlGaN) or other semiconductor layers may be epitaxially grown in an act 636. The act 636 may be implemented in the same epitaxial growth chamber used to grow the wurtzite structure. As a result, the substrate (and heterostructure) is not removed from the epitaxial growth chamber between implementing the acts 622 and 634.
[0056] Alternatively or additionally, the act 634 includes an act 638 in which one or more metal or other conductive layers or structures are formed. The layers or structures may be deposited or otherwise formed. In some cases, the conductive structure is configured as an upper or top contact. For instance, the conductive structure may be a gate.
[0057] The method 600 may include one or more additional acts. For example, one or more acts may be directed to forming other structures or regions of the device that includes the heterostructure. In a transistor device example, the regions may correspond with source and drain regions. The nature of the regions or structures may vary in accordance with the nature of the device.
[0058] The order of the acts of the method 600 may differ from the example shown in
[0059] A number of different types of devices may be fabricated by the method 600 of
[0060] A number of further example devices are now described. In each example, the device includes a substrate and a heterostructure supported by the substrate. The heterostructure includes a III-nitride layer and a ferroelectric layer supported by the III-nitride layer. The ferroelectric layer includes a quaternary III-nitride alloy, and the quaternary III-nitride alloy includes a Group IIIB element, such as Sc, but other Group IIIB elements may be used. In some cases, the III-nitride layer is also ferroelectric.
[0061]
[0062] The device 700 includes a substrate 706 and a heterostructure supported by the substrate 706. The substrate 706 may be composed of, or otherwise include, sapphire, but alternative or additional materials may be used. In this example, the heterostructure includes a lower electrode 708 supported by the substrate 706. The lower electrode 708 may be composed of, or otherwise include, n-doped GaN, but alternative or additional materials may be used.
[0063] The heterostructure includes a ferroelectric base layer 702 and a ferroelectric cap layer 704 supported by the ferroelectric base layer 702. The ferroelectric base layer 702 and the ferroelectric cap layer 704 may be in contact with one another as shown. The ferroelectric base layer 702 is composed of, or otherwise includes, a first III-nitride alloy. The ferroelectric cap layer 704 is composed of, or otherwise includes, a second III-nitride alloy.
[0064] The ferroelectric cap layer 704 may have a composition that prevents or minimizes oxidation. For instance, in cases in which the base layer includes scandium (e.g., ScAlN), the base layer may be highly susceptible to oxidation. To avoid such oxidation while maintaining the ferroelectric nature of the heterostructure, the III-nitride alloy of the ferroelectric cap layer 704 may include gallium. For example, the ferroelectric cap layer 704 may be composed of ScGaN (or other Ga-containing ternary III-nitride alloy) or ScAlGaN (or other Ga-containing quaternary alloy).
[0065] The ferroelectric cap layer 704 may be patterned such that a layout of the ferroelectric cap layer 704 corresponds with an active area of the device 700. In this example, the device 700 includes a top electrode 710 supported by the ferroelectric cap layer 702 and disposed in the active area.
[0066]
[0067] The multiple quantum well or short-period superlattice structure includes a stack of quantum well layers 804 and barrier layers 806. In this example, each one of the quantum well layers 804 is a III-nitride layer, such as AlGaN, but alternative or additional III-nitrides may be used. Each one of the barrier layers 806 is composed of, or otherwise includes, a quaternary III-nitride alloy, such as ScAlGaN, but alternative or additional quaternary alloys may be used. In some cases (e.g., in memory devices), the barrier layers 806 may be ferroelectric. In other cases (e.g., intersubband and other optoelectronic devices), the barrier layers 806 are not ferroelectric.
[0068] The heterostructure may also include a base layer 808 supported by the substrate 802. The base layer 808 may or may not be composed of, or otherwise includes, the same quaternary III-nitride alloy of the barrier layers 806.
[0069] The quaternary III-nitride alloy may have a composition such that the base layer 808, the quantum well layers 804, and the barrier layers 806 are lattice matched to one another.
[0070] The quantum well layers 804 and the barrier layers 806 may be configured such that the multiple quantum well or short-period superlattice structure has intersubband transitions at a mid-infrared frequency or a far-infrared frequency.
[0071]
[0072] Examples of ferroelectric, single-phase high-quality wurtzite quaternary alloy Sc.sub.0.2Al.sub.0.45Ga.sub.0.35N were grown via plasma-assisted molecular beam epitaxy. The example layers or films unambiguously exhibited ferroelectricity with a coercive field of about 5.5 MV cm.sup.1 and large remanent polarization of about 150 C cm.sup.2, which are comparable to previous reports on other nitride ferroelectrics. The examples also exhibited a surface roughness of about 0.5 nm, which may be limited or otherwise affected by the surface roughness of an underlying layer (e.g., a Mo template layer). Furthermore, the ferroelectric switching behavior was found to be in good agreement with the KAI model, with piezoresponse force microscopy (PFM) further supporting and elucidating the polarity reversal mechanism of domain nucleation and growth of inversion domains occurring via an in-plane motion of the domain walls. In alternative cases, other quaternary alloys may be formed by introducing a wide range of Sc, Al, Ga, In, and B compositions to fully bridge the gap between the corresponding ternaries (e.g., ScAlN and ScGaN). The III-nitride alloy ferroelectrics described herein may be used in a wide variety of devices and applications, including, for instance, memory devices, reconfigurable electronics and optoelectronics, energy harvesting and storage, MEMS, and piezoelectric devices.
[0073] The term about is used herein in a manner to include deviations from a specified value that would be understood by one of ordinary skill in the art to effectively be the same as the specified value due to, for instance, the absence of appreciable, detectable, or otherwise effective difference in operation, outcome, characteristic, or other aspect of the disclosed methods and devices.
[0074] The present disclosure has been described with reference to specific examples that are intended to be illustrative only and not to be limiting of the disclosure. Changes, additions and/or deletions may be made to the examples without departing from the spirit and scope of the disclosure.
[0075] The foregoing description is given for clearness of understanding only, and no unnecessary limitations should be understood therefrom.